Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 2 | |
Furquan Shaikh | 583ba8b | 2020-06-30 23:51:24 -0700 | [diff] [blame] | 3 | #include <acpi/acpi_device.h> |
| 4 | #include <acpi/acpigen.h> |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 5 | #include <console/console.h> |
| 6 | #include <device/device.h> |
Felix Held | e5d3b4e | 2021-04-20 00:39:55 +0200 | [diff] [blame^] | 7 | #include <device/mmio.h> |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 8 | #include <device/pci.h> |
| 9 | #include <device/pci_ids.h> |
| 10 | #include <device/pci_ops.h> |
| 11 | #include "chip.h" |
Raul E Rangel | 4c7e0d7 | 2020-05-07 15:14:09 -0600 | [diff] [blame] | 12 | #include <soc/acp.h> |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 13 | #include <soc/acpi.h> |
| 14 | #include <soc/pci_devs.h> |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 15 | #include <soc/southbridge.h> |
| 16 | #include <amdblocks/acpimmio.h> |
| 17 | #include <commonlib/helpers.h> |
| 18 | |
Felix Held | 349a145 | 2021-04-20 00:38:32 +0200 | [diff] [blame] | 19 | static void acp_update32(uintptr_t bar, uint32_t reg, uint32_t clear, uint32_t set) |
Akshu Agrawal | 42d4a57 | 2019-12-16 15:13:17 +0530 | [diff] [blame] | 20 | { |
Felix Held | e5d3b4e | 2021-04-20 00:39:55 +0200 | [diff] [blame^] | 21 | clrsetbits32((void *)(bar + reg), clear, set); |
Akshu Agrawal | 42d4a57 | 2019-12-16 15:13:17 +0530 | [diff] [blame] | 22 | } |
| 23 | |
Aaron Durbin | a6e3b5a | 2020-06-09 07:56:43 -0600 | [diff] [blame] | 24 | static void init(struct device *dev) |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 25 | { |
| 26 | const struct soc_amd_picasso_config *cfg; |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 27 | struct resource *res; |
| 28 | uintptr_t bar; |
| 29 | |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 30 | /* Set the proper I2S_PIN_CONFIG state */ |
Felix Held | 7180090 | 2020-06-17 19:59:53 +0200 | [diff] [blame] | 31 | cfg = config_of_soc(); |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 32 | |
| 33 | res = dev->resource_list; |
| 34 | if (!res || !res->base) { |
| 35 | printk(BIOS_ERR, "Error, unable to configure pin in %s\n", __func__); |
| 36 | return; |
| 37 | } |
| 38 | |
| 39 | bar = (uintptr_t)res->base; |
Furquan Shaikh | 28980fd | 2020-07-15 23:19:41 -0700 | [diff] [blame] | 40 | acp_update32(bar, ACP_I2S_PIN_CONFIG, PIN_CONFIG_MASK, cfg->acp_pin_cfg); |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 41 | |
Akshu Agrawal | 42d4a57 | 2019-12-16 15:13:17 +0530 | [diff] [blame] | 42 | /* Enable ACP_PME_EN and ACP_I2S_WAKE_EN for I2S_WAKE event */ |
| 43 | acp_update32(bar, ACP_I2S_WAKE_EN, WAKE_EN_MASK, !!cfg->acp_i2s_wake_enable); |
Felix Held | 828a36e | 2020-09-11 21:45:20 +0200 | [diff] [blame] | 44 | acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acp_pme_enable); |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 45 | } |
| 46 | |
Furquan Shaikh | 0d787a1 | 2020-06-18 22:20:52 -0700 | [diff] [blame] | 47 | static const char *acp_acpi_name(const struct device *dev) |
| 48 | { |
| 49 | return "ACPD"; |
| 50 | } |
| 51 | |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 52 | static struct device_operations acp_ops = { |
| 53 | .read_resources = pci_dev_read_resources, |
| 54 | .set_resources = pci_dev_set_resources, |
Aaron Durbin | a6e3b5a | 2020-06-09 07:56:43 -0600 | [diff] [blame] | 55 | .enable_resources = pci_dev_enable_resources, |
| 56 | .init = init, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 57 | .ops_pci = &pci_dev_ops_pci, |
Furquan Shaikh | de4baff | 2020-07-16 13:26:44 -0700 | [diff] [blame] | 58 | .scan_bus = scan_static_bus, |
Furquan Shaikh | 0d787a1 | 2020-06-18 22:20:52 -0700 | [diff] [blame] | 59 | .acpi_name = acp_acpi_name, |
Furquan Shaikh | 0fba23b | 2020-07-16 13:52:14 -0700 | [diff] [blame] | 60 | .acpi_fill_ssdt = acpi_device_write_pci_dev, |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 61 | }; |
| 62 | |
| 63 | static const struct pci_driver acp_driver __pci_driver = { |
| 64 | .ops = &acp_ops, |
| 65 | .vendor = PCI_VENDOR_ID_AMD, |
Furquan Shaikh | a1cd7eb | 2020-04-15 23:58:22 -0700 | [diff] [blame] | 66 | .device = PCI_DEVICE_ID_AMD_FAM17H_ACP, |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 67 | }; |