soc/amd/picasso: Configure ACP_PME_EN and ACP_I2S_WAKE_EN
This change adds support for configuring ACP_PME_EN and ACP_I2S_WAKE_EN
using the mainboard setting for `acp_pme_enable` and `acp_i2s_wake_enable`
in the devicetree. This is required to get I2S_Wake event on headset jack
plug/unplug when using CODEC_GPI pad.
BUG=b:146317284,b:161328042
Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Change-Id: I522d7497940f499fbc3181d866f2b44e979bba7a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1969104
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43495
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/picasso/acp.c b/src/soc/amd/picasso/acp.c
index 3272acf..b598e64 100644
--- a/src/soc/amd/picasso/acp.c
+++ b/src/soc/amd/picasso/acp.c
@@ -15,6 +15,16 @@
#include <amdblocks/acpimmio.h>
#include <commonlib/helpers.h>
+static void acp_update32(uintptr_t bar, uint32_t reg, uint32_t and_mask, uint32_t or_mask)
+{
+ uint32_t val;
+
+ val = read32((void *)(bar + reg));
+ val &= ~and_mask;
+ val |= or_mask;
+ write32((void *)(bar + reg), val);
+}
+
static void init(struct device *dev)
{
const struct soc_amd_picasso_config *cfg;
@@ -33,6 +43,10 @@
bar = (uintptr_t)res->base;
write32((void *)(bar + ACP_I2S_PIN_CONFIG), cfg->acp_pin_cfg);
+ /* Enable ACP_PME_EN and ACP_I2S_WAKE_EN for I2S_WAKE event */
+ acp_update32(bar, ACP_I2S_WAKE_EN, WAKE_EN_MASK, !!cfg->acp_i2s_wake_enable);
+ acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acpi_pme_enable);
+
if (cfg->acp_pin_cfg == I2S_PINS_I2S_TDM)
sb_clk_output_48Mhz(); /* Internal connection to I2S */
}