blob: 5edb63e95d3535fd4597485569b05e8dac94baff [file] [log] [blame]
Zaolina823f9b2014-05-06 21:31:45 +02001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
Zaolina823f9b2014-05-06 21:31:45 +02004
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02009 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Nicolas Reineckede72d432014-10-17 13:01:02 +020010 register "gpu_panel_power_cycle_delay" = "5"
11 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
12 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
13 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
14 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
Nicolas Reineckede72d432014-10-17 13:01:02 +020015 register "gpu_cpu_backlight" = "0x1155"
16 register "gpu_pch_backlight" = "0x06100610"
Zaolina823f9b2014-05-06 21:31:45 +020017
Patrick Rudolphe4b2f3a2024-04-28 11:18:43 +020018 chip cpu/intel/model_206ax
19 # Values obtained from vendor BIOS
20 register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
21 register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
22 register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
23 register "pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
24 device cpu_cluster 0 on end
25 end
Zaolina823f9b2014-05-06 21:31:45 +020026 device domain 0 on
Peter Lemenkova0c97592019-11-27 15:15:27 +010027 subsystemid 0x17aa 0x21cf inherit
28
Felix Singer63e77652024-01-13 23:05:42 +010029 device ref host_bridge on end
Arthur Heymansb5df65a2022-11-12 14:51:49 +010030 device ref peg10 on end # NVIDIA Copcie_rporation GF119M [NVS 4200M]
31 device ref igd on
Peter Lemenkova0c97592019-11-27 15:15:27 +010032 subsystemid 0x17aa 0x21d1
Felix Singer63e77652024-01-13 23:05:42 +010033 end
Zaolina823f9b2014-05-06 21:31:45 +020034
35 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Zaolina823f9b2014-05-06 21:31:45 +020036 # GPI routing
37 # 0 No effect (default)
38 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
39 # 2 SCI (if corresponding GPIO_EN bit is also set)
40 register "alt_gp_smi_en" = "0x0000"
41 register "gpi1_routing" = "2"
Nicolas Reineckeb0922f02015-02-01 02:53:35 +010042 register "gpi13_routing" = "2"
Zaolina823f9b2014-05-06 21:31:45 +020043
Nicolas Reinecke6ccc3462014-08-23 01:06:33 +020044 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock)
Zaolina823f9b2014-05-06 21:31:45 +020045 register "sata_port_map" = "0x1f"
46 # Set max SATA speed to 6.0 Gb/s
47 register "sata_interface_speed_support" = "0x3"
48
49 register "gen1_dec" = "0x7c1601"
50 register "gen2_dec" = "0x0c15e1"
51 register "gen4_dec" = "0x0c06a1"
52
53 # Enable zero-based linear PCIe root port functions
Angel Ponsaf4bd562021-12-28 13:05:56 +010054 register "pcie_port_coalesce" = "true"
Zaolina823f9b2014-05-06 21:31:45 +020055
Vladimir Serbinenko36fa5b82014-10-28 23:43:20 +010056 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
57
Patrick Rudolphc670a412017-04-28 17:28:32 +020058 register "spi_uvscc" = "0x2005"
59 register "spi_lvscc" = "0x2005"
60
Felix Singer63e77652024-01-13 23:05:42 +010061 device ref mei1 on end
Arthur Heymansb5df65a2022-11-12 14:51:49 +010062 device ref mei2 off end
63 device ref me_ide_r off end
64 device ref me_kt off end
Felix Singer63e77652024-01-13 23:05:42 +010065 device ref gbe on
Peter Lemenkova0c97592019-11-27 15:15:27 +010066 subsystemid 0x17aa 0x21ce
67 end
Felix Singer63e77652024-01-13 23:05:42 +010068 device ref ehci2 on end
69 device ref hda on end
70 device ref pcie_rp1 off end
71 device ref pcie_rp2 on end # Integrated Wireless LAN
72 device ref pcie_rp3 off end
Arthur Heymansb5df65a2022-11-12 14:51:49 +010073 device ref pcie_rp4 on
Patrick Rudolph05216322019-04-12 16:14:27 +020074 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Felix Singer63e77652024-01-13 23:05:42 +010075 end
76 device ref pcie_rp5 on end # MMC/SDXC + IEEE1394
77 device ref pcie_rp6 off end # Intel Ethernet PHY
78 device ref pcie_rp7 off end
79 device ref pcie_rp8 off end
80 device ref ehci1 on end
81 device ref lpc on
Zaolina823f9b2014-05-06 21:31:45 +020082 chip ec/lenovo/pmh7
Peter Lemenkova0c97592019-11-27 15:15:27 +010083 device pnp ff.1 on end # dummy
Elyes Haouasaf933362023-03-19 08:01:53 +010084 register "backlight_enable" = "true"
85 register "dock_event_enable" = "true"
Zaolina823f9b2014-05-06 21:31:45 +020086 end
87
Philipp Deppenwiese3d02b9c2015-06-03 23:09:36 +020088 chip drivers/pc80/tpm
89 device pnp 0c31.0 on end
90 end
91
Zaolina823f9b2014-05-06 21:31:45 +020092 chip ec/lenovo/h8
93 device pnp ff.2 on # dummy
94 io 0x60 = 0x62
95 io 0x62 = 0x66
96 io 0x64 = 0x1600
97 io 0x66 = 0x1604
98 end
99
100 register "config0" = "0xa7"
101 register "config1" = "0x09"
102 register "config2" = "0xa0"
103 register "config3" = "0xc2"
104
Zaolina823f9b2014-05-06 21:31:45 +0200105 register "beepmask0" = "0x00"
106 register "beepmask1" = "0x86"
107 register "has_power_management_beeps" = "0"
108 register "event2_enable" = "0xff"
109 register "event3_enable" = "0xff"
110 register "event4_enable" = "0xd0"
111 register "event5_enable" = "0xfc"
112 register "event6_enable" = "0x00"
113 register "event7_enable" = "0x01"
114 register "event8_enable" = "0x7b"
115 register "event9_enable" = "0xff"
116 register "eventa_enable" = "0x01"
117 register "eventb_enable" = "0x00"
118 register "eventc_enable" = "0xff"
119 register "eventd_enable" = "0xff"
120 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200121
122 register "has_bdc_detection" = "1"
123 register "bdc_gpio_num" = "54"
124 register "bdc_gpio_lvl" = "0"
Zaolina823f9b2014-05-06 21:31:45 +0200125 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200126 chip drivers/lenovo/hybrid_graphics
127 device pnp ff.f on end # dummy
128
129 register "detect_gpio" = "21"
130
131 register "has_panel_hybrid_gpio" = "1"
132 register "panel_hybrid_gpio" = "52"
133 register "panel_integrated_lvl" = "1"
134
135 register "has_backlight_gpio" = "0"
136 register "has_dgpu_power_gpio" = "0"
137
138 register "has_thinker1" = "1"
139 end
Felix Singer63e77652024-01-13 23:05:42 +0100140 end
141 device ref sata1 on end
142 device ref smbus on
Elyes HAOUASb0f19882018-06-09 11:59:00 +0200143 # eeprom, 8 virtual devices, same chip
Zaolina823f9b2014-05-06 21:31:45 +0200144 chip drivers/i2c/at24rf08c
145 device i2c 54 on end
146 device i2c 55 on end
147 device i2c 56 on end
148 device i2c 57 on end
149 device i2c 5c on end
150 device i2c 5d on end
151 device i2c 5e on end
152 device i2c 5f on end
153 end
Felix Singer63e77652024-01-13 23:05:42 +0100154 end
155 device ref sata2 off end
156 device ref thermal off end
Zaolina823f9b2014-05-06 21:31:45 +0200157 end
158 end
159end