blob: 7ca25d0a39633fa7a20a63441ef2077444fdbe30 [file] [log] [blame]
Felix Held4a8cd722020-04-18 22:26:39 +02001# SPDX-License-Identifier: BSD-3-Clause
Felix Held4a8cd722020-04-18 22:26:39 +02002
Martin Roth1f337622019-04-22 16:08:31 -06003ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
Martin Roth5c354b92019-04-22 14:55:16 -06004
Martin Rothc7acf162020-05-28 00:44:50 -06005subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
Kangheui Wone20bc462021-04-06 16:55:48 +10006subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage
Martin Roth5c354b92019-04-22 14:55:16 -06007
Felix Helde7a02022020-12-10 02:05:47 +01008# Beware that all-y also adds the compilation unit to verstage on PSP
Felix Held40744592020-12-09 16:12:41 +01009all-y += aoac.c
Felix Held46cd1b52023-04-01 01:21:27 +020010all-y += config.c
11all-y += i2c.c
Felix Held1a341af2020-12-05 01:18:10 +010012
Felix Heldf008e0a2023-04-01 01:31:24 +020013# all_x86-y adds the compilation unit to all stages that run on the x86 cores
14all_x86-y += gpio.c
15all_x86-y += uart.c
16
Felix Held187f59a2020-12-08 02:25:05 +010017bootblock-y += early_fch.c
Felix Held46673222020-04-04 02:37:04 +020018
Felix Helddd737142021-03-26 00:44:35 +010019romstage-y += fsp_m_params.c
Felix Heldaefcab72021-07-19 15:13:40 +020020romstage-y += romstage.c
Martin Roth5c354b92019-04-22 14:55:16 -060021
Felix Heldaefcab72021-07-19 15:13:40 +020022ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
23ramstage-$(CONFIG_HAVE_ACPI_TABLES) += agesa_acpi.c
Martin Roth5c354b92019-04-22 14:55:16 -060024ramstage-y += chip.c
25ramstage-y += cpu.c
Felix Held187f59a2020-12-08 02:25:05 +010026ramstage-y += fch.c
Felix Held793f3712021-03-26 00:13:51 +010027ramstage-y += fsp_s_params.c
Martin Roth86ba0d72020-02-05 16:46:30 -070028ramstage-y += graphics.c
Felix Heldaefcab72021-07-19 15:13:40 +020029ramstage-y += mca.c
Furquan Shaikhcff479e2020-07-08 15:47:19 -070030ramstage-y += pcie_gpp.c
Felix Heldaefcab72021-07-19 15:13:40 +020031ramstage-y += root_complex.c
32ramstage-y += sata.c
33ramstage-y += soc_util.c
Raul E Rangel0357ab72020-07-09 12:08:58 -060034ramstage-y += xhci.c
Martin Roth5c354b92019-04-22 14:55:16 -060035
Martin Roth5c354b92019-04-22 14:55:16 -060036smm-y += smihandler.c
Felix Held9412b3e2020-06-18 15:54:43 +020037ifeq ($(CONFIG_DEBUG_SMI),y)
38smm-y += uart.c
Felix Held9412b3e2020-06-18 15:54:43 +020039endif
Martin Roth5c354b92019-04-22 14:55:16 -060040smm-y += gpio.c
41
Martin Rothd7e3ead2019-04-22 16:32:58 -060042CPPFLAGS_common += -I$(src)/soc/amd/picasso/include
43CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi
Marshall Dawson00a22082020-01-20 23:05:31 -070044CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
Martin Roth0f3ef702020-10-06 18:11:12 -060045CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
Konrad Adamczyk86dfcb82023-06-28 12:23:08 +000046CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
Martin Roth5c354b92019-04-22 14:55:16 -060047
Robert Ziebab26d0052022-01-24 16:37:47 -070048# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
49# Building the cbfs image will fail if the offset isn't large enough
50AMD_FW_AB_POSITION := 0x40
51
52PICASSO_FW_A_POSITION=$(call int-add, \
Matt DeVillier163dbdd2023-06-29 16:56:09 -050053 $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION))
Robert Ziebab26d0052022-01-24 16:37:47 -070054
55PICASSO_FW_B_POSITION=$(call int-add, \
Matt DeVillier163dbdd2023-06-29 16:56:09 -050056 $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION))
Robert Ziebab26d0052022-01-24 16:37:47 -070057
Marshall Dawson62611412019-06-19 11:46:06 -060058#
59# PSP Directory Table items
60#
61# Certain ordering requirements apply, however these are ensured by amdfwtool.
62# For more information see "AMD Platform Security Processor BIOS Architecture
63# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
64#
65
Furquan Shaikh577db022020-04-24 15:52:04 -070066ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
Furquan Shaikh318e5832020-04-24 14:04:07 -070067# Enable secure debug unlock
68PSP_SOFTFUSE_BITS += 0
Zheng Baoc5e28ab2020-10-28 11:38:09 +080069OPT_TOKEN_UNLOCK="--token-unlock"
Furquan Shaikh577db022020-04-24 15:52:04 -070070endif
Martin Roth5c354b92019-04-22 14:55:16 -060071
Marshall Dawson62611412019-06-19 11:46:06 -060072ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
Zheng Baoc5e28ab2020-10-28 11:38:09 +080073OPT_PSP_LOAD_MP2_FW="--load-mp2-fw"
Marshall Dawson62611412019-06-19 11:46:06 -060074else
Furquan Shaikh318e5832020-04-24 14:04:07 -070075# Disable MP2 firmware loading
76PSP_SOFTFUSE_BITS += 29
Martin Roth5c354b92019-04-22 14:55:16 -060077endif
78
Martin Rothfdad5ad2021-04-16 11:36:01 -060079# Use additional Soft Fuse bits specified in Kconfig
Zheng Bao17022bb2021-05-13 22:38:05 +080080PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS))
Martin Rothfdad5ad2021-04-16 11:36:01 -060081
Marshall Dawson62611412019-06-19 11:46:06 -060082ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y)
Zheng Baoc5e28ab2020-10-28 11:38:09 +080083OPT_PSP_LOAD_S0I3_FW="--load-s0i3"
Marshall Dawson62611412019-06-19 11:46:06 -060084endif
85
Marshall Dawson62611412019-06-19 11:46:06 -060086# type = 0x3a
87ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
88PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
89endif
Marshall Dawson62611412019-06-19 11:46:06 -060090#
91# BIOS Directory Table items - proper ordering is managed by amdfwtool
92#
93
Ritul Guru80503e32022-08-29 13:39:09 +053094# type = 0x4
95# The flashmap section used for this is expected to be named PSP_NVRAM
Matt DeVillier163dbdd2023-06-29 16:56:09 -050096PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START)
97PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE)
Ritul Guru80503e32022-08-29 13:39:09 +053098
Ritul Gurueb5c3ad2022-08-02 15:27:56 +053099# type = 0x7
100# RSA 2048 signature
101#ifeq ($(CONFIG_PSP_PLATFORM_SECURE_BOOT),y)
102PSP_BIOS_SIG_SIZE=0x100
103#endif
104
Marshall Dawson62611412019-06-19 11:46:06 -0600105# type = 0x60
Rob Barnesb2545cc2020-09-09 13:19:09 -0600106PSP_APCB_FILES=$(APCB_SOURCES)
Marshall Dawson62611412019-06-19 11:46:06 -0600107
108# type = 0x61
Marshall Dawsonb7687232020-01-20 19:56:30 -0700109PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS)
Marshall Dawson62611412019-06-19 11:46:06 -0600110
111# type = 0x62
112PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
Felix Held46673222020-04-04 02:37:04 +0200113PSP_ELF_FILE=$(objcbfs)/bootblock.elf
Arthur Heymansdf096802022-04-19 21:46:20 +0200114PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}')
115PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
Fred Reitberger2a1fc732023-07-17 09:09:42 -0400116
117ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y)
Marshall Dawsonb7687232020-01-20 19:56:30 -0700118# type = 0x63 - construct APOB NV base/size from flash map
Felix Held77a63ef2020-09-22 01:23:54 +0200119# The flashmap section used for this is expected to be named RW_MRC_CACHE
Matt DeVillier163dbdd2023-06-29 16:56:09 -0500120APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE)
121APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START)
Fred Reitberger2a1fc732023-07-17 09:09:42 -0400122endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE
Marshall Dawson62611412019-06-19 11:46:06 -0600123
Martin Roth362eaf32020-06-14 10:38:32 -0600124ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
125# type = 0x6B - PSP Shared memory location
126ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0)
127PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE)
Raul E Rangel42c5b012021-03-05 11:17:13 -0700128PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map)
Martin Roth362eaf32020-06-14 10:38:32 -0600129endif
130
131# type = 0x52 - PSP Bootloader Userspace Application (verstage)
Martin Rothde498332020-09-01 11:00:28 -0600132PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE))
Martin Rothfe87d762020-09-01 11:04:21 -0600133PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN))
Martin Roth362eaf32020-06-14 10:38:32 -0600134endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK
135
Furquan Shaikh318e5832020-04-24 14:04:07 -0700136
137# Helper function to return a value with given bit set
Martin Rothfdad5ad2021-04-16 11:36:01 -0600138# Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions.
Furquan Shaikh318e5832020-04-24 14:04:07 -0700139set-bit=$(call int-shift-left, 1 $(call _toint,$1))
140PSP_SOFTFUSE=$(shell A=$(call int-add, \
Matt DeVillier0daefa52023-10-30 20:58:41 -0500141 $(foreach bit,$(sort $(PSP_SOFTFUSE_BITS)),$(call set-bit,$(bit)))); printf "0x%x" $$A)
Furquan Shaikh318e5832020-04-24 14:04:07 -0700142
Marshall Dawson62611412019-06-19 11:46:06 -0600143#
144# Build the arguments to amdfwtool (order is unimportant). Missing file names
145# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
146#
147
Martin Roth5c354b92019-04-22 14:55:16 -0600148add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
149
Ritul Guru80503e32022-08-29 13:39:09 +0530150OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base)
151OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
152
Martin Roth362eaf32020-06-14 10:38:32 -0600153OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage)
Martin Rothfe87d762020-09-01 11:04:21 -0600154OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
Marshall Dawson62611412019-06-19 11:46:06 -0600155
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600156OPT_PSP_APCB_FILES=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \
157 $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \
Zheng Bao5caca942020-12-04 16:39:38 +0800158 --instance $(shell printf "%x" $$(($(i)-1))) --apcb ) )
159OPT_PSP_APCB_FILES_BK=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \
160 $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \
161 --instance $(shell printf "1%x" $$(($(i)-1))) --apcb ) )
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600162
Marshall Dawson62611412019-06-19 11:46:06 -0600163OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
164OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
165OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
166OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800167
Ritul Gurueb5c3ad2022-08-02 15:27:56 +0530168OPT_PSP_BIOS_SIG_SIZE=$(call add_opt_prefix, $(PSP_BIOS_SIG_SIZE), --bios-sig-size)
Martin Roth362eaf32020-06-14 10:38:32 -0600169OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
170OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
Martin Roth6e5f9092020-06-25 17:31:54 -0600171OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size)
172OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base)
Matt Papageorge95c42c32020-07-08 11:33:48 -0500173OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
174OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
175OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag)
Martin Roth5c354b92019-04-22 14:55:16 -0600176
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800177OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
178
Martin Rothe2d0ba02020-07-29 16:37:57 -0600179ifeq ($(CONFIG_VBOOT),)
180OPT_APOB0_NV_SIZE=$(OPT_APOB_NV_SIZE)
181OPT_APOB0_NV_BASE=$(OPT_APOB_NV_BASE)
182endif
183
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800184OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
185
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800186AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
Ritul Guru80503e32022-08-29 13:39:09 +0530187 $(OPT_PSP_NVRAM_BASE) \
188 $(OPT_PSP_NVRAM_SIZE) \
Zheng Bao5caca942020-12-04 16:39:38 +0800189 $(OPT_PSP_APCB_FILES_BK) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600190 $(OPT_APOB_ADDR) \
Martin Roth0acf59d2023-03-08 15:18:24 -0700191 $(OPT_DEBUG_AMDFWTOOL) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600192 $(OPT_PSP_BIOSBIN_FILE) \
193 $(OPT_PSP_BIOSBIN_DEST) \
194 $(OPT_PSP_BIOSBIN_SIZE) \
Ritul Gurueb5c3ad2022-08-02 15:27:56 +0530195 $(OPT_PSP_BIOS_SIG_SIZE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600196 $(OPT_PSP_SOFTFUSE) \
Felix Heldb03dc9c2021-02-12 21:59:47 +0100197 --use-pspsecureos \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800198 $(OPT_PSP_LOAD_MP2_FW) \
199 $(OPT_PSP_LOAD_S0I3_FW) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600200 $(OPT_WHITELIST_FILE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600201 $(OPT_PSP_SHAREDMEM_BASE) \
202 $(OPT_PSP_SHAREDMEM_SIZE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600203 $(OPT_TOKEN_UNLOCK) \
Matt Papageorge95c42c32020-07-08 11:33:48 -0500204 $(OPT_EFS_SPI_READ_MODE) \
205 $(OPT_EFS_SPI_SPEED) \
206 $(OPT_EFS_SPI_MICRON_FLAG) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800207 --config $(CONFIG_AMDFW_CONFIG_FILE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600208 --flashsize $(CONFIG_ROM_SIZE)
209
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800210$(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
Martin Roth362eaf32020-06-14 10:38:32 -0600211 $(PSP_VERSTAGE_FILE) \
Martin Rothfe87d762020-09-01 11:04:21 -0600212 $(PSP_VERSTAGE_SIG_FILE) \
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600213 $$(PSP_APCB_FILES) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800214 $(DEP_FILES) \
Marshall Dawsonb7687232020-01-20 19:56:30 -0700215 $(AMDFWTOOL) \
Raul E Rangel42c5b012021-03-05 11:17:13 -0700216 $(obj)/fmap_config.h \
217 $(objcbfs)/bootblock.elf # this target also creates the .map file
Rob Barnesb2545cc2020-09-09 13:19:09 -0600218 $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set))
Martin Roth5c354b92019-04-22 14:55:16 -0600219 rm -f $@
220 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
221 $(AMDFWTOOL) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600222 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600223 $(OPT_APOB0_NV_SIZE) \
224 $(OPT_APOB0_NV_BASE) \
Martin Roth7c4956d2020-09-01 11:05:53 -0600225 $(OPT_VERSTAGE_FILE) \
Martin Rothfe87d762020-09-01 11:04:21 -0600226 $(OPT_VERSTAGE_SIG_FILE) \
Zheng Bao6bc06982023-02-14 13:26:31 +0800227 --location $(CONFIG_AMD_FWM_POSITION) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600228 --output $@
Martin Roth5c354b92019-04-22 14:55:16 -0600229
Felix Held46673222020-04-04 02:37:04 +0200230$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
Marshall Dawson62611412019-06-19 11:46:06 -0600231 rm -f $@
232 @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
Felix Held46673222020-04-04 02:37:04 +0200233 $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
Marshall Dawson62611412019-06-19 11:46:06 -0600234 --maxsize $(PSP_BIOSBIN_SIZE)
235
Martin Roth9aa8d112020-06-04 21:31:41 -0600236$(obj)/amdfw_a.rom: $(obj)/amdfw.rom
237 rm -f $@
238 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
239 $(AMDFWTOOL) \
240 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600241 $(OPT_APOB_NV_SIZE) \
242 $(OPT_APOB_NV_BASE) \
Fred Reitbergere66ce2f2023-07-05 15:43:19 -0400243 --location $(call _tohex,$(PICASSO_FW_A_POSITION)) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600244 --anywhere \
245 --output $@
246
247$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
248 rm -f $@
249 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
250 $(AMDFWTOOL) \
251 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600252 $(OPT_APOB_NV_SIZE) \
253 $(OPT_APOB_NV_BASE) \
Fred Reitbergere66ce2f2023-07-05 15:43:19 -0400254 --location $(call _tohex,$(PICASSO_FW_B_POSITION)) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600255 --anywhere \
256 --output $@
257
Matt DeVillierf9fea862022-10-04 16:41:28 -0500258ifeq ($(CONFIG_VBOOT_SLOTS_RW_A)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
Martin Roth9aa8d112020-06-04 21:31:41 -0600259cbfs-files-y += apu/amdfw_a
260apu/amdfw_a-file := $(obj)/amdfw_a.rom
Robert Ziebab26d0052022-01-24 16:37:47 -0700261apu/amdfw_a-position := $(AMD_FW_AB_POSITION)
Martin Roth9aa8d112020-06-04 21:31:41 -0600262apu/amdfw_a-type := raw
Matt DeVillierf9fea862022-10-04 16:41:28 -0500263endif
Martin Roth9aa8d112020-06-04 21:31:41 -0600264
Matt DeVillierf9fea862022-10-04 16:41:28 -0500265ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
Martin Roth9aa8d112020-06-04 21:31:41 -0600266cbfs-files-y += apu/amdfw_b
267apu/amdfw_b-file := $(obj)/amdfw_b.rom
Robert Ziebab26d0052022-01-24 16:37:47 -0700268apu/amdfw_b-position := $(AMD_FW_AB_POSITION)
Martin Roth9aa8d112020-06-04 21:31:41 -0600269apu/amdfw_b-type := raw
270endif
271
Martin Roth1f337622019-04-22 16:08:31 -0600272endif # ($(CONFIG_SOC_AMD_PICASSO),y)