Felix Held | 4a8cd72 | 2020-04-18 22:26:39 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: BSD-3-Clause |
Felix Held | 4a8cd72 | 2020-04-18 22:26:39 +0200 | [diff] [blame] | 2 | |
Martin Roth | 1f33762 | 2019-04-22 16:08:31 -0600 | [diff] [blame] | 3 | ifeq ($(CONFIG_SOC_AMD_PICASSO),y) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 4 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 5 | subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage |
Kangheui Won | e20bc46 | 2021-04-06 16:55:48 +1000 | [diff] [blame] | 6 | subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 7 | |
Felix Held | e7a0202 | 2020-12-10 02:05:47 +0100 | [diff] [blame] | 8 | # Beware that all-y also adds the compilation unit to verstage on PSP |
Felix Held | 4074459 | 2020-12-09 16:12:41 +0100 | [diff] [blame] | 9 | all-y += aoac.c |
Felix Held | 46cd1b5 | 2023-04-01 01:21:27 +0200 | [diff] [blame] | 10 | all-y += config.c |
| 11 | all-y += i2c.c |
Felix Held | 1a341af | 2020-12-05 01:18:10 +0100 | [diff] [blame] | 12 | |
Felix Held | f008e0a | 2023-04-01 01:31:24 +0200 | [diff] [blame] | 13 | # all_x86-y adds the compilation unit to all stages that run on the x86 cores |
| 14 | all_x86-y += gpio.c |
| 15 | all_x86-y += uart.c |
| 16 | |
Felix Held | 187f59a | 2020-12-08 02:25:05 +0100 | [diff] [blame] | 17 | bootblock-y += early_fch.c |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 18 | |
Felix Held | dd73714 | 2021-03-26 00:44:35 +0100 | [diff] [blame] | 19 | romstage-y += fsp_m_params.c |
Felix Held | aefcab7 | 2021-07-19 15:13:40 +0200 | [diff] [blame] | 20 | romstage-y += romstage.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 21 | |
Felix Held | aefcab7 | 2021-07-19 15:13:40 +0200 | [diff] [blame] | 22 | ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c |
| 23 | ramstage-$(CONFIG_HAVE_ACPI_TABLES) += agesa_acpi.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 24 | ramstage-y += chip.c |
| 25 | ramstage-y += cpu.c |
Felix Held | 187f59a | 2020-12-08 02:25:05 +0100 | [diff] [blame] | 26 | ramstage-y += fch.c |
Felix Held | 793f371 | 2021-03-26 00:13:51 +0100 | [diff] [blame] | 27 | ramstage-y += fsp_s_params.c |
Martin Roth | 86ba0d7 | 2020-02-05 16:46:30 -0700 | [diff] [blame] | 28 | ramstage-y += graphics.c |
Felix Held | aefcab7 | 2021-07-19 15:13:40 +0200 | [diff] [blame] | 29 | ramstage-y += mca.c |
Furquan Shaikh | cff479e | 2020-07-08 15:47:19 -0700 | [diff] [blame] | 30 | ramstage-y += pcie_gpp.c |
Felix Held | aefcab7 | 2021-07-19 15:13:40 +0200 | [diff] [blame] | 31 | ramstage-y += root_complex.c |
| 32 | ramstage-y += sata.c |
| 33 | ramstage-y += soc_util.c |
Raul E Rangel | 0357ab7 | 2020-07-09 12:08:58 -0600 | [diff] [blame] | 34 | ramstage-y += xhci.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 35 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 36 | smm-y += smihandler.c |
Felix Held | 9412b3e | 2020-06-18 15:54:43 +0200 | [diff] [blame] | 37 | ifeq ($(CONFIG_DEBUG_SMI),y) |
| 38 | smm-y += uart.c |
Felix Held | 9412b3e | 2020-06-18 15:54:43 +0200 | [diff] [blame] | 39 | endif |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 40 | smm-y += gpio.c |
| 41 | |
Martin Roth | d7e3ead | 2019-04-22 16:32:58 -0600 | [diff] [blame] | 42 | CPPFLAGS_common += -I$(src)/soc/amd/picasso/include |
| 43 | CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi |
Marshall Dawson | 00a2208 | 2020-01-20 23:05:31 -0700 | [diff] [blame] | 44 | CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso |
Martin Roth | 0f3ef70 | 2020-10-06 18:11:12 -0600 | [diff] [blame] | 45 | CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include |
Konrad Adamczyk | 86dfcb8 | 2023-06-28 12:23:08 +0000 | [diff] [blame] | 46 | CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 47 | |
| 48 | # ROMSIG Normally At ROMBASE + 0x20000 |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 49 | # +-----------+---------------+----------------+------------+ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 50 | # |0x55AA55AA | | | | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 51 | # +-----------+---------------+----------------+------------+ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 52 | # | | PSPDIR ADDR | BIOSDIR ADDR | |
| 53 | # +-----------+---------------+----------------+ |
| 54 | |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 55 | # 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes |
| 56 | # Building the cbfs image will fail if the offset isn't large enough |
| 57 | AMD_FW_AB_POSITION := 0x40 |
| 58 | |
| 59 | PICASSO_FW_A_POSITION=$(call int-add, \ |
Matt DeVillier | 163dbdd | 2023-06-29 16:56:09 -0500 | [diff] [blame] | 60 | $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION)) |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 61 | |
| 62 | PICASSO_FW_B_POSITION=$(call int-add, \ |
Matt DeVillier | 163dbdd | 2023-06-29 16:56:09 -0500 | [diff] [blame] | 63 | $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION)) |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 64 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 65 | # |
| 66 | # PSP Directory Table items |
| 67 | # |
| 68 | # Certain ordering requirements apply, however these are ensured by amdfwtool. |
| 69 | # For more information see "AMD Platform Security Processor BIOS Architecture |
| 70 | # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). |
| 71 | # |
| 72 | |
Furquan Shaikh | 577db02 | 2020-04-24 15:52:04 -0700 | [diff] [blame] | 73 | ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y) |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 74 | # Enable secure debug unlock |
| 75 | PSP_SOFTFUSE_BITS += 0 |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 76 | OPT_TOKEN_UNLOCK="--token-unlock" |
Furquan Shaikh | 577db02 | 2020-04-24 15:52:04 -0700 | [diff] [blame] | 77 | endif |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 78 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 79 | ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 80 | OPT_PSP_LOAD_MP2_FW="--load-mp2-fw" |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 81 | else |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 82 | # Disable MP2 firmware loading |
| 83 | PSP_SOFTFUSE_BITS += 29 |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 84 | endif |
| 85 | |
Martin Roth | fdad5ad | 2021-04-16 11:36:01 -0600 | [diff] [blame] | 86 | # Use additional Soft Fuse bits specified in Kconfig |
Zheng Bao | 17022bb | 2021-05-13 22:38:05 +0800 | [diff] [blame] | 87 | PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS)) |
Martin Roth | fdad5ad | 2021-04-16 11:36:01 -0600 | [diff] [blame] | 88 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 89 | ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 90 | OPT_PSP_LOAD_S0I3_FW="--load-s0i3" |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 91 | endif |
| 92 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 93 | # type = 0x3a |
| 94 | ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) |
| 95 | PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) |
| 96 | endif |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 97 | # |
| 98 | # BIOS Directory Table items - proper ordering is managed by amdfwtool |
| 99 | # |
| 100 | |
Ritul Guru | 80503e3 | 2022-08-29 13:39:09 +0530 | [diff] [blame] | 101 | # type = 0x4 |
| 102 | # The flashmap section used for this is expected to be named PSP_NVRAM |
Matt DeVillier | 163dbdd | 2023-06-29 16:56:09 -0500 | [diff] [blame] | 103 | PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START) |
| 104 | PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE) |
Ritul Guru | 80503e3 | 2022-08-29 13:39:09 +0530 | [diff] [blame] | 105 | |
Ritul Guru | eb5c3ad | 2022-08-02 15:27:56 +0530 | [diff] [blame] | 106 | # type = 0x7 |
| 107 | # RSA 2048 signature |
| 108 | #ifeq ($(CONFIG_PSP_PLATFORM_SECURE_BOOT),y) |
| 109 | PSP_BIOS_SIG_SIZE=0x100 |
| 110 | #endif |
| 111 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 112 | # type = 0x60 |
Rob Barnes | b2545cc | 2020-09-09 13:19:09 -0600 | [diff] [blame] | 113 | PSP_APCB_FILES=$(APCB_SOURCES) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 114 | |
| 115 | # type = 0x61 |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 116 | PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 117 | |
| 118 | # type = 0x62 |
| 119 | PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 120 | PSP_ELF_FILE=$(objcbfs)/bootblock.elf |
Arthur Heymans | df09680 | 2022-04-19 21:46:20 +0200 | [diff] [blame] | 121 | PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}') |
| 122 | PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}') |
Fred Reitberger | 2a1fc73 | 2023-07-17 09:09:42 -0400 | [diff] [blame] | 123 | |
| 124 | ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y) |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 125 | # type = 0x63 - construct APOB NV base/size from flash map |
Felix Held | 77a63ef | 2020-09-22 01:23:54 +0200 | [diff] [blame] | 126 | # The flashmap section used for this is expected to be named RW_MRC_CACHE |
Matt DeVillier | 163dbdd | 2023-06-29 16:56:09 -0500 | [diff] [blame] | 127 | APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE) |
| 128 | APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) |
Fred Reitberger | 2a1fc73 | 2023-07-17 09:09:42 -0400 | [diff] [blame] | 129 | endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 130 | |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 131 | ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) |
| 132 | # type = 0x6B - PSP Shared memory location |
| 133 | ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0) |
| 134 | PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE) |
Raul E Rangel | 42c5b01 | 2021-03-05 11:17:13 -0700 | [diff] [blame] | 135 | PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map) |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 136 | endif |
| 137 | |
| 138 | # type = 0x52 - PSP Bootloader Userspace Application (verstage) |
Martin Roth | de49833 | 2020-09-01 11:00:28 -0600 | [diff] [blame] | 139 | PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE)) |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 140 | PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN)) |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 141 | endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK |
| 142 | |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 143 | |
| 144 | # Helper function to return a value with given bit set |
Martin Roth | fdad5ad | 2021-04-16 11:36:01 -0600 | [diff] [blame] | 145 | # Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions. |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 146 | set-bit=$(call int-shift-left, 1 $(call _toint,$1)) |
| 147 | PSP_SOFTFUSE=$(shell A=$(call int-add, \ |
| 148 | $(foreach bit,$(PSP_SOFTFUSE_BITS),$(call set-bit,$(bit)))); printf "0x%x" $$A) |
| 149 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 150 | # |
| 151 | # Build the arguments to amdfwtool (order is unimportant). Missing file names |
| 152 | # result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool. |
| 153 | # |
| 154 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 155 | add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) |
| 156 | |
Ritul Guru | 80503e3 | 2022-08-29 13:39:09 +0530 | [diff] [blame] | 157 | OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) |
| 158 | OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size) |
| 159 | |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 160 | OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 161 | OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 162 | |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 163 | OPT_PSP_APCB_FILES=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \ |
| 164 | $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \ |
Zheng Bao | 5caca94 | 2020-12-04 16:39:38 +0800 | [diff] [blame] | 165 | --instance $(shell printf "%x" $$(($(i)-1))) --apcb ) ) |
| 166 | OPT_PSP_APCB_FILES_BK=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \ |
| 167 | $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \ |
| 168 | --instance $(shell printf "1%x" $$(($(i)-1))) --apcb ) ) |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 169 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 170 | OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base) |
| 171 | OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin) |
| 172 | OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest) |
| 173 | OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 174 | |
Ritul Guru | eb5c3ad | 2022-08-02 15:27:56 +0530 | [diff] [blame] | 175 | OPT_PSP_BIOS_SIG_SIZE=$(call add_opt_prefix, $(PSP_BIOS_SIG_SIZE), --bios-sig-size) |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 176 | OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem) |
| 177 | OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size) |
Martin Roth | 6e5f909 | 2020-06-25 17:31:54 -0600 | [diff] [blame] | 178 | OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size) |
| 179 | OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base) |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 180 | OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode) |
| 181 | OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed) |
| 182 | OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 183 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 184 | OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse) |
| 185 | |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 186 | ifeq ($(CONFIG_VBOOT),) |
| 187 | OPT_APOB0_NV_SIZE=$(OPT_APOB_NV_SIZE) |
| 188 | OPT_APOB0_NV_BASE=$(OPT_APOB_NV_BASE) |
| 189 | endif |
| 190 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 191 | OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) |
| 192 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 193 | AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ |
Ritul Guru | 80503e3 | 2022-08-29 13:39:09 +0530 | [diff] [blame] | 194 | $(OPT_PSP_NVRAM_BASE) \ |
| 195 | $(OPT_PSP_NVRAM_SIZE) \ |
Zheng Bao | 5caca94 | 2020-12-04 16:39:38 +0800 | [diff] [blame] | 196 | $(OPT_PSP_APCB_FILES_BK) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 197 | $(OPT_APOB_ADDR) \ |
Martin Roth | 0acf59d | 2023-03-08 15:18:24 -0700 | [diff] [blame] | 198 | $(OPT_DEBUG_AMDFWTOOL) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 199 | $(OPT_PSP_BIOSBIN_FILE) \ |
| 200 | $(OPT_PSP_BIOSBIN_DEST) \ |
| 201 | $(OPT_PSP_BIOSBIN_SIZE) \ |
Ritul Guru | eb5c3ad | 2022-08-02 15:27:56 +0530 | [diff] [blame] | 202 | $(OPT_PSP_BIOS_SIG_SIZE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 203 | $(OPT_PSP_SOFTFUSE) \ |
Felix Held | b03dc9c | 2021-02-12 21:59:47 +0100 | [diff] [blame] | 204 | --use-pspsecureos \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 205 | $(OPT_PSP_LOAD_MP2_FW) \ |
| 206 | $(OPT_PSP_LOAD_S0I3_FW) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 207 | $(OPT_WHITELIST_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 208 | $(OPT_PSP_SHAREDMEM_BASE) \ |
| 209 | $(OPT_PSP_SHAREDMEM_SIZE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 210 | $(OPT_TOKEN_UNLOCK) \ |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 211 | $(OPT_EFS_SPI_READ_MODE) \ |
| 212 | $(OPT_EFS_SPI_SPEED) \ |
| 213 | $(OPT_EFS_SPI_MICRON_FLAG) \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 214 | --config $(CONFIG_AMDFW_CONFIG_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 215 | --flashsize $(CONFIG_ROM_SIZE) |
| 216 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 217 | $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 218 | $(PSP_VERSTAGE_FILE) \ |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 219 | $(PSP_VERSTAGE_SIG_FILE) \ |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 220 | $$(PSP_APCB_FILES) \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 221 | $(DEP_FILES) \ |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 222 | $(AMDFWTOOL) \ |
Raul E Rangel | 42c5b01 | 2021-03-05 11:17:13 -0700 | [diff] [blame] | 223 | $(obj)/fmap_config.h \ |
| 224 | $(objcbfs)/bootblock.elf # this target also creates the .map file |
Rob Barnes | b2545cc | 2020-09-09 13:19:09 -0600 | [diff] [blame] | 225 | $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set)) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 226 | rm -f $@ |
| 227 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 228 | $(AMDFWTOOL) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 229 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 230 | $(OPT_APOB0_NV_SIZE) \ |
| 231 | $(OPT_APOB0_NV_BASE) \ |
Martin Roth | 7c4956d | 2020-09-01 11:05:53 -0600 | [diff] [blame] | 232 | $(OPT_VERSTAGE_FILE) \ |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 233 | $(OPT_VERSTAGE_SIG_FILE) \ |
Zheng Bao | 6bc0698 | 2023-02-14 13:26:31 +0800 | [diff] [blame^] | 234 | --location $(CONFIG_AMD_FWM_POSITION) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 235 | --output $@ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 236 | |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 237 | $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 238 | rm -f $@ |
| 239 | @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n" |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 240 | $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 241 | --maxsize $(PSP_BIOSBIN_SIZE) |
| 242 | |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 243 | $(obj)/amdfw_a.rom: $(obj)/amdfw.rom |
| 244 | rm -f $@ |
| 245 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 246 | $(AMDFWTOOL) \ |
| 247 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 248 | $(OPT_APOB_NV_SIZE) \ |
| 249 | $(OPT_APOB_NV_BASE) \ |
Fred Reitberger | e66ce2f | 2023-07-05 15:43:19 -0400 | [diff] [blame] | 250 | --location $(call _tohex,$(PICASSO_FW_A_POSITION)) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 251 | --anywhere \ |
| 252 | --output $@ |
| 253 | |
| 254 | $(obj)/amdfw_b.rom: $(obj)/amdfw.rom |
| 255 | rm -f $@ |
| 256 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 257 | $(AMDFWTOOL) \ |
| 258 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 259 | $(OPT_APOB_NV_SIZE) \ |
| 260 | $(OPT_APOB_NV_BASE) \ |
Fred Reitberger | e66ce2f | 2023-07-05 15:43:19 -0400 | [diff] [blame] | 261 | --location $(call _tohex,$(PICASSO_FW_B_POSITION)) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 262 | --anywhere \ |
| 263 | --output $@ |
| 264 | |
Matt DeVillier | f9fea86 | 2022-10-04 16:41:28 -0500 | [diff] [blame] | 265 | ifeq ($(CONFIG_VBOOT_SLOTS_RW_A)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 266 | cbfs-files-y += apu/amdfw_a |
| 267 | apu/amdfw_a-file := $(obj)/amdfw_a.rom |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 268 | apu/amdfw_a-position := $(AMD_FW_AB_POSITION) |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 269 | apu/amdfw_a-type := raw |
Matt DeVillier | f9fea86 | 2022-10-04 16:41:28 -0500 | [diff] [blame] | 270 | endif |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 271 | |
Matt DeVillier | f9fea86 | 2022-10-04 16:41:28 -0500 | [diff] [blame] | 272 | ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 273 | cbfs-files-y += apu/amdfw_b |
| 274 | apu/amdfw_b-file := $(obj)/amdfw_b.rom |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 275 | apu/amdfw_b-position := $(AMD_FW_AB_POSITION) |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 276 | apu/amdfw_b-type := raw |
| 277 | endif |
| 278 | |
Martin Roth | 1f33762 | 2019-04-22 16:08:31 -0600 | [diff] [blame] | 279 | endif # ($(CONFIG_SOC_AMD_PICASSO),y) |