Felix Held | 4a8cd72 | 2020-04-18 22:26:39 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: BSD-3-Clause |
Felix Held | 4a8cd72 | 2020-04-18 22:26:39 +0200 | [diff] [blame] | 2 | |
Martin Roth | 1f33762 | 2019-04-22 16:08:31 -0600 | [diff] [blame] | 3 | ifeq ($(CONFIG_SOC_AMD_PICASSO),y) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 4 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 5 | subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage |
Kangheui Won | e20bc46 | 2021-04-06 16:55:48 +1000 | [diff] [blame] | 6 | subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 7 | |
Felix Held | e7a0202 | 2020-12-10 02:05:47 +0100 | [diff] [blame] | 8 | # Beware that all-y also adds the compilation unit to verstage on PSP |
Felix Held | 4074459 | 2020-12-09 16:12:41 +0100 | [diff] [blame] | 9 | all-y += aoac.c |
Felix Held | 46cd1b5 | 2023-04-01 01:21:27 +0200 | [diff] [blame] | 10 | all-y += config.c |
| 11 | all-y += i2c.c |
Felix Held | 1a341af | 2020-12-05 01:18:10 +0100 | [diff] [blame] | 12 | |
Felix Held | f008e0a | 2023-04-01 01:31:24 +0200 | [diff] [blame] | 13 | # all_x86-y adds the compilation unit to all stages that run on the x86 cores |
| 14 | all_x86-y += gpio.c |
| 15 | all_x86-y += uart.c |
| 16 | |
Felix Held | 187f59a | 2020-12-08 02:25:05 +0100 | [diff] [blame] | 17 | bootblock-y += early_fch.c |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 18 | |
Felix Held | dd73714 | 2021-03-26 00:44:35 +0100 | [diff] [blame] | 19 | romstage-y += fsp_m_params.c |
Felix Held | aefcab7 | 2021-07-19 15:13:40 +0200 | [diff] [blame] | 20 | romstage-y += romstage.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 21 | |
Felix Held | aefcab7 | 2021-07-19 15:13:40 +0200 | [diff] [blame] | 22 | ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c |
| 23 | ramstage-$(CONFIG_HAVE_ACPI_TABLES) += agesa_acpi.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 24 | ramstage-y += chip.c |
| 25 | ramstage-y += cpu.c |
Felix Held | 187f59a | 2020-12-08 02:25:05 +0100 | [diff] [blame] | 26 | ramstage-y += fch.c |
Felix Held | 793f371 | 2021-03-26 00:13:51 +0100 | [diff] [blame] | 27 | ramstage-y += fsp_s_params.c |
Martin Roth | 86ba0d7 | 2020-02-05 16:46:30 -0700 | [diff] [blame] | 28 | ramstage-y += graphics.c |
Felix Held | aefcab7 | 2021-07-19 15:13:40 +0200 | [diff] [blame] | 29 | ramstage-y += mca.c |
Furquan Shaikh | cff479e | 2020-07-08 15:47:19 -0700 | [diff] [blame] | 30 | ramstage-y += pcie_gpp.c |
Felix Held | aefcab7 | 2021-07-19 15:13:40 +0200 | [diff] [blame] | 31 | ramstage-y += root_complex.c |
| 32 | ramstage-y += sata.c |
| 33 | ramstage-y += soc_util.c |
Raul E Rangel | 0357ab7 | 2020-07-09 12:08:58 -0600 | [diff] [blame] | 34 | ramstage-y += xhci.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 35 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 36 | smm-y += smihandler.c |
Felix Held | 9412b3e | 2020-06-18 15:54:43 +0200 | [diff] [blame] | 37 | ifeq ($(CONFIG_DEBUG_SMI),y) |
| 38 | smm-y += uart.c |
Felix Held | 9412b3e | 2020-06-18 15:54:43 +0200 | [diff] [blame] | 39 | endif |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 40 | smm-y += gpio.c |
| 41 | |
Martin Roth | d7e3ead | 2019-04-22 16:32:58 -0600 | [diff] [blame] | 42 | CPPFLAGS_common += -I$(src)/soc/amd/picasso/include |
| 43 | CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi |
Marshall Dawson | 00a2208 | 2020-01-20 23:05:31 -0700 | [diff] [blame] | 44 | CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso |
Martin Roth | 0f3ef70 | 2020-10-06 18:11:12 -0600 | [diff] [blame] | 45 | CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 46 | |
| 47 | # ROMSIG Normally At ROMBASE + 0x20000 |
| 48 | # Overridden by CONFIG_AMD_FWM_POSITION_INDEX |
| 49 | # +-----------+---------------+----------------+------------+ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 50 | # |0x55AA55AA | | | | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 51 | # +-----------+---------------+----------------+------------+ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 52 | # | | PSPDIR ADDR | BIOSDIR ADDR | |
| 53 | # +-----------+---------------+----------------+ |
| 54 | |
Zheng Bao | 8516c21 | 2021-01-23 10:09:00 +0800 | [diff] [blame] | 55 | $(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\ |
| 56 | $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size)) |
| 57 | |
Marshall Dawson | bc4c903 | 2019-06-11 12:18:20 -0600 | [diff] [blame] | 58 | PICASSO_FWM_POSITION=$(call int-add, \ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 59 | $(call int-subtract, 0xffffffff \ |
| 60 | $(call int-shift-left, \ |
| 61 | 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) |
| 62 | |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 63 | # 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes |
| 64 | # Building the cbfs image will fail if the offset isn't large enough |
| 65 | AMD_FW_AB_POSITION := 0x40 |
| 66 | |
| 67 | PICASSO_FW_A_POSITION=$(call int-add, \ |
Matt DeVillier | 163dbdd | 2023-06-29 16:56:09 -0500 | [diff] [blame^] | 68 | $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION)) |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 69 | |
| 70 | PICASSO_FW_B_POSITION=$(call int-add, \ |
Matt DeVillier | 163dbdd | 2023-06-29 16:56:09 -0500 | [diff] [blame^] | 71 | $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION)) |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 72 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 73 | # |
| 74 | # PSP Directory Table items |
| 75 | # |
| 76 | # Certain ordering requirements apply, however these are ensured by amdfwtool. |
| 77 | # For more information see "AMD Platform Security Processor BIOS Architecture |
| 78 | # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). |
| 79 | # |
| 80 | |
Furquan Shaikh | 577db02 | 2020-04-24 15:52:04 -0700 | [diff] [blame] | 81 | ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y) |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 82 | # Enable secure debug unlock |
| 83 | PSP_SOFTFUSE_BITS += 0 |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 84 | OPT_TOKEN_UNLOCK="--token-unlock" |
Furquan Shaikh | 577db02 | 2020-04-24 15:52:04 -0700 | [diff] [blame] | 85 | endif |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 86 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 87 | ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 88 | OPT_PSP_LOAD_MP2_FW="--load-mp2-fw" |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 89 | else |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 90 | # Disable MP2 firmware loading |
| 91 | PSP_SOFTFUSE_BITS += 29 |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 92 | endif |
| 93 | |
Martin Roth | fdad5ad | 2021-04-16 11:36:01 -0600 | [diff] [blame] | 94 | # Use additional Soft Fuse bits specified in Kconfig |
Zheng Bao | 17022bb | 2021-05-13 22:38:05 +0800 | [diff] [blame] | 95 | PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS)) |
Martin Roth | fdad5ad | 2021-04-16 11:36:01 -0600 | [diff] [blame] | 96 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 97 | ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 98 | OPT_PSP_LOAD_S0I3_FW="--load-s0i3" |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 99 | endif |
| 100 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 101 | # type = 0x3a |
| 102 | ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) |
| 103 | PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) |
| 104 | endif |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 105 | # |
| 106 | # BIOS Directory Table items - proper ordering is managed by amdfwtool |
| 107 | # |
| 108 | |
Ritul Guru | 80503e3 | 2022-08-29 13:39:09 +0530 | [diff] [blame] | 109 | # type = 0x4 |
| 110 | # The flashmap section used for this is expected to be named PSP_NVRAM |
Matt DeVillier | 163dbdd | 2023-06-29 16:56:09 -0500 | [diff] [blame^] | 111 | PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START) |
| 112 | PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE) |
Ritul Guru | 80503e3 | 2022-08-29 13:39:09 +0530 | [diff] [blame] | 113 | |
Ritul Guru | eb5c3ad | 2022-08-02 15:27:56 +0530 | [diff] [blame] | 114 | # type = 0x7 |
| 115 | # RSA 2048 signature |
| 116 | #ifeq ($(CONFIG_PSP_PLATFORM_SECURE_BOOT),y) |
| 117 | PSP_BIOS_SIG_SIZE=0x100 |
| 118 | #endif |
| 119 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 120 | # type = 0x60 |
Rob Barnes | b2545cc | 2020-09-09 13:19:09 -0600 | [diff] [blame] | 121 | PSP_APCB_FILES=$(APCB_SOURCES) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 122 | |
| 123 | # type = 0x61 |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 124 | PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 125 | |
| 126 | # type = 0x62 |
| 127 | PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 128 | PSP_ELF_FILE=$(objcbfs)/bootblock.elf |
Arthur Heymans | df09680 | 2022-04-19 21:46:20 +0200 | [diff] [blame] | 129 | PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}') |
| 130 | PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}') |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 131 | # type = 0x63 - construct APOB NV base/size from flash map |
Felix Held | 77a63ef | 2020-09-22 01:23:54 +0200 | [diff] [blame] | 132 | # The flashmap section used for this is expected to be named RW_MRC_CACHE |
Matt DeVillier | 163dbdd | 2023-06-29 16:56:09 -0500 | [diff] [blame^] | 133 | APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE) |
| 134 | APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 135 | |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 136 | ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) |
| 137 | # type = 0x6B - PSP Shared memory location |
| 138 | ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0) |
| 139 | PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE) |
Raul E Rangel | 42c5b01 | 2021-03-05 11:17:13 -0700 | [diff] [blame] | 140 | PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map) |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 141 | endif |
| 142 | |
| 143 | # type = 0x52 - PSP Bootloader Userspace Application (verstage) |
Martin Roth | de49833 | 2020-09-01 11:00:28 -0600 | [diff] [blame] | 144 | PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE)) |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 145 | PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN)) |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 146 | endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK |
| 147 | |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 148 | |
| 149 | # Helper function to return a value with given bit set |
Martin Roth | fdad5ad | 2021-04-16 11:36:01 -0600 | [diff] [blame] | 150 | # Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions. |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 151 | set-bit=$(call int-shift-left, 1 $(call _toint,$1)) |
| 152 | PSP_SOFTFUSE=$(shell A=$(call int-add, \ |
| 153 | $(foreach bit,$(PSP_SOFTFUSE_BITS),$(call set-bit,$(bit)))); printf "0x%x" $$A) |
| 154 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 155 | # |
| 156 | # Build the arguments to amdfwtool (order is unimportant). Missing file names |
| 157 | # result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool. |
| 158 | # |
| 159 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 160 | add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) |
| 161 | |
Ritul Guru | 80503e3 | 2022-08-29 13:39:09 +0530 | [diff] [blame] | 162 | OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) |
| 163 | OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size) |
| 164 | |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 165 | OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 166 | OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 167 | |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 168 | OPT_PSP_APCB_FILES=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \ |
| 169 | $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \ |
Zheng Bao | 5caca94 | 2020-12-04 16:39:38 +0800 | [diff] [blame] | 170 | --instance $(shell printf "%x" $$(($(i)-1))) --apcb ) ) |
| 171 | OPT_PSP_APCB_FILES_BK=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \ |
| 172 | $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \ |
| 173 | --instance $(shell printf "1%x" $$(($(i)-1))) --apcb ) ) |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 174 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 175 | OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base) |
| 176 | OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin) |
| 177 | OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest) |
| 178 | OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 179 | |
Ritul Guru | eb5c3ad | 2022-08-02 15:27:56 +0530 | [diff] [blame] | 180 | OPT_PSP_BIOS_SIG_SIZE=$(call add_opt_prefix, $(PSP_BIOS_SIG_SIZE), --bios-sig-size) |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 181 | OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem) |
| 182 | OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size) |
Martin Roth | 6e5f909 | 2020-06-25 17:31:54 -0600 | [diff] [blame] | 183 | OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size) |
| 184 | OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base) |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 185 | OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode) |
| 186 | OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed) |
| 187 | OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 188 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 189 | OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse) |
| 190 | |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 191 | ifeq ($(CONFIG_VBOOT),) |
| 192 | OPT_APOB0_NV_SIZE=$(OPT_APOB_NV_SIZE) |
| 193 | OPT_APOB0_NV_BASE=$(OPT_APOB_NV_BASE) |
| 194 | endif |
| 195 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 196 | OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) |
| 197 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 198 | AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ |
Ritul Guru | 80503e3 | 2022-08-29 13:39:09 +0530 | [diff] [blame] | 199 | $(OPT_PSP_NVRAM_BASE) \ |
| 200 | $(OPT_PSP_NVRAM_SIZE) \ |
Zheng Bao | 5caca94 | 2020-12-04 16:39:38 +0800 | [diff] [blame] | 201 | $(OPT_PSP_APCB_FILES_BK) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 202 | $(OPT_APOB_ADDR) \ |
Martin Roth | 0acf59d | 2023-03-08 15:18:24 -0700 | [diff] [blame] | 203 | $(OPT_DEBUG_AMDFWTOOL) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 204 | $(OPT_PSP_BIOSBIN_FILE) \ |
| 205 | $(OPT_PSP_BIOSBIN_DEST) \ |
| 206 | $(OPT_PSP_BIOSBIN_SIZE) \ |
Ritul Guru | eb5c3ad | 2022-08-02 15:27:56 +0530 | [diff] [blame] | 207 | $(OPT_PSP_BIOS_SIG_SIZE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 208 | $(OPT_PSP_SOFTFUSE) \ |
Felix Held | b03dc9c | 2021-02-12 21:59:47 +0100 | [diff] [blame] | 209 | --use-pspsecureos \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 210 | $(OPT_PSP_LOAD_MP2_FW) \ |
| 211 | $(OPT_PSP_LOAD_S0I3_FW) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 212 | $(OPT_WHITELIST_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 213 | $(OPT_PSP_SHAREDMEM_BASE) \ |
| 214 | $(OPT_PSP_SHAREDMEM_SIZE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 215 | $(OPT_TOKEN_UNLOCK) \ |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 216 | $(OPT_EFS_SPI_READ_MODE) \ |
| 217 | $(OPT_EFS_SPI_SPEED) \ |
| 218 | $(OPT_EFS_SPI_MICRON_FLAG) \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 219 | --config $(CONFIG_AMDFW_CONFIG_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 220 | --flashsize $(CONFIG_ROM_SIZE) |
| 221 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 222 | $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 223 | $(PSP_VERSTAGE_FILE) \ |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 224 | $(PSP_VERSTAGE_SIG_FILE) \ |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 225 | $$(PSP_APCB_FILES) \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 226 | $(DEP_FILES) \ |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 227 | $(AMDFWTOOL) \ |
Raul E Rangel | 42c5b01 | 2021-03-05 11:17:13 -0700 | [diff] [blame] | 228 | $(obj)/fmap_config.h \ |
| 229 | $(objcbfs)/bootblock.elf # this target also creates the .map file |
Rob Barnes | b2545cc | 2020-09-09 13:19:09 -0600 | [diff] [blame] | 230 | $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set)) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 231 | rm -f $@ |
| 232 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 233 | $(AMDFWTOOL) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 234 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 235 | $(OPT_APOB0_NV_SIZE) \ |
| 236 | $(OPT_APOB0_NV_BASE) \ |
Martin Roth | 7c4956d | 2020-09-01 11:05:53 -0600 | [diff] [blame] | 237 | $(OPT_VERSTAGE_FILE) \ |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 238 | $(OPT_VERSTAGE_SIG_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 239 | --location $(shell printf "%#x" $(PICASSO_FWM_POSITION)) \ |
| 240 | --output $@ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 241 | |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 242 | $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 243 | rm -f $@ |
| 244 | @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n" |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 245 | $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 246 | --maxsize $(PSP_BIOSBIN_SIZE) |
| 247 | |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 248 | $(obj)/amdfw_a.rom: $(obj)/amdfw.rom |
| 249 | rm -f $@ |
| 250 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 251 | $(AMDFWTOOL) \ |
| 252 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 253 | $(OPT_APOB_NV_SIZE) \ |
| 254 | $(OPT_APOB_NV_BASE) \ |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 255 | --location $(shell printf "%#x" $(PICASSO_FW_A_POSITION)) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 256 | --anywhere \ |
| 257 | --output $@ |
| 258 | |
| 259 | $(obj)/amdfw_b.rom: $(obj)/amdfw.rom |
| 260 | rm -f $@ |
| 261 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 262 | $(AMDFWTOOL) \ |
| 263 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 264 | $(OPT_APOB_NV_SIZE) \ |
| 265 | $(OPT_APOB_NV_BASE) \ |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 266 | --location $(shell printf "%#x" $(PICASSO_FW_B_POSITION)) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 267 | --anywhere \ |
| 268 | --output $@ |
| 269 | |
Matt DeVillier | f9fea86 | 2022-10-04 16:41:28 -0500 | [diff] [blame] | 270 | ifeq ($(CONFIG_VBOOT_SLOTS_RW_A)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 271 | cbfs-files-y += apu/amdfw_a |
| 272 | apu/amdfw_a-file := $(obj)/amdfw_a.rom |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 273 | apu/amdfw_a-position := $(AMD_FW_AB_POSITION) |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 274 | apu/amdfw_a-type := raw |
Matt DeVillier | f9fea86 | 2022-10-04 16:41:28 -0500 | [diff] [blame] | 275 | endif |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 276 | |
Matt DeVillier | f9fea86 | 2022-10-04 16:41:28 -0500 | [diff] [blame] | 277 | ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 278 | cbfs-files-y += apu/amdfw_b |
| 279 | apu/amdfw_b-file := $(obj)/amdfw_b.rom |
Robert Zieba | b26d005 | 2022-01-24 16:37:47 -0700 | [diff] [blame] | 280 | apu/amdfw_b-position := $(AMD_FW_AB_POSITION) |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 281 | apu/amdfw_b-type := raw |
| 282 | endif |
| 283 | |
Martin Roth | 1f33762 | 2019-04-22 16:08:31 -0600 | [diff] [blame] | 284 | endif # ($(CONFIG_SOC_AMD_PICASSO),y) |