commit | 42c5b010b6b2d8da75322fc7044fe77edf6a46f8 | [log] [tgz] |
---|---|---|
author | Raul E Rangel <rrangel@chromium.org> | Fri Mar 05 11:17:13 2021 -0700 |
committer | Martin Roth <martinroth@google.com> | Wed Mar 10 23:32:46 2021 +0000 |
tree | 8b335f0c377a98a7078a3aac331b43e7c21ecea0 | |
parent | a37ec522e121550245d64cc8ac76cbf4c19c96ce [diff] |
soc/amd/picasso: Fix PSP_SHAREDMEM_BASE PSP_SHAREDMEM_BASE made the assumption that _psp_sharedmem_dram would only match once. With CB:49332 there are now two symbols, and it was grabbing the wrong one. This change makes it so we match the exact symbol. It also switches to using awk to simplify the code. The bootblock.elf target that is added to the list of prerequisites also creates the bootblock.map file that gets used to extract the base address of the _psp_sharedmem_dram symbol. BUG=b:181354692 TEST=Boot zork past bootblock Fixes: 82d16b150ce3 ("memlayout: Store region sizes as separate symbols") Suggested-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Raul E Rangel <rrangel@chromium.org> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I79675bd73f964282b54bca858830e26de64037c7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51300 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.