Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
| 3 | chip soc/intel/skylake |
| 4 | |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 5 | register "PmConfigSlpS3MinAssert" = "SLP_S3_MIN_ASSERT_50MS" |
| 6 | register "PmConfigSlpS4MinAssert" = "SLP_S4_MIN_ASSERT_4S" |
| 7 | register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S" |
| 8 | register "PmConfigSlpAMinAssert" = "SLP_A_MIN_ASSERT_2S" |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 9 | register "PmConfigPwrCycDur" = "RESET_POWER_CYCLE_4S" |
| 10 | |
| 11 | # VR Settings Configuration for 2 Domains |
| 12 | #+----------------+-------+-------+ |
| 13 | #| Domain/Setting | VCC | VCCGT | |
| 14 | #+----------------+-------+-------+ |
| 15 | #| Psi1Threshold | 20A | 20A | |
| 16 | #| Psi2Threshold | 5A | 5A | |
| 17 | #| Psi3Threshold | 1A | 1A | |
| 18 | #| Psi3Enable | 1 | 1 | |
| 19 | #| Psi4Enable | 1 | 1 | |
| 20 | #| ImonSlope | 0 | 0 | |
| 21 | #| ImonOffset | 0 | 0 | |
| 22 | #| IccMax | 55A | 35A | |
| 23 | #| VrVoltageLimit | 1.52V | 1.52V | |
| 24 | #| AcLoadline | 2.1 | 3.1 | |
| 25 | #| DcLoadline | 2.1 | 3.1 | |
| 26 | #+----------------+-------+-------+ |
| 27 | register "domain_vr_config[VR_IA_CORE]" = "{ |
| 28 | .vr_config_enable = 1, |
| 29 | .psi1threshold = VR_CFG_AMP(20), |
| 30 | .psi2threshold = VR_CFG_AMP(5), |
| 31 | .psi3threshold = VR_CFG_AMP(1), |
| 32 | .psi3enable = 1, |
| 33 | .psi4enable = 1, |
| 34 | .imon_slope = 0x0, |
| 35 | .imon_offset = 0x0, |
| 36 | .icc_max = VR_CFG_AMP(55), |
| 37 | .voltage_limit = 1520, |
| 38 | .ac_loadline = 210, |
| 39 | .dc_loadline = 210, |
| 40 | }" |
| 41 | |
| 42 | register "domain_vr_config[VR_GT_UNSLICED]" = "{ |
| 43 | .vr_config_enable = 1, |
| 44 | .psi1threshold = VR_CFG_AMP(20), |
| 45 | .psi2threshold = VR_CFG_AMP(5), |
| 46 | .psi3threshold = VR_CFG_AMP(1), |
| 47 | .psi3enable = 1, |
| 48 | .psi4enable = 1, |
| 49 | .imon_slope = 0x0, |
| 50 | .imon_offset = 0x0, |
| 51 | .icc_max = VR_CFG_AMP(35), |
| 52 | .voltage_limit = 1520, |
| 53 | .ac_loadline = 310, |
| 54 | .dc_loadline = 310, |
| 55 | }" |
| 56 | |
| 57 | # Vendor set Psys Pmax to 30W |
| 58 | register "power_limits_config" = "{ |
| 59 | .psys_pmax = 30, |
| 60 | }" |
| 61 | |
| 62 | # TODO |
| 63 | # Send an extra VR mailbox command for the PS4 exit issue |
| 64 | register "SendVrMbxCmd" = "2" |
| 65 | |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 66 | device domain 0 on |
Felix Singer | 49dc285 | 2023-11-12 17:43:45 +0000 | [diff] [blame] | 67 | device ref igpu on end |
| 68 | device ref gmm on end |
| 69 | device ref south_xhci on |
Felix Singer | eb1a2bd | 2023-10-23 08:30:02 +0200 | [diff] [blame] | 70 | register "usb2_ports" = "{ |
| 71 | [0] = USB2_PORT_LONG(OC0), |
| 72 | [1] = USB2_PORT_LONG(OC0), |
| 73 | [2] = USB2_PORT_LONG(OC1), |
| 74 | [3] = USB2_PORT_LONG(OC1), |
| 75 | [4] = USB2_PORT_LONG(OC2), /* Debug */ |
| 76 | }" |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 77 | end |
Felix Singer | 49dc285 | 2023-11-12 17:43:45 +0000 | [diff] [blame] | 78 | device ref thermal on end |
| 79 | device ref heci1 on end |
| 80 | device ref sata on |
Felix Singer | eb1a2bd | 2023-10-23 08:30:02 +0200 | [diff] [blame] | 81 | register "SataSalpSupport" = "1" |
| 82 | register "SataPortsEnable" = "{ |
| 83 | [0] = 1, |
| 84 | [1] = 1, |
| 85 | [2] = 1, |
| 86 | }" |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 87 | end |
Felix Singer | 49dc285 | 2023-11-12 17:43:45 +0000 | [diff] [blame] | 88 | device ref pcie_rp9 on |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 89 | register "PcieRpEnable[8]" = "1" |
| 90 | end |
Felix Singer | 49dc285 | 2023-11-12 17:43:45 +0000 | [diff] [blame] | 91 | device ref pcie_rp10 on |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 92 | register "PcieRpEnable[9]" = "1" |
| 93 | end |
Felix Singer | 49dc285 | 2023-11-12 17:43:45 +0000 | [diff] [blame] | 94 | device ref pcie_rp11 on |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 95 | register "PcieRpEnable[10]" = "1" |
| 96 | end |
Felix Singer | 49dc285 | 2023-11-12 17:43:45 +0000 | [diff] [blame] | 97 | device ref lpc_espi on |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 98 | register "serirq_mode" = "SERIRQ_CONTINUOUS" |
| 99 | |
| 100 | # EC/kempld at 0xa80/0xa81 |
| 101 | register "gen1_dec" = "0x00000a81" |
| 102 | |
| 103 | chip drivers/pc80/tpm |
| 104 | device pnp 0c31.0 on end |
| 105 | end |
| 106 | chip ec/kontron/kempld |
| 107 | register "uart[0]" = "{ KEMPLD_UART_3F8, 4 }" |
| 108 | device generic 0.0 on end # UART #0 |
| 109 | end |
| 110 | end |
Felix Singer | 49dc285 | 2023-11-12 17:43:45 +0000 | [diff] [blame] | 111 | device ref smbus on |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 112 | chip drivers/i2c/nct7802y |
| 113 | device i2c 0x2e on end |
| 114 | end |
| 115 | end |
Felix Singer | 49dc285 | 2023-11-12 17:43:45 +0000 | [diff] [blame] | 116 | device ref fast_spi on end |
| 117 | device ref gbe on end |
Nico Huber | 0ccfa68 | 2017-04-20 15:36:46 +0200 | [diff] [blame] | 118 | end |
| 119 | end |