blob: 1de8ab30b3e522d38c860685148dd3e13e8e94ef [file] [log] [blame]
Angel Ponsa2ee7612020-04-04 18:51:15 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Gabe Blackd40be112013-10-09 23:45:07 -07002
Aaron Durbinbc98cc62015-09-02 09:21:36 -05003#include <bootmode.h>
Gabe Blackd40be112013-10-09 23:45:07 -07004#include <console/console.h>
5#include <device/device.h>
6#include <soc/nvidia/tegra/dc.h>
Tom Warren64982c502014-01-23 13:37:50 -07007#include <soc/display.h>
Julius Wernerf0d21ff32014-10-20 13:24:14 -07008#include <soc/sdram.h>
Julius Wernerec5e5e02014-08-20 15:29:56 -07009#include <symbols.h>
Gabe Blackd40be112013-10-09 23:45:07 -070010
Julius Wernerf0d21ff32014-10-20 13:24:14 -070011#include "chip.h"
12
Gabe Blackd40be112013-10-09 23:45:07 -070013/* this sucks, but for now, fb size/location are hardcoded.
14 * Will break if we get 2. Sigh.
15 * We assume it's all multiples of MiB for MMUs sake.
16 */
Furquan Shaikhbcac1cb2020-05-13 12:19:15 -070017static void soc_read_resources(struct device *dev)
Gabe Blackd40be112013-10-09 23:45:07 -070018{
Kyösti Mälkki7c600682022-07-01 18:50:26 +030019 uint64_t lcdbase = fb_base_mb();
20 uint64_t fb_size = FB_SIZE_MB;
Tom Warren64982c502014-01-23 13:37:50 -070021
Kyösti Mälkkia08f5092021-06-26 14:28:42 +030022 ram_from_to(dev, 0, (uintptr_t)_dram, (sdram_max_addressable_mb() - fb_size) * MiB);
23 mmio_range(dev, 1, lcdbase * MiB, fb_size * MiB);
Gabe Black5cbbc702014-02-08 05:17:38 -080024
Kyösti Mälkki7c600682022-07-01 18:50:26 +030025 ram_from_to(dev, 2, sdram_max_addressable_mb() * (uint64_t)MiB,
Kyösti Mälkkia08f5092021-06-26 14:28:42 +030026 (uintptr_t)_dram + sdram_size_mb() * (uint64_t)MiB);
Gabe Blackd40be112013-10-09 23:45:07 -070027}
28
Elyes HAOUAS3fcb2182018-05-25 10:03:57 +020029static void soc_init(struct device *dev)
Gabe Blackd40be112013-10-09 23:45:07 -070030{
Aaron Durbinbc98cc62015-09-02 09:21:36 -050031 if (display_init_required())
Gabe Black042f8492014-03-31 21:01:14 -070032 display_startup(dev);
Aaron Durbinbc98cc62015-09-02 09:21:36 -050033 else
34 printk(BIOS_INFO, "Skipping display init.\n");
Gabe Blackd40be112013-10-09 23:45:07 -070035 printk(BIOS_INFO, "CPU: Tegra124\n");
36}
37
Gabe Blackd40be112013-10-09 23:45:07 -070038static struct device_operations soc_ops = {
Furquan Shaikhbcac1cb2020-05-13 12:19:15 -070039 .read_resources = soc_read_resources,
Nico Huber2f8ba692020-04-05 14:05:24 +020040 .set_resources = noop_set_resources,
Gabe Blackd40be112013-10-09 23:45:07 -070041 .init = soc_init,
Gabe Blackd40be112013-10-09 23:45:07 -070042};
43
Elyes HAOUAS3fcb2182018-05-25 10:03:57 +020044static void enable_tegra124_dev(struct device *dev)
Gabe Blackd40be112013-10-09 23:45:07 -070045{
46 dev->ops = &soc_ops;
47}
48
49struct chip_operations soc_nvidia_tegra124_ops = {
Nicholas Sudsgaardbfb11be2024-01-30 09:53:46 +090050 .name = "SOC Nvidia Tegra124",
Gabe Blackd40be112013-10-09 23:45:07 -070051 .enable_dev = enable_tegra124_dev,
52};