blob: 270e5e54e6eb5d0582c8a8f624a2cad99c14b3ef [file] [log] [blame]
Angel Ponsa2ee7612020-04-04 18:51:15 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Gabe Blackd40be112013-10-09 23:45:07 -07003
Aaron Durbinbc98cc62015-09-02 09:21:36 -05004#include <bootmode.h>
Gabe Blackd40be112013-10-09 23:45:07 -07005#include <console/console.h>
6#include <device/device.h>
7#include <soc/nvidia/tegra/dc.h>
Tom Warren64982c502014-01-23 13:37:50 -07008#include <soc/display.h>
Julius Wernerf0d21ff32014-10-20 13:24:14 -07009#include <soc/sdram.h>
Julius Wernerec5e5e02014-08-20 15:29:56 -070010#include <symbols.h>
Gabe Blackd40be112013-10-09 23:45:07 -070011
Julius Wernerf0d21ff32014-10-20 13:24:14 -070012#include "chip.h"
13
Gabe Blackd40be112013-10-09 23:45:07 -070014/* this sucks, but for now, fb size/location are hardcoded.
15 * Will break if we get 2. Sigh.
16 * We assume it's all multiples of MiB for MMUs sake.
17 */
Elyes HAOUAS3fcb2182018-05-25 10:03:57 +020018static void soc_enable(struct device *dev)
Gabe Blackd40be112013-10-09 23:45:07 -070019{
Tom Warren64982c502014-01-23 13:37:50 -070020 u32 lcdbase = fb_base_mb();
Gabe Blackd40be112013-10-09 23:45:07 -070021 unsigned long fb_size = FB_SIZE_MB;
Tom Warren64982c502014-01-23 13:37:50 -070022
Julius Wernerec5e5e02014-08-20 15:29:56 -070023 ram_resource(dev, 0, (uintptr_t)_dram/KiB,
Gabe Black5cbbc702014-02-08 05:17:38 -080024 (sdram_max_addressable_mb() - fb_size)*KiB -
Julius Wernerec5e5e02014-08-20 15:29:56 -070025 (uintptr_t)_dram/KiB);
Gabe Blackd40be112013-10-09 23:45:07 -070026 mmio_resource(dev, 1, lcdbase*KiB, fb_size*KiB);
Gabe Black5cbbc702014-02-08 05:17:38 -080027
Julius Wernerec5e5e02014-08-20 15:29:56 -070028 u32 sdram_end_mb = sdram_size_mb() + (uintptr_t)_dram/MiB;
Gabe Black5cbbc702014-02-08 05:17:38 -080029
30 if (sdram_end_mb > sdram_max_addressable_mb())
31 ram_resource(dev, 2, sdram_max_addressable_mb()*KiB,
32 (sdram_end_mb - sdram_max_addressable_mb())*KiB);
Gabe Blackd40be112013-10-09 23:45:07 -070033}
34
Elyes HAOUAS3fcb2182018-05-25 10:03:57 +020035static void soc_init(struct device *dev)
Gabe Blackd40be112013-10-09 23:45:07 -070036{
Aaron Durbinbc98cc62015-09-02 09:21:36 -050037 if (display_init_required())
Gabe Black042f8492014-03-31 21:01:14 -070038 display_startup(dev);
Aaron Durbinbc98cc62015-09-02 09:21:36 -050039 else
40 printk(BIOS_INFO, "Skipping display init.\n");
Gabe Blackd40be112013-10-09 23:45:07 -070041 printk(BIOS_INFO, "CPU: Tegra124\n");
42}
43
Gabe Blackd40be112013-10-09 23:45:07 -070044static struct device_operations soc_ops = {
Edward O'Callaghan0625a8b2014-10-31 08:03:16 +110045 .read_resources = DEVICE_NOOP,
46 .set_resources = DEVICE_NOOP,
Gabe Blackd40be112013-10-09 23:45:07 -070047 .enable_resources = soc_enable,
48 .init = soc_init,
Gabe Blackd40be112013-10-09 23:45:07 -070049};
50
Elyes HAOUAS3fcb2182018-05-25 10:03:57 +020051static void enable_tegra124_dev(struct device *dev)
Gabe Blackd40be112013-10-09 23:45:07 -070052{
53 dev->ops = &soc_ops;
54}
55
56struct chip_operations soc_nvidia_tegra124_ops = {
57 CHIP_NAME("SOC Nvidia Tegra124")
58 .enable_dev = enable_tegra124_dev,
59};