Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2015 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 17 | #include <device/pci_ids.h> |
Patrick Rudolph | e56189c | 2018-04-18 10:11:59 +0200 | [diff] [blame] | 18 | #include <device/pci_ops.h> |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 19 | #include <fsp/api.h> |
| 20 | #include <soc/ramstage.h> |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 21 | #include <soc/vr_config.h> |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 22 | #include <console/console.h> |
Patrick Rudolph | 69e826d | 2019-08-14 10:23:30 +0200 | [diff] [blame] | 23 | #include <intelblocks/cpulib.h> |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 24 | |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 25 | /* Default values for domain configuration. PSI3 and PSI4 are disabled. */ |
| 26 | static const struct vr_config default_configs[NUM_VR_DOMAINS] = { |
| 27 | [VR_SYSTEM_AGENT] = { |
| 28 | .vr_config_enable = 1, |
| 29 | .psi1threshold = VR_CFG_AMP(20), |
| 30 | .psi2threshold = VR_CFG_AMP(4), |
| 31 | .psi3threshold = VR_CFG_AMP(1), |
| 32 | .psi3enable = 0, |
| 33 | .psi4enable = 0, |
| 34 | .imon_slope = 0x0, |
| 35 | .imon_offset = 0x0, |
| 36 | .icc_max = VR_CFG_AMP(7), |
| 37 | .voltage_limit = 1520, |
| 38 | }, |
| 39 | [VR_IA_CORE] = { |
| 40 | .vr_config_enable = 1, |
| 41 | .psi1threshold = VR_CFG_AMP(20), |
| 42 | .psi2threshold = VR_CFG_AMP(5), |
| 43 | .psi3threshold = VR_CFG_AMP(1), |
| 44 | .psi3enable = 0, |
| 45 | .psi4enable = 0, |
| 46 | .imon_slope = 0x0, |
| 47 | .imon_offset = 0x0, |
| 48 | .icc_max = VR_CFG_AMP(34), |
| 49 | .voltage_limit = 1520, |
| 50 | }, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 51 | #if CONFIG(PLATFORM_USES_FSP1_1) |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 52 | [VR_RING] = { |
| 53 | .vr_config_enable = 1, |
| 54 | .psi1threshold = VR_CFG_AMP(20), |
| 55 | .psi2threshold = VR_CFG_AMP(5), |
| 56 | .psi3threshold = VR_CFG_AMP(1), |
| 57 | .psi3enable = 0, |
| 58 | .psi4enable = 0, |
| 59 | .imon_slope = 0x0, |
| 60 | .imon_offset = 0x0, |
| 61 | .icc_max = VR_CFG_AMP(34), |
| 62 | .voltage_limit = 1520, |
| 63 | }, |
Duncan Laurie | 4fa8a6f | 2017-03-14 16:37:55 -0700 | [diff] [blame] | 64 | #endif |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 65 | [VR_GT_UNSLICED] = { |
| 66 | .vr_config_enable = 1, |
| 67 | .psi1threshold = VR_CFG_AMP(20), |
| 68 | .psi2threshold = VR_CFG_AMP(5), |
| 69 | .psi3threshold = VR_CFG_AMP(1), |
| 70 | .psi3enable = 0, |
| 71 | .psi4enable = 0, |
| 72 | .imon_slope = 0x0, |
| 73 | .imon_offset = 0x0, |
| 74 | .icc_max = VR_CFG_AMP(35), |
| 75 | .voltage_limit = 1520, |
| 76 | }, |
| 77 | [VR_GT_SLICED] = { |
| 78 | .vr_config_enable = 1, |
| 79 | .psi1threshold = VR_CFG_AMP(20), |
| 80 | .psi2threshold = VR_CFG_AMP(5), |
| 81 | .psi3threshold = VR_CFG_AMP(1), |
| 82 | .psi3enable = 0, |
| 83 | .psi4enable = 0, |
| 84 | .imon_slope = 0x0, |
| 85 | .imon_offset = 0x0, |
| 86 | .icc_max = VR_CFG_AMP(35), |
| 87 | .voltage_limit = 1520, |
| 88 | }, |
| 89 | }; |
| 90 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 91 | static uint16_t get_sku_icc_max(int domain) |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 92 | { |
Patrick Rudolph | 69e826d | 2019-08-14 10:23:30 +0200 | [diff] [blame] | 93 | const uint16_t tdp = cpu_get_power_max(); |
| 94 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 95 | static uint16_t mch_id = 0, igd_id = 0, lpc_id = 0; |
| 96 | if (!mch_id) { |
| 97 | struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); |
| 98 | mch_id = pci_read_config16(dev, PCI_DEVICE_ID); |
| 99 | } |
| 100 | if (!igd_id) { |
| 101 | struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD); |
Patrick Rudolph | 69e826d | 2019-08-14 10:23:30 +0200 | [diff] [blame] | 102 | if (dev) |
| 103 | igd_id = pci_read_config16(dev, PCI_DEVICE_ID); |
| 104 | else |
| 105 | igd_id = 0xffff; |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 106 | } |
| 107 | if (!lpc_id) { |
| 108 | struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); |
| 109 | lpc_id = pci_read_config16(dev, PCI_DEVICE_ID); |
| 110 | } |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 111 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 112 | /* |
Patrick Rudolph | 69e826d | 2019-08-14 10:23:30 +0200 | [diff] [blame] | 113 | * Iccmax table from Doc #559100 Section 7.2 DC Specifications, the |
| 114 | * Iccmax is the same among KBL-Y but KBL-U/R. |
| 115 | * Addendum for AML-Y #594883, IccMax for IA core is 28A. |
| 116 | * KBL-S #335195, KBL-H #335190 |
| 117 | * +----------------+-------------+---------------+------+-----+ |
| 118 | * | Domain/Setting | SA | IA | GTUS | GTS | |
| 119 | * +----------------+-------------+---------------+------+-----+ |
| 120 | * | IccMax(KBL-S) | 11.1A | 100A | 45A | 45A | |
| 121 | * | | | ... | | | |
| 122 | * | | | 40A | | | |
| 123 | * +----------------+-------------+---------------+------+-----+ |
| 124 | * | IccMax(KBL-H) | 11.1A(45W) | 68A | 55A | 55A | |
| 125 | * | | 6.6A(Others)| 60A | | | |
| 126 | * +----------------+-------------+---------------+------+-----+ |
| 127 | * | IccMax(KBL-U/R)| 6A(U42) | 64A(U42) | 31A | 31A | |
| 128 | * | | 4.5A(Others)| 29A(P/C) | | | |
| 129 | * | | | 32A(i3/i5) | | | |
| 130 | * +----------------+-------------+---------------+------+-----+ |
| 131 | * | IccMax(KBL-Y) | 4.1A | 24A | 24A | 24A | |
| 132 | * +----------------+-------------+---------------+------+-----+ |
| 133 | * | IccMax(AML-Y) | 4.1A | 28A | 24A | 24A | |
| 134 | * +----------------+-------------+---------------+------+-----+ |
| 135 | */ |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 136 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 137 | switch (mch_id) { |
Patrick Rudolph | 69e826d | 2019-08-14 10:23:30 +0200 | [diff] [blame] | 138 | case PCI_DEVICE_ID_INTEL_KBL_ID_S: { |
| 139 | uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 140 | VR_CFG_AMP(11.1), |
| 141 | VR_CFG_AMP(40), |
| 142 | VR_CFG_AMP(45), |
| 143 | VR_CFG_AMP(45), |
| 144 | }; |
| 145 | if (tdp >= 54) |
| 146 | icc_max[VR_IA_CORE] = VR_CFG_AMP(58); |
| 147 | else if (tdp >= 51) |
| 148 | icc_max[VR_IA_CORE] = VR_CFG_AMP(45); |
| 149 | |
| 150 | return icc_max[domain]; |
| 151 | |
| 152 | } |
| 153 | case PCI_DEVICE_ID_INTEL_KBL_ID_DT_2: /* fallthrough */ |
| 154 | case PCI_DEVICE_ID_INTEL_KBL_ID_DT: { |
| 155 | uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 156 | VR_CFG_AMP(11.1), |
| 157 | VR_CFG_AMP(66), |
| 158 | VR_CFG_AMP(55), |
| 159 | VR_CFG_AMP(55), |
| 160 | }; |
| 161 | if (tdp >= 91) |
| 162 | icc_max[VR_IA_CORE] = VR_CFG_AMP(100); |
| 163 | else if (tdp >= 65) |
| 164 | icc_max[VR_IA_CORE] = VR_CFG_AMP(79); |
| 165 | |
| 166 | return icc_max[domain]; |
| 167 | } |
| 168 | case PCI_DEVICE_ID_INTEL_KBL_ID_H: { |
| 169 | uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 170 | VR_CFG_AMP(6.6), |
| 171 | VR_CFG_AMP(60), |
| 172 | VR_CFG_AMP(55), |
| 173 | VR_CFG_AMP(55), |
| 174 | }; |
| 175 | if (tdp >= 45) { |
| 176 | icc_max[VR_SYSTEM_AGENT] = VR_CFG_AMP(11.1); |
| 177 | icc_max[VR_IA_CORE] = VR_CFG_AMP(68); |
| 178 | } |
| 179 | |
| 180 | return icc_max[domain]; |
| 181 | } |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 182 | case PCI_DEVICE_ID_INTEL_KBL_U_R: { |
| 183 | static const uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 184 | VR_CFG_AMP(6), |
| 185 | VR_CFG_AMP(64), |
| 186 | VR_CFG_AMP(31), |
| 187 | VR_CFG_AMP(31), |
| 188 | }; |
| 189 | return icc_max[domain]; |
| 190 | } |
| 191 | case PCI_DEVICE_ID_INTEL_KBL_ID_Y: { |
| 192 | uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 193 | VR_CFG_AMP(4.1), |
| 194 | VR_CFG_AMP(24), |
| 195 | VR_CFG_AMP(24), |
| 196 | VR_CFG_AMP(24), |
| 197 | }; |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 198 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 199 | if (igd_id == PCI_DEVICE_ID_INTEL_AML_GT2_ULX) |
| 200 | icc_max[VR_IA_CORE] = VR_CFG_AMP(28); |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 201 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 202 | return icc_max[domain]; |
| 203 | } |
| 204 | case PCI_DEVICE_ID_INTEL_KBL_ID_U: { |
| 205 | uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 206 | VR_CFG_AMP(4.5), |
| 207 | VR_CFG_AMP(32), |
| 208 | VR_CFG_AMP(31), |
| 209 | VR_CFG_AMP(31), |
| 210 | }; |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 211 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 212 | if (igd_id == PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22) |
| 213 | icc_max[VR_IA_CORE] = VR_CFG_AMP(29); |
| 214 | |
| 215 | return icc_max[domain]; |
| 216 | } |
| 217 | default: |
| 218 | printk(BIOS_ERR, "ERROR: Unknown MCH in VR-config\n"); |
| 219 | } |
| 220 | return 0; |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 221 | } |
| 222 | |
Patrick Rudolph | 9a01623 | 2019-08-14 12:10:48 +0200 | [diff] [blame] | 223 | #if CONFIG(PLATFORM_USES_FSP2_0) |
| 224 | static uint16_t get_sku_ac_dc_loadline(const int domain) |
| 225 | { |
| 226 | static uint16_t mch_id = 0, igd_id = 0; |
| 227 | if (!mch_id) { |
| 228 | struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); |
| 229 | mch_id = pci_read_config16(dev, PCI_DEVICE_ID); |
| 230 | } |
| 231 | if (!igd_id) { |
| 232 | struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD); |
| 233 | if (dev) |
| 234 | igd_id = pci_read_config16(dev, PCI_DEVICE_ID); |
| 235 | else |
| 236 | igd_id = 0xffff; |
| 237 | } |
| 238 | |
| 239 | switch (mch_id) { |
| 240 | case PCI_DEVICE_ID_INTEL_KBL_ID_S: /* fallthrough */ |
| 241 | case PCI_DEVICE_ID_INTEL_KBL_ID_DT: /* fallthrough */ |
| 242 | case PCI_DEVICE_ID_INTEL_KBL_ID_DT_2: { |
| 243 | static const uint16_t loadline[NUM_VR_DOMAINS] = { |
| 244 | VR_CFG_MOHMS(0), /* Not specified */ |
| 245 | VR_CFG_MOHMS(2.1), |
| 246 | VR_CFG_MOHMS(3.1), |
| 247 | VR_CFG_MOHMS(3.1), |
| 248 | }; |
| 249 | |
| 250 | return loadline[domain]; |
| 251 | } |
| 252 | case PCI_DEVICE_ID_INTEL_KBL_ID_H: { |
| 253 | static const uint16_t loadline[NUM_VR_DOMAINS] = { |
| 254 | VR_CFG_MOHMS(10), |
| 255 | VR_CFG_MOHMS(1.8), |
| 256 | VR_CFG_MOHMS(2.65), |
| 257 | VR_CFG_MOHMS(2.65), |
| 258 | }; |
| 259 | |
| 260 | return loadline[domain]; |
| 261 | } |
| 262 | case PCI_DEVICE_ID_INTEL_KBL_ID_Y: { |
| 263 | uint16_t loadline[NUM_VR_DOMAINS] = { |
| 264 | VR_CFG_MOHMS(18), |
| 265 | VR_CFG_MOHMS(5.9), |
| 266 | VR_CFG_MOHMS(5.7), |
| 267 | VR_CFG_MOHMS(5.7), |
| 268 | }; |
| 269 | |
| 270 | if (igd_id == PCI_DEVICE_ID_INTEL_AML_GT2_ULX) |
| 271 | loadline[VR_IA_CORE] = VR_CFG_MOHMS(4); |
| 272 | |
| 273 | return loadline[domain]; |
| 274 | } |
| 275 | case PCI_DEVICE_ID_INTEL_KBL_U_R: /* fallthrough */ |
| 276 | case PCI_DEVICE_ID_INTEL_KBL_ID_U: { |
| 277 | uint16_t loadline[NUM_VR_DOMAINS] = { |
| 278 | VR_CFG_MOHMS(10.3), |
| 279 | VR_CFG_MOHMS(2.4), |
| 280 | VR_CFG_MOHMS(3.1), |
| 281 | VR_CFG_MOHMS(3.1), |
| 282 | }; |
| 283 | |
| 284 | if (igd_id == PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22) { |
| 285 | loadline[VR_GT_UNSLICED] = VR_CFG_MOHMS(6); |
| 286 | loadline[VR_GT_SLICED] = VR_CFG_MOHMS(6); |
| 287 | } |
| 288 | |
| 289 | return loadline[domain]; |
| 290 | } |
| 291 | default: |
| 292 | printk(BIOS_ERR, "ERROR: Unknown MCH in VR-config\n"); |
| 293 | } |
| 294 | return 0; |
| 295 | } |
| 296 | #endif |
| 297 | |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 298 | void fill_vr_domain_config(void *params, |
| 299 | int domain, const struct vr_config *chip_cfg) |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 300 | { |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 301 | FSP_SIL_UPD *vr_params = (FSP_SIL_UPD *)params; |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 302 | const struct vr_config *cfg; |
| 303 | |
| 304 | if (domain < 0 || domain >= NUM_VR_DOMAINS) |
| 305 | return; |
| 306 | |
| 307 | /* Use device tree override if requested. */ |
| 308 | if (chip_cfg->vr_config_enable) |
| 309 | cfg = chip_cfg; |
| 310 | else |
| 311 | cfg = &default_configs[domain]; |
| 312 | |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 313 | vr_params->VrConfigEnable[domain] = cfg->vr_config_enable; |
| 314 | vr_params->Psi1Threshold[domain] = cfg->psi1threshold; |
| 315 | vr_params->Psi2Threshold[domain] = cfg->psi2threshold; |
| 316 | vr_params->Psi3Threshold[domain] = cfg->psi3threshold; |
| 317 | vr_params->Psi3Enable[domain] = cfg->psi3enable; |
| 318 | vr_params->Psi4Enable[domain] = cfg->psi4enable; |
| 319 | vr_params->ImonSlope[domain] = cfg->imon_slope; |
| 320 | vr_params->ImonOffset[domain] = cfg->imon_offset; |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame] | 321 | /* If board provided non-zero value, use it. */ |
| 322 | if (cfg->icc_max) |
| 323 | vr_params->IccMax[domain] = cfg->icc_max; |
| 324 | else |
| 325 | vr_params->IccMax[domain] = get_sku_icc_max(domain); |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 326 | vr_params->VrVoltageLimit[domain] = cfg->voltage_limit; |
Duncan Laurie | 86db469 | 2017-03-14 16:40:06 -0700 | [diff] [blame] | 327 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 328 | #if CONFIG(PLATFORM_USES_FSP2_0) |
Patrick Rudolph | 9a01623 | 2019-08-14 12:10:48 +0200 | [diff] [blame] | 329 | if (cfg->ac_loadline) |
| 330 | vr_params->AcLoadline[domain] = cfg->ac_loadline; |
| 331 | else |
| 332 | vr_params->AcLoadline[domain] = get_sku_ac_dc_loadline(domain); |
| 333 | if (cfg->dc_loadline) |
| 334 | vr_params->DcLoadline[domain] = cfg->dc_loadline; |
| 335 | else |
| 336 | vr_params->DcLoadline[domain] = get_sku_ac_dc_loadline(domain); |
Duncan Laurie | 86db469 | 2017-03-14 16:40:06 -0700 | [diff] [blame] | 337 | #endif |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 338 | } |