Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2015 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 17 | #include <device/pci_ids.h> |
Patrick Rudolph | e56189c | 2018-04-18 10:11:59 +0200 | [diff] [blame] | 18 | #include <device/pci_ops.h> |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 19 | #include <fsp/api.h> |
| 20 | #include <soc/ramstage.h> |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 21 | #include <soc/vr_config.h> |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 22 | #include <console/console.h> |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 23 | |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 24 | /* Default values for domain configuration. PSI3 and PSI4 are disabled. */ |
| 25 | static const struct vr_config default_configs[NUM_VR_DOMAINS] = { |
| 26 | [VR_SYSTEM_AGENT] = { |
| 27 | .vr_config_enable = 1, |
| 28 | .psi1threshold = VR_CFG_AMP(20), |
| 29 | .psi2threshold = VR_CFG_AMP(4), |
| 30 | .psi3threshold = VR_CFG_AMP(1), |
| 31 | .psi3enable = 0, |
| 32 | .psi4enable = 0, |
| 33 | .imon_slope = 0x0, |
| 34 | .imon_offset = 0x0, |
| 35 | .icc_max = VR_CFG_AMP(7), |
| 36 | .voltage_limit = 1520, |
| 37 | }, |
| 38 | [VR_IA_CORE] = { |
| 39 | .vr_config_enable = 1, |
| 40 | .psi1threshold = VR_CFG_AMP(20), |
| 41 | .psi2threshold = VR_CFG_AMP(5), |
| 42 | .psi3threshold = VR_CFG_AMP(1), |
| 43 | .psi3enable = 0, |
| 44 | .psi4enable = 0, |
| 45 | .imon_slope = 0x0, |
| 46 | .imon_offset = 0x0, |
| 47 | .icc_max = VR_CFG_AMP(34), |
| 48 | .voltage_limit = 1520, |
| 49 | }, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 50 | #if CONFIG(PLATFORM_USES_FSP1_1) |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 51 | [VR_RING] = { |
| 52 | .vr_config_enable = 1, |
| 53 | .psi1threshold = VR_CFG_AMP(20), |
| 54 | .psi2threshold = VR_CFG_AMP(5), |
| 55 | .psi3threshold = VR_CFG_AMP(1), |
| 56 | .psi3enable = 0, |
| 57 | .psi4enable = 0, |
| 58 | .imon_slope = 0x0, |
| 59 | .imon_offset = 0x0, |
| 60 | .icc_max = VR_CFG_AMP(34), |
| 61 | .voltage_limit = 1520, |
| 62 | }, |
Duncan Laurie | 4fa8a6f | 2017-03-14 16:37:55 -0700 | [diff] [blame] | 63 | #endif |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 64 | [VR_GT_UNSLICED] = { |
| 65 | .vr_config_enable = 1, |
| 66 | .psi1threshold = VR_CFG_AMP(20), |
| 67 | .psi2threshold = VR_CFG_AMP(5), |
| 68 | .psi3threshold = VR_CFG_AMP(1), |
| 69 | .psi3enable = 0, |
| 70 | .psi4enable = 0, |
| 71 | .imon_slope = 0x0, |
| 72 | .imon_offset = 0x0, |
| 73 | .icc_max = VR_CFG_AMP(35), |
| 74 | .voltage_limit = 1520, |
| 75 | }, |
| 76 | [VR_GT_SLICED] = { |
| 77 | .vr_config_enable = 1, |
| 78 | .psi1threshold = VR_CFG_AMP(20), |
| 79 | .psi2threshold = VR_CFG_AMP(5), |
| 80 | .psi3threshold = VR_CFG_AMP(1), |
| 81 | .psi3enable = 0, |
| 82 | .psi4enable = 0, |
| 83 | .imon_slope = 0x0, |
| 84 | .imon_offset = 0x0, |
| 85 | .icc_max = VR_CFG_AMP(35), |
| 86 | .voltage_limit = 1520, |
| 87 | }, |
| 88 | }; |
| 89 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 90 | static uint16_t get_sku_icc_max(int domain) |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 91 | { |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 92 | static uint16_t mch_id = 0, igd_id = 0, lpc_id = 0; |
| 93 | if (!mch_id) { |
| 94 | struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); |
| 95 | mch_id = pci_read_config16(dev, PCI_DEVICE_ID); |
| 96 | } |
| 97 | if (!igd_id) { |
| 98 | struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD); |
| 99 | igd_id = pci_read_config16(dev, PCI_DEVICE_ID); |
| 100 | } |
| 101 | if (!lpc_id) { |
| 102 | struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); |
| 103 | lpc_id = pci_read_config16(dev, PCI_DEVICE_ID); |
| 104 | } |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 105 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 106 | /* |
| 107 | * Iccmax table from Doc #559100 Section 7.2 DC Specifications, the |
| 108 | * Iccmax is the same among KBL-Y but KBL-U/R. |
| 109 | * Addendum for AML-Y #594883, IccMax for IA core is 28A. |
| 110 | * +----------------+-------------+---------------+------+-----+ |
| 111 | * | Domain/Setting | SA | IA | GTUS | GTS | |
| 112 | * +----------------+-------------+---------------+------+-----+ |
| 113 | * | IccMax(KBL-U/R)| 6A(U42) | 64A(U42) | 31A | 31A | |
| 114 | * | | 4.5A(Others)| 29A(P/C) loadline| | | |
| 115 | * | | | 32A(i3/i5) | | | |
| 116 | * +----------------+-------------+---------------+------+-----+ |
| 117 | * | IccMax(KBL-Y) | 4.1A | 24A | 24A | 24A | |
| 118 | * +----------------+-------------+---------------+------+-----+ |
| 119 | * | IccMax(AML-Y) | 4.1A | 28A | 24A | 24A | |
| 120 | * +----------------+-------------+---------------+------+-----+ |
| 121 | */ |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 122 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 123 | switch (mch_id) { |
| 124 | case PCI_DEVICE_ID_INTEL_KBL_U_R: { |
| 125 | static const uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 126 | VR_CFG_AMP(6), |
| 127 | VR_CFG_AMP(64), |
| 128 | VR_CFG_AMP(31), |
| 129 | VR_CFG_AMP(31), |
| 130 | }; |
| 131 | return icc_max[domain]; |
| 132 | } |
| 133 | case PCI_DEVICE_ID_INTEL_KBL_ID_Y: { |
| 134 | uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 135 | VR_CFG_AMP(4.1), |
| 136 | VR_CFG_AMP(24), |
| 137 | VR_CFG_AMP(24), |
| 138 | VR_CFG_AMP(24), |
| 139 | }; |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 140 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 141 | if (igd_id == PCI_DEVICE_ID_INTEL_AML_GT2_ULX) |
| 142 | icc_max[VR_IA_CORE] = VR_CFG_AMP(28); |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 143 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 144 | return icc_max[domain]; |
| 145 | } |
| 146 | case PCI_DEVICE_ID_INTEL_KBL_ID_U: { |
| 147 | uint16_t icc_max[NUM_VR_DOMAINS] = { |
| 148 | VR_CFG_AMP(4.5), |
| 149 | VR_CFG_AMP(32), |
| 150 | VR_CFG_AMP(31), |
| 151 | VR_CFG_AMP(31), |
| 152 | }; |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 153 | |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 154 | if (igd_id == PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22) |
| 155 | icc_max[VR_IA_CORE] = VR_CFG_AMP(29); |
| 156 | |
| 157 | return icc_max[domain]; |
| 158 | } |
| 159 | default: |
| 160 | printk(BIOS_ERR, "ERROR: Unknown MCH in VR-config\n"); |
| 161 | } |
| 162 | return 0; |
Gaggery Tsai | e1a75d4 | 2018-01-02 12:13:40 +0800 | [diff] [blame] | 163 | } |
| 164 | |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 165 | void fill_vr_domain_config(void *params, |
| 166 | int domain, const struct vr_config *chip_cfg) |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 167 | { |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 168 | FSP_SIL_UPD *vr_params = (FSP_SIL_UPD *)params; |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 169 | const struct vr_config *cfg; |
| 170 | |
| 171 | if (domain < 0 || domain >= NUM_VR_DOMAINS) |
| 172 | return; |
| 173 | |
| 174 | /* Use device tree override if requested. */ |
| 175 | if (chip_cfg->vr_config_enable) |
| 176 | cfg = chip_cfg; |
| 177 | else |
| 178 | cfg = &default_configs[domain]; |
| 179 | |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 180 | vr_params->VrConfigEnable[domain] = cfg->vr_config_enable; |
| 181 | vr_params->Psi1Threshold[domain] = cfg->psi1threshold; |
| 182 | vr_params->Psi2Threshold[domain] = cfg->psi2threshold; |
| 183 | vr_params->Psi3Threshold[domain] = cfg->psi3threshold; |
| 184 | vr_params->Psi3Enable[domain] = cfg->psi3enable; |
| 185 | vr_params->Psi4Enable[domain] = cfg->psi4enable; |
| 186 | vr_params->ImonSlope[domain] = cfg->imon_slope; |
| 187 | vr_params->ImonOffset[domain] = cfg->imon_offset; |
Patrick Rudolph | 50aebaf8 | 2019-08-14 10:07:38 +0200 | [diff] [blame^] | 188 | /* If board provided non-zero value, use it. */ |
| 189 | if (cfg->icc_max) |
| 190 | vr_params->IccMax[domain] = cfg->icc_max; |
| 191 | else |
| 192 | vr_params->IccMax[domain] = get_sku_icc_max(domain); |
Rizwan Qureshi | 1222a73 | 2016-08-23 14:31:23 +0530 | [diff] [blame] | 193 | vr_params->VrVoltageLimit[domain] = cfg->voltage_limit; |
Duncan Laurie | 86db469 | 2017-03-14 16:40:06 -0700 | [diff] [blame] | 194 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 195 | #if CONFIG(PLATFORM_USES_FSP2_0) |
Duncan Laurie | 86db469 | 2017-03-14 16:40:06 -0700 | [diff] [blame] | 196 | vr_params->AcLoadline[domain] = cfg->ac_loadline; |
| 197 | vr_params->DcLoadline[domain] = cfg->dc_loadline; |
| 198 | #endif |
Aaron Durbin | df21440 | 2015-12-14 16:44:26 -0600 | [diff] [blame] | 199 | } |