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review.coreboot.org / coreboot / 4fa8a6f4fefe04eaa1579c03d36abf0fbc9a27f7 / . / src / soc / intel / skylake / vr_config.c
blob: 36c2f1f403e10a0af183eb3877bcbf84a9efd732 [file] [log] [blame]
Aaron Durbindf214402015-12-14 16:44:26 -0600[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
Rizwan Qureshi1222a732016-08-23 14:31:23 +0530[diff] [blame]17#include <fsp/api.h>
18#include <soc/ramstage.h>
Aaron Durbindf214402015-12-14 16:44:26 -0600[diff] [blame]19#include <soc/vr_config.h>
20
21/* Default values for domain configuration. PSI3 and PSI4 are disabled. */
22static const struct vr_config default_configs[NUM_VR_DOMAINS] = {
23 [VR_SYSTEM_AGENT] = {
24 .vr_config_enable = 1,
25 .psi1threshold = VR_CFG_AMP(20),
26 .psi2threshold = VR_CFG_AMP(4),
27 .psi3threshold = VR_CFG_AMP(1),
28 .psi3enable = 0,
29 .psi4enable = 0,
30 .imon_slope = 0x0,
31 .imon_offset = 0x0,
32 .icc_max = VR_CFG_AMP(7),
33 .voltage_limit = 1520,
34 },
35 [VR_IA_CORE] = {
36 .vr_config_enable = 1,
37 .psi1threshold = VR_CFG_AMP(20),
38 .psi2threshold = VR_CFG_AMP(5),
39 .psi3threshold = VR_CFG_AMP(1),
40 .psi3enable = 0,
41 .psi4enable = 0,
42 .imon_slope = 0x0,
43 .imon_offset = 0x0,
44 .icc_max = VR_CFG_AMP(34),
45 .voltage_limit = 1520,
46 },
Duncan Laurie4fa8a6f2017-03-14 16:37:55 -0700[diff] [blame^]47#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)
Aaron Durbindf214402015-12-14 16:44:26 -0600[diff] [blame]48 [VR_RING] = {
49 .vr_config_enable = 1,
50 .psi1threshold = VR_CFG_AMP(20),
51 .psi2threshold = VR_CFG_AMP(5),
52 .psi3threshold = VR_CFG_AMP(1),
53 .psi3enable = 0,
54 .psi4enable = 0,
55 .imon_slope = 0x0,
56 .imon_offset = 0x0,
57 .icc_max = VR_CFG_AMP(34),
58 .voltage_limit = 1520,
59 },
Duncan Laurie4fa8a6f2017-03-14 16:37:55 -0700[diff] [blame^]60#endif
Aaron Durbindf214402015-12-14 16:44:26 -0600[diff] [blame]61 [VR_GT_UNSLICED] = {
62 .vr_config_enable = 1,
63 .psi1threshold = VR_CFG_AMP(20),
64 .psi2threshold = VR_CFG_AMP(5),
65 .psi3threshold = VR_CFG_AMP(1),
66 .psi3enable = 0,
67 .psi4enable = 0,
68 .imon_slope = 0x0,
69 .imon_offset = 0x0,
70 .icc_max = VR_CFG_AMP(35),
71 .voltage_limit = 1520,
72 },
73 [VR_GT_SLICED] = {
74 .vr_config_enable = 1,
75 .psi1threshold = VR_CFG_AMP(20),
76 .psi2threshold = VR_CFG_AMP(5),
77 .psi3threshold = VR_CFG_AMP(1),
78 .psi3enable = 0,
79 .psi4enable = 0,
80 .imon_slope = 0x0,
81 .imon_offset = 0x0,
82 .icc_max = VR_CFG_AMP(35),
83 .voltage_limit = 1520,
84 },
85};
86
Rizwan Qureshi1222a732016-08-23 14:31:23 +0530[diff] [blame]87void fill_vr_domain_config(void *params,
88 int domain, const struct vr_config *chip_cfg)
Aaron Durbindf214402015-12-14 16:44:26 -0600[diff] [blame]89{
Rizwan Qureshi1222a732016-08-23 14:31:23 +0530[diff] [blame]90 FSP_SIL_UPD *vr_params = (FSP_SIL_UPD *)params;
Aaron Durbindf214402015-12-14 16:44:26 -0600[diff] [blame]91 const struct vr_config *cfg;
92
93 if (domain < 0 || domain >= NUM_VR_DOMAINS)
94 return;
95
96 /* Use device tree override if requested. */
97 if (chip_cfg->vr_config_enable)
98 cfg = chip_cfg;
99 else
100 cfg = &default_configs[domain];
101
Rizwan Qureshi1222a732016-08-23 14:31:23 +0530[diff] [blame]102 vr_params->VrConfigEnable[domain] = cfg->vr_config_enable;
103 vr_params->Psi1Threshold[domain] = cfg->psi1threshold;
104 vr_params->Psi2Threshold[domain] = cfg->psi2threshold;
105 vr_params->Psi3Threshold[domain] = cfg->psi3threshold;
106 vr_params->Psi3Enable[domain] = cfg->psi3enable;
107 vr_params->Psi4Enable[domain] = cfg->psi4enable;
108 vr_params->ImonSlope[domain] = cfg->imon_slope;
109 vr_params->ImonOffset[domain] = cfg->imon_offset;
110 vr_params->IccMax[domain] = cfg->icc_max;
111 vr_params->VrVoltageLimit[domain] = cfg->voltage_limit;
Aaron Durbindf214402015-12-14 16:44:26 -0600[diff] [blame]112}