blob: 40223e32cdf510a7f585ad4617a8cfa3a53cdc52 [file] [log] [blame]
Aaron Durbindf214402015-12-14 16:44:26 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <soc/vr_config.h>
18
19/* Default values for domain configuration. PSI3 and PSI4 are disabled. */
20static const struct vr_config default_configs[NUM_VR_DOMAINS] = {
21 [VR_SYSTEM_AGENT] = {
22 .vr_config_enable = 1,
23 .psi1threshold = VR_CFG_AMP(20),
24 .psi2threshold = VR_CFG_AMP(4),
25 .psi3threshold = VR_CFG_AMP(1),
26 .psi3enable = 0,
27 .psi4enable = 0,
28 .imon_slope = 0x0,
29 .imon_offset = 0x0,
30 .icc_max = VR_CFG_AMP(7),
31 .voltage_limit = 1520,
32 },
33 [VR_IA_CORE] = {
34 .vr_config_enable = 1,
35 .psi1threshold = VR_CFG_AMP(20),
36 .psi2threshold = VR_CFG_AMP(5),
37 .psi3threshold = VR_CFG_AMP(1),
38 .psi3enable = 0,
39 .psi4enable = 0,
40 .imon_slope = 0x0,
41 .imon_offset = 0x0,
42 .icc_max = VR_CFG_AMP(34),
43 .voltage_limit = 1520,
44 },
45 [VR_RING] = {
46 .vr_config_enable = 1,
47 .psi1threshold = VR_CFG_AMP(20),
48 .psi2threshold = VR_CFG_AMP(5),
49 .psi3threshold = VR_CFG_AMP(1),
50 .psi3enable = 0,
51 .psi4enable = 0,
52 .imon_slope = 0x0,
53 .imon_offset = 0x0,
54 .icc_max = VR_CFG_AMP(34),
55 .voltage_limit = 1520,
56 },
57 [VR_GT_UNSLICED] = {
58 .vr_config_enable = 1,
59 .psi1threshold = VR_CFG_AMP(20),
60 .psi2threshold = VR_CFG_AMP(5),
61 .psi3threshold = VR_CFG_AMP(1),
62 .psi3enable = 0,
63 .psi4enable = 0,
64 .imon_slope = 0x0,
65 .imon_offset = 0x0,
66 .icc_max = VR_CFG_AMP(35),
67 .voltage_limit = 1520,
68 },
69 [VR_GT_SLICED] = {
70 .vr_config_enable = 1,
71 .psi1threshold = VR_CFG_AMP(20),
72 .psi2threshold = VR_CFG_AMP(5),
73 .psi3threshold = VR_CFG_AMP(1),
74 .psi3enable = 0,
75 .psi4enable = 0,
76 .imon_slope = 0x0,
77 .imon_offset = 0x0,
78 .icc_max = VR_CFG_AMP(35),
79 .voltage_limit = 1520,
80 },
81};
82
83void fill_vr_domain_config(SILICON_INIT_UPD *params, int domain,
84 const struct vr_config *chip_cfg)
85{
86 const struct vr_config *cfg;
87
88 if (domain < 0 || domain >= NUM_VR_DOMAINS)
89 return;
90
91 /* Use device tree override if requested. */
92 if (chip_cfg->vr_config_enable)
93 cfg = chip_cfg;
94 else
95 cfg = &default_configs[domain];
96
97 params->VrConfigEnable[domain] = cfg->vr_config_enable;
98 params->Psi1Threshold[domain] = cfg->psi1threshold;
99 params->Psi2Threshold[domain] = cfg->psi2threshold;
100 params->Psi3Threshold[domain] = cfg->psi3threshold;
101 params->Psi3Enable[domain] = cfg->psi3enable;
102 params->Psi4Enable[domain] = cfg->psi4enable;
103 params->ImonSlope[domain] = cfg->imon_slope;
104 params->ImonOffset[domain] = cfg->imon_offset;
105 params->IccMax[domain] = cfg->icc_max;
106 params->VrVoltageLimit[domain] = cfg->voltage_limit;
107}