Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2012, Google Inc. |
| 3 | * |
| 4 | * Based on drivers/spi/winbond.c |
| 5 | * |
| 6 | * Copyright 2008, Network Appliance Inc. |
| 7 | * Jason McMullan <mcmullan@netapp.com> |
| 8 | * |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 18 | */ |
| 19 | |
Furquan Shaikh | c28984d | 2016-11-20 21:04:00 -0800 | [diff] [blame] | 20 | #include <console/console.h> |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 21 | #include <stdlib.h> |
| 22 | #include <spi_flash.h> |
Furquan Shaikh | c28984d | 2016-11-20 21:04:00 -0800 | [diff] [blame] | 23 | #include <spi-generic.h> |
Furquan Shaikh | 810e2cd | 2016-12-05 20:32:24 -0800 | [diff] [blame] | 24 | #include <string.h> |
Edward O'Callaghan | c4561e2 | 2014-06-26 15:02:40 +1000 | [diff] [blame] | 25 | |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 26 | #include "spi_flash_internal.h" |
| 27 | |
| 28 | /* GD25Pxx-specific commands */ |
| 29 | #define CMD_GD25_WREN 0x06 /* Write Enable */ |
| 30 | #define CMD_GD25_WRDI 0x04 /* Write Disable */ |
| 31 | #define CMD_GD25_RDSR 0x05 /* Read Status Register */ |
| 32 | #define CMD_GD25_WRSR 0x01 /* Write Status Register */ |
| 33 | #define CMD_GD25_READ 0x03 /* Read Data Bytes */ |
| 34 | #define CMD_GD25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */ |
| 35 | #define CMD_GD25_PP 0x02 /* Page Program */ |
| 36 | #define CMD_GD25_SE 0x20 /* Sector (4K) Erase */ |
| 37 | #define CMD_GD25_BE 0xd8 /* Block (64K) Erase */ |
| 38 | #define CMD_GD25_CE 0xc7 /* Chip Erase */ |
| 39 | #define CMD_GD25_DP 0xb9 /* Deep Power-down */ |
| 40 | #define CMD_GD25_RES 0xab /* Release from DP, and Read Signature */ |
| 41 | |
| 42 | struct gigadevice_spi_flash_params { |
| 43 | uint16_t id; |
| 44 | /* Log2 of page size in power-of-two mode */ |
| 45 | uint8_t l2_page_size; |
| 46 | uint16_t pages_per_sector; |
| 47 | uint16_t sectors_per_block; |
| 48 | uint16_t nr_blocks; |
| 49 | const char *name; |
| 50 | }; |
| 51 | |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 52 | static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { |
| 53 | { |
Mike Banon | 2db6e68 | 2019-01-12 19:01:10 +0300 | [diff] [blame] | 54 | .id = 0x3114, |
| 55 | .l2_page_size = 8, |
| 56 | .pages_per_sector = 16, |
| 57 | .sectors_per_block = 16, |
| 58 | .nr_blocks = 16, |
| 59 | .name = "GD25T80", |
| 60 | }, |
| 61 | { |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 62 | .id = 0x4014, |
| 63 | .l2_page_size = 8, |
| 64 | .pages_per_sector = 16, |
| 65 | .sectors_per_block = 16, |
| 66 | .nr_blocks = 16, |
Mike Banon | 2db6e68 | 2019-01-12 19:01:10 +0300 | [diff] [blame] | 67 | .name = "GD25Q80(B)", |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 68 | }, |
| 69 | { |
| 70 | .id = 0x4015, |
| 71 | .l2_page_size = 8, |
| 72 | .pages_per_sector = 16, |
| 73 | .sectors_per_block = 16, |
| 74 | .nr_blocks = 32, |
| 75 | .name = "GD25Q16(B)", |
| 76 | }, |
| 77 | { |
| 78 | .id = 0x4016, |
| 79 | .l2_page_size = 8, |
| 80 | .pages_per_sector = 16, |
| 81 | .sectors_per_block = 16, |
| 82 | .nr_blocks = 64, |
| 83 | .name = "GD25Q32(B)", |
| 84 | }, |
| 85 | { |
Mike Banon | 2db6e68 | 2019-01-12 19:01:10 +0300 | [diff] [blame] | 86 | .id = 0x4017, |
| 87 | .l2_page_size = 8, |
| 88 | .pages_per_sector = 16, |
| 89 | .sectors_per_block = 16, |
| 90 | .nr_blocks = 128, |
| 91 | .name = "GD25Q64(B)/GD25B64C", |
| 92 | }, |
| 93 | { |
| 94 | .id = 0x4018, |
| 95 | .l2_page_size = 8, |
| 96 | .pages_per_sector = 16, |
| 97 | .sectors_per_block = 16, |
| 98 | .nr_blocks = 256, |
| 99 | .name = "GD25Q128(B)", |
| 100 | }, |
| 101 | { |
| 102 | .id = 0x4214, |
| 103 | .l2_page_size = 8, |
| 104 | .pages_per_sector = 16, |
| 105 | .sectors_per_block = 16, |
| 106 | .nr_blocks = 16, |
| 107 | .name = "GD25VQ80C", |
| 108 | }, |
| 109 | { |
| 110 | .id = 0x4215, |
| 111 | .l2_page_size = 8, |
| 112 | .pages_per_sector = 16, |
| 113 | .sectors_per_block = 16, |
| 114 | .nr_blocks = 32, |
| 115 | .name = "GD25VQ16C", |
| 116 | }, |
| 117 | { |
| 118 | .id = 0x6014, |
| 119 | .l2_page_size = 8, |
| 120 | .pages_per_sector = 16, |
| 121 | .sectors_per_block = 16, |
| 122 | .nr_blocks = 16, |
| 123 | .name = "GD25LQ80", |
| 124 | }, |
| 125 | { |
| 126 | .id = 0x6015, |
| 127 | .l2_page_size = 8, |
| 128 | .pages_per_sector = 16, |
| 129 | .sectors_per_block = 16, |
| 130 | .nr_blocks = 32, |
| 131 | .name = "GD25LQ16", |
| 132 | }, |
| 133 | { |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 134 | .id = 0x6016, |
| 135 | .l2_page_size = 8, |
| 136 | .pages_per_sector = 16, |
| 137 | .sectors_per_block = 16, |
| 138 | .nr_blocks = 64, |
| 139 | .name = "GD25LQ32", |
| 140 | }, |
| 141 | { |
Marc Jones | 9bab54b | 2014-04-03 16:37:06 -0600 | [diff] [blame] | 142 | .id = 0x6017, |
| 143 | .l2_page_size = 8, |
| 144 | .pages_per_sector = 16, |
| 145 | .sectors_per_block = 16, |
| 146 | .nr_blocks = 128, |
| 147 | .name = "GD25LQ64C/GD25LB64C", |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 148 | }, |
| 149 | { |
Mike Banon | 2db6e68 | 2019-01-12 19:01:10 +0300 | [diff] [blame] | 150 | .id = 0x6018, |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 151 | .l2_page_size = 8, |
| 152 | .pages_per_sector = 16, |
| 153 | .sectors_per_block = 16, |
| 154 | .nr_blocks = 256, |
Mike Banon | 2db6e68 | 2019-01-12 19:01:10 +0300 | [diff] [blame] | 155 | .name = "GD25LQ128", |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 156 | }, |
| 157 | }; |
| 158 | |
Furquan Shaikh | c28984d | 2016-11-20 21:04:00 -0800 | [diff] [blame] | 159 | static int gigadevice_write(const struct spi_flash *flash, u32 offset, |
| 160 | size_t len, const void *buf) |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 161 | { |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 162 | unsigned long byte_addr; |
| 163 | unsigned long page_size; |
| 164 | size_t chunk_len; |
| 165 | size_t actual; |
David Hendricks | 032c843 | 2014-04-11 19:48:55 -0700 | [diff] [blame] | 166 | int ret = 0; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 167 | u8 cmd[4]; |
| 168 | |
Furquan Shaikh | fc1a123 | 2017-05-12 00:19:56 -0700 | [diff] [blame] | 169 | page_size = flash->page_size; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 170 | |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 171 | for (actual = 0; actual < len; actual += chunk_len) { |
Aaron Durbin | 41f6690 | 2016-12-17 13:16:07 -0600 | [diff] [blame] | 172 | byte_addr = offset % page_size; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 173 | chunk_len = min(len - actual, page_size - byte_addr); |
Furquan Shaikh | de705fa | 2017-04-19 19:27:28 -0700 | [diff] [blame] | 174 | chunk_len = spi_crop_chunk(&flash->spi, sizeof(cmd), chunk_len); |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 175 | |
Furquan Shaikh | 810e2cd | 2016-12-05 20:32:24 -0800 | [diff] [blame] | 176 | ret = spi_flash_cmd(&flash->spi, CMD_GD25_WREN, NULL, 0); |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 177 | if (ret < 0) { |
| 178 | printk(BIOS_WARNING, |
| 179 | "SF gigadevice.c: Enabling Write failed\n"); |
| 180 | goto out; |
| 181 | } |
| 182 | |
| 183 | cmd[0] = CMD_GD25_PP; |
| 184 | cmd[1] = (offset >> 16) & 0xff; |
| 185 | cmd[2] = (offset >> 8) & 0xff; |
| 186 | cmd[3] = offset & 0xff; |
Martin Roth | e7d0a37 | 2017-06-24 14:02:00 -0600 | [diff] [blame] | 187 | #if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH) |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 188 | printk(BIOS_SPEW, |
Duncan Laurie | 23b0053 | 2012-10-10 14:21:23 -0700 | [diff] [blame] | 189 | "PP gigadevice.c: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }" |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 190 | " chunk_len = %zu\n", buf + actual, |
| 191 | cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); |
| 192 | #endif |
| 193 | |
Furquan Shaikh | 810e2cd | 2016-12-05 20:32:24 -0800 | [diff] [blame] | 194 | ret = spi_flash_cmd_write(&flash->spi, cmd, sizeof(cmd), |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 195 | buf + actual, chunk_len); |
| 196 | if (ret < 0) { |
| 197 | printk(BIOS_WARNING, |
| 198 | "SF gigadevice.c: Page Program failed\n"); |
| 199 | goto out; |
| 200 | } |
| 201 | |
| 202 | ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); |
| 203 | if (ret) |
| 204 | goto out; |
| 205 | |
| 206 | offset += chunk_len; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 207 | } |
| 208 | |
Martin Roth | e7d0a37 | 2017-06-24 14:02:00 -0600 | [diff] [blame] | 209 | #if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH) |
Marc Jones | 747127d | 2012-12-03 22:16:29 -0700 | [diff] [blame] | 210 | printk(BIOS_SPEW, |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 211 | "SF gigadevice.c: Successfully programmed %zu bytes @ %#x\n", |
| 212 | len, (unsigned int)(offset - len)); |
Marc Jones | 747127d | 2012-12-03 22:16:29 -0700 | [diff] [blame] | 213 | #endif |
| 214 | |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 215 | ret = 0; |
| 216 | |
| 217 | out: |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 218 | return ret; |
| 219 | } |
| 220 | |
Furquan Shaikh | e2fc5e2 | 2017-05-17 17:26:01 -0700 | [diff] [blame] | 221 | static const struct spi_flash_ops spi_flash_ops = { |
| 222 | .write = gigadevice_write, |
| 223 | .erase = spi_flash_cmd_erase, |
| 224 | .status = spi_flash_cmd_status, |
| 225 | #if IS_ENABLED(CONFIG_SPI_FLASH_NO_FAST_READ) |
| 226 | .read = spi_flash_cmd_read_slow, |
| 227 | #else |
| 228 | .read = spi_flash_cmd_read_fast, |
| 229 | #endif |
| 230 | }; |
| 231 | |
Furquan Shaikh | bd9e32e | 2017-05-15 23:28:41 -0700 | [diff] [blame] | 232 | int spi_flash_probe_gigadevice(const struct spi_slave *spi, u8 *idcode, |
Furquan Shaikh | 30221b4 | 2017-05-15 14:35:15 -0700 | [diff] [blame] | 233 | struct spi_flash *flash) |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 234 | { |
| 235 | const struct gigadevice_spi_flash_params *params; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 236 | unsigned int i; |
| 237 | |
| 238 | for (i = 0; i < ARRAY_SIZE(gigadevice_spi_flash_table); i++) { |
| 239 | params = &gigadevice_spi_flash_table[i]; |
| 240 | if (params->id == ((idcode[1] << 8) | idcode[2])) |
| 241 | break; |
| 242 | } |
| 243 | |
| 244 | if (i == ARRAY_SIZE(gigadevice_spi_flash_table)) { |
| 245 | printk(BIOS_WARNING, |
| 246 | "SF gigadevice.c: Unsupported ID %#02x%02x\n", |
| 247 | idcode[1], idcode[2]); |
Furquan Shaikh | 30221b4 | 2017-05-15 14:35:15 -0700 | [diff] [blame] | 248 | return -1; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 249 | } |
| 250 | |
Furquan Shaikh | 30221b4 | 2017-05-15 14:35:15 -0700 | [diff] [blame] | 251 | memcpy(&flash->spi, spi, sizeof(*spi)); |
| 252 | flash->name = params->name; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 253 | |
| 254 | /* Assuming power-of-two page size initially. */ |
Furquan Shaikh | 30221b4 | 2017-05-15 14:35:15 -0700 | [diff] [blame] | 255 | flash->page_size = 1 << params->l2_page_size; |
| 256 | flash->sector_size = flash->page_size * params->pages_per_sector; |
| 257 | flash->size = flash->sector_size * params->sectors_per_block * |
Furquan Shaikh | fc1a123 | 2017-05-12 00:19:56 -0700 | [diff] [blame] | 258 | params->nr_blocks; |
Furquan Shaikh | 30221b4 | 2017-05-15 14:35:15 -0700 | [diff] [blame] | 259 | flash->erase_cmd = CMD_GD25_SE; |
| 260 | flash->status_cmd = CMD_GD25_RDSR; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 261 | |
Furquan Shaikh | e2fc5e2 | 2017-05-17 17:26:01 -0700 | [diff] [blame] | 262 | flash->ops = &spi_flash_ops; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 263 | |
Furquan Shaikh | 30221b4 | 2017-05-15 14:35:15 -0700 | [diff] [blame] | 264 | return 0; |
Martin Roth | bceaf7f | 2012-09-07 15:02:35 -0600 | [diff] [blame] | 265 | } |