Patrick Georgi | 02363b5 | 2020-05-05 20:48:50 +0200 | [diff] [blame] | 1 | /* This file is part of the coreboot project. */ |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 2 | /* |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License as published by |
| 5 | * the Free Software Foundation; either version 2 of the License, or |
| 6 | * (at your option) any later version. |
Martin Roth | cddd600 | 2019-09-23 17:38:27 -0600 | [diff] [blame] | 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 12 | */ |
| 13 | |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 14 | #include <cbfs.h> |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 15 | #include <cbmem.h> |
| 16 | #include <commonlib/fsp.h> |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 17 | #include <commonlib/stdlib.h> |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 18 | #include <console/console.h> |
| 19 | #include <fsp/api.h> |
| 20 | #include <fsp/util.h> |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 21 | #include <program_loading.h> |
Keith Short | c58e3bd | 2019-05-10 11:14:31 -0600 | [diff] [blame] | 22 | #include <soc/intel/common/vbt.h> |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 23 | #include <stage_cache.h> |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 24 | #include <string.h> |
Alexandru Gagniuc | 010225c | 2016-05-06 08:22:45 -0700 | [diff] [blame] | 25 | #include <timestamp.h> |
Elyes HAOUAS | bd1683d | 2019-05-15 21:05:37 +0200 | [diff] [blame] | 26 | #include <types.h> |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 27 | |
| 28 | struct fsp_header fsps_hdr; |
| 29 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 30 | static void do_silicon_init(struct fsp_header *hdr) |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 31 | { |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 32 | FSPS_UPD *upd, *supd; |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 33 | fsp_silicon_init_fn silicon_init; |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 34 | uint32_t status; |
Keith Short | c58e3bd | 2019-05-10 11:14:31 -0600 | [diff] [blame] | 35 | uint8_t postcode; |
Wim Vervoorn | d137150 | 2019-12-17 14:10:16 +0100 | [diff] [blame] | 36 | const struct cbmem_entry *logo_entry = NULL; |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 37 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 38 | supd = (FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 39 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 40 | if (supd->FspUpdHeader.Signature != FSPS_UPD_SIGNATURE) |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 41 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 42 | "Invalid FSPS signature\n"); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 43 | |
Marshall Dawson | 71dbcf1 | 2019-09-11 14:02:34 -0600 | [diff] [blame] | 44 | /* Disallow invalid config regions. Default settings are likely bad |
| 45 | * choices for coreboot, and different sized UPD from what the region |
| 46 | * allows is potentially a build problem. |
| 47 | */ |
| 48 | if (!hdr->cfg_region_size || hdr->cfg_region_size != sizeof(FSPS_UPD)) |
| 49 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 50 | "Invalid FSPS UPD region\n"); |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 51 | |
Marshall Dawson | 71dbcf1 | 2019-09-11 14:02:34 -0600 | [diff] [blame] | 52 | upd = xmalloc(hdr->cfg_region_size); |
| 53 | |
| 54 | memcpy(upd, supd, hdr->cfg_region_size); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 55 | |
| 56 | /* Give SoC/mainboard a chance to populate entries */ |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 57 | platform_fsp_silicon_init_params_cb(upd); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 58 | |
Wim Vervoorn | d137150 | 2019-12-17 14:10:16 +0100 | [diff] [blame] | 59 | /* Populate logo related entries */ |
| 60 | if (CONFIG(FSP2_0_DISPLAY_LOGO)) |
| 61 | logo_entry = soc_load_logo(upd); |
Wim Vervoorn | cbc878d2 | 2019-11-28 14:45:12 +0100 | [diff] [blame] | 62 | |
Lee Leahy | 672df16 | 2016-07-24 18:21:13 -0700 | [diff] [blame] | 63 | /* Call SiliconInit */ |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 64 | silicon_init = (void *) (hdr->image_base + |
Alexandru Gagniuc | 010225c | 2016-05-06 08:22:45 -0700 | [diff] [blame] | 65 | hdr->silicon_init_entry_offset); |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 66 | fsp_debug_before_silicon_init(silicon_init, supd, upd); |
Lee Leahy | 672df16 | 2016-07-24 18:21:13 -0700 | [diff] [blame] | 67 | |
| 68 | timestamp_add_now(TS_FSP_SILICON_INIT_START); |
| 69 | post_code(POST_FSP_SILICON_INIT); |
Subrata Banik | 44ffb5d | 2018-05-24 10:51:29 +0530 | [diff] [blame] | 70 | status = silicon_init(upd); |
Alexandru Gagniuc | 010225c | 2016-05-06 08:22:45 -0700 | [diff] [blame] | 71 | timestamp_add_now(TS_FSP_SILICON_INIT_END); |
Subrata Banik | 0755ab9 | 2017-07-12 15:31:06 +0530 | [diff] [blame] | 72 | post_code(POST_FSP_SILICON_EXIT); |
Alexandru Gagniuc | 010225c | 2016-05-06 08:22:45 -0700 | [diff] [blame] | 73 | |
Wim Vervoorn | d137150 | 2019-12-17 14:10:16 +0100 | [diff] [blame] | 74 | if (logo_entry) |
Wim Vervoorn | cbc878d2 | 2019-11-28 14:45:12 +0100 | [diff] [blame] | 75 | cbmem_entry_remove(logo_entry); |
| 76 | |
Lee Leahy | 672df16 | 2016-07-24 18:21:13 -0700 | [diff] [blame] | 77 | fsp_debug_after_silicon_init(status); |
Aaron Durbin | 35d42c7 | 2016-07-18 12:41:09 -0500 | [diff] [blame] | 78 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 79 | /* Handle any errors returned by FspSiliconInit */ |
Aaron Durbin | 35d42c7 | 2016-07-18 12:41:09 -0500 | [diff] [blame] | 80 | fsp_handle_reset(status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 81 | if (status != FSP_SUCCESS) { |
Marshall Dawson | 7a9e894 | 2019-10-17 07:58:27 -0600 | [diff] [blame] | 82 | /* Assume video failure if attempted to initialize graphics */ |
| 83 | if (CONFIG(RUN_FSP_GOP) && vbt_get()) |
Keith Short | c58e3bd | 2019-05-10 11:14:31 -0600 | [diff] [blame] | 84 | postcode = POST_VIDEO_FAILURE; |
Marshall Dawson | 7a9e894 | 2019-10-17 07:58:27 -0600 | [diff] [blame] | 85 | else |
| 86 | postcode = POST_HW_INIT_FAILURE; /* else generic */ |
| 87 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 88 | printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status); |
Keith Short | c58e3bd | 2019-05-10 11:14:31 -0600 | [diff] [blame] | 89 | die_with_post_code(postcode, |
Subrata Banik | ab032b8 | 2019-05-29 13:59:14 +0530 | [diff] [blame] | 90 | "FspSiliconInit returned an error!\n"); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 91 | } |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 92 | } |
| 93 | |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 94 | void fsps_load(bool s3wake) |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 95 | { |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 96 | struct fsp_header *hdr = &fsps_hdr; |
| 97 | struct cbfsf file_desc; |
| 98 | struct region_device rdev; |
| 99 | const char *name = CONFIG_FSP_S_CBFS; |
| 100 | void *dest; |
| 101 | size_t size; |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 102 | struct prog fsps = PROG_INIT(PROG_REFCODE, name); |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 103 | static int load_done; |
| 104 | |
| 105 | if (load_done) |
| 106 | return; |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 107 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 108 | if (s3wake && !CONFIG(NO_STAGE_CACHE)) { |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 109 | printk(BIOS_DEBUG, "Loading FSPS from stage_cache\n"); |
| 110 | stage_cache_load_stage(STAGE_REFCODE, &fsps); |
| 111 | if (fsp_validate_component(hdr, prog_rdev(&fsps)) != CB_SUCCESS) |
| 112 | die("On resume fsps header is invalid\n"); |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 113 | load_done = 1; |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 114 | return; |
| 115 | } |
| 116 | |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 117 | if (cbfs_boot_locate(&file_desc, name, NULL)) { |
| 118 | printk(BIOS_ERR, "Could not locate %s in CBFS\n", name); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 119 | die("FSPS not available!\n"); |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | cbfs_file_data(&rdev, &file_desc); |
| 123 | |
| 124 | /* Load and relocate into CBMEM. */ |
| 125 | size = region_device_sz(&rdev); |
| 126 | dest = cbmem_add(CBMEM_ID_REFCODE, size); |
| 127 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 128 | if (dest == NULL) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 129 | die("Could not add FSPS to CBMEM!\n"); |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 130 | |
| 131 | if (rdev_readat(&rdev, dest, 0, size) < 0) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 132 | die("Failed to read FSPS!\n"); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 133 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 134 | if (fsp_component_relocate((uintptr_t)dest, dest, size) < 0) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 135 | die("Unable to relocate FSPS!\n"); |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 136 | |
| 137 | /* Create new region device in memory after relocation. */ |
| 138 | rdev_chain(&rdev, &addrspace_32bit.rdev, (uintptr_t)dest, size); |
| 139 | |
| 140 | if (fsp_validate_component(hdr, &rdev) != CB_SUCCESS) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 141 | die("Invalid FSPS header!\n"); |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 142 | |
Brandon Breitenstein | c6ec8dd | 2016-11-17 12:23:04 -0800 | [diff] [blame] | 143 | prog_set_area(&fsps, dest, size); |
| 144 | |
| 145 | stage_cache_add(STAGE_REFCODE, &fsps); |
| 146 | |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 147 | /* Signal that FSP component has been loaded. */ |
| 148 | prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL); |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 149 | load_done = 1; |
| 150 | } |
Aaron Durbin | 32ac018 | 2016-07-18 00:35:42 -0500 | [diff] [blame] | 151 | |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 152 | void fsp_silicon_init(bool s3wake) |
| 153 | { |
| 154 | fsps_load(s3wake); |
| 155 | do_silicon_init(&fsps_hdr); |
Andrey Petrov | 42c4e88 | 2016-02-25 14:17:45 -0800 | [diff] [blame] | 156 | } |
Wim Vervoorn | d137150 | 2019-12-17 14:10:16 +0100 | [diff] [blame] | 157 | |
| 158 | /* Load bmp and set FSP parameters, fsp_load_logo can be used */ |
| 159 | __weak const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd) |
| 160 | { |
| 161 | return NULL; |
| 162 | } |