Angel Pons | 89ab250 | 2020-04-03 01:22:28 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 2 | |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 3 | #include <device/pci_ops.h> |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 4 | #include <console/console.h> |
Keith Hui | 45e4ab4 | 2023-07-22 12:49:05 -0400 | [diff] [blame] | 5 | #include <northbridge/intel/sandybridge/raminit.h> |
Elyes HAOUAS | 4ad1446 | 2018-06-16 18:29:33 +0200 | [diff] [blame] | 6 | #include <southbridge/intel/bd82x6x/pch.h> |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 7 | #include <southbridge/intel/common/gpio.h> |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 8 | #include "ec.h" |
| 9 | |
Arthur Heymans | 2b28a16 | 2019-11-12 17:21:08 +0100 | [diff] [blame] | 10 | void mainboard_pch_lpc_setup(void) |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 11 | { |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 12 | /* Memory map KB9012 EC registers */ |
| 13 | pci_write_config32( |
Peter Lemenkov | 9b7ae2f | 2018-10-09 13:09:07 +0200 | [diff] [blame] | 14 | PCH_LPC_DEV, LGMR, |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 15 | CONFIG_EC_BASE_ADDRESS | 1); |
Peter Lemenkov | 9b7ae2f | 2018-10-09 13:09:07 +0200 | [diff] [blame] | 16 | pci_write_config16(PCH_LPC_DEV, BIOS_DEC_EN1, 0xffc0); |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 17 | |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 18 | /* Enable external USB port power. */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 19 | if (CONFIG(USBDEBUG)) |
Martin Roth | 5ef5c00 | 2017-03-24 11:08:32 -0600 | [diff] [blame] | 20 | ec_mm_set_bit(0x3b, 4); |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 21 | } |
| 22 | |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 23 | static const char *mainboard_spd_names[9] = { |
| 24 | "ELPIDA 4GB", |
| 25 | "SAMSUNG 4GB", |
| 26 | "HYNIX 4GB", |
| 27 | "ELPIDA 8GB", |
| 28 | "SAMSUNG 8GB", |
| 29 | "HYNIX 8GB", |
| 30 | "ELPIDA 2GB", |
| 31 | "SAMSUNG 2GB", |
| 32 | "HYNIX 2GB", |
| 33 | }; |
| 34 | |
Keith Hui | 45e4ab4 | 2023-07-22 12:49:05 -0400 | [diff] [blame] | 35 | static unsigned int get_spd_index(void) |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 36 | { |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 37 | const int spd_gpios[] = {71, 70, 16, 48, -1}; |
| 38 | |
Keith Hui | 45e4ab4 | 2023-07-22 12:49:05 -0400 | [diff] [blame] | 39 | unsigned int spd_index = get_gpios(spd_gpios); |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 40 | if (spd_index >= ARRAY_SIZE(mainboard_spd_names)) { |
| 41 | /* Fallback to pessimistic 2GB image (ELPIDA 2GB) */ |
| 42 | spd_index = 6; |
| 43 | } |
| 44 | |
Keith Hui | 45e4ab4 | 2023-07-22 12:49:05 -0400 | [diff] [blame] | 45 | return spd_index; |
| 46 | } |
| 47 | |
| 48 | void mb_get_spd_map(struct spd_info *spdi) |
| 49 | { |
| 50 | unsigned int spd_index = get_spd_index(); |
| 51 | |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 52 | printk(BIOS_INFO, "SPD index %d (%s)\n", |
| 53 | spd_index, mainboard_spd_names[spd_index]); |
| 54 | |
Peter Lemenkov | 6b7d40a | 2020-01-22 11:40:16 +0100 | [diff] [blame] | 55 | /* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */ |
Keith Hui | 45e4ab4 | 2023-07-22 12:49:05 -0400 | [diff] [blame] | 56 | spdi->addresses[0] = SPD_MEMORY_DOWN; |
| 57 | spdi->spd_index = spd_index; |
Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame] | 58 | } |