Tobias Diedrich | cee930a | 2017-02-12 14:09:06 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2017 Tobias Diedrich <ranma+coreboot@tdiedrich.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <stdint.h> |
| 17 | #include <string.h> |
| 18 | #include <cbfs.h> |
| 19 | #include <lib.h> |
| 20 | #include <timestamp.h> |
| 21 | #include <arch/byteorder.h> |
| 22 | #include <arch/io.h> |
| 23 | #include <device/pci_def.h> |
| 24 | #include <device/pnp_def.h> |
| 25 | #include <cpu/x86/lapic.h> |
| 26 | #include <arch/acpi.h> |
| 27 | #include <console/console.h> |
| 28 | #include "northbridge/intel/sandybridge/sandybridge.h" |
| 29 | #include "northbridge/intel/sandybridge/raminit_native.h" |
| 30 | #include "southbridge/intel/bd82x6x/pch.h" |
| 31 | #include <southbridge/intel/common/gpio.h> |
| 32 | #include <arch/cpu.h> |
| 33 | #include <cpu/x86/msr.h> |
| 34 | #include "ec.h" |
| 35 | |
| 36 | #define SPD_LEN 256 |
| 37 | |
| 38 | void pch_enable_lpc(void) |
| 39 | { |
| 40 | pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x0c00); |
| 41 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x00000000); |
| 42 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x000c0701); |
| 43 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000c0069); |
| 44 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x000c06a1); |
| 45 | pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000); |
| 46 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xac, 0x00010000); |
| 47 | |
| 48 | /* Memory map KB9012 EC registers */ |
| 49 | pci_write_config32( |
| 50 | PCI_DEV(0, 0x1f, 0), 0x98, |
| 51 | CONFIG_EC_BASE_ADDRESS | 1); |
| 52 | pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xd8, 0xffc0); |
| 53 | |
| 54 | #ifdef CONFIG_USBDEBUG |
| 55 | /* Enable external USB port power. */ |
| 56 | ec_mm_set_bit(0x3b, 4); |
| 57 | #endif |
| 58 | } |
| 59 | |
| 60 | void rcba_config(void) |
| 61 | { |
| 62 | /* Disable devices. */ |
| 63 | RCBA32(0x3414) = 0x00000020; |
| 64 | RCBA32(0x3418) = 0x17f41fe3; |
| 65 | |
| 66 | } |
| 67 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 68 | { 1, 1, 0 }, |
| 69 | { 1, 0, 0 }, |
| 70 | { 1, 1, 1 }, |
| 71 | { 1, 0, 1 }, |
| 72 | { 1, 1, 2 }, |
| 73 | { 1, 0, 2 }, |
| 74 | { 0, 0, 3 }, |
| 75 | { 0, 1, 3 }, |
| 76 | { 1, 0, 4 }, |
| 77 | { 1, 1, 4 }, |
| 78 | { 1, 1, 5 }, |
| 79 | { 1, 1, 5 }, |
| 80 | { 1, 1, 6 }, |
| 81 | { 1, 1, 6 }, |
| 82 | }; |
| 83 | |
| 84 | void mainboard_early_init(int s3resume) |
| 85 | { |
| 86 | } |
| 87 | |
| 88 | void mainboard_config_superio(void) |
| 89 | { |
| 90 | } |
| 91 | |
| 92 | static const char *mainboard_spd_names[9] = { |
| 93 | "ELPIDA 4GB", |
| 94 | "SAMSUNG 4GB", |
| 95 | "HYNIX 4GB", |
| 96 | "ELPIDA 8GB", |
| 97 | "SAMSUNG 8GB", |
| 98 | "HYNIX 8GB", |
| 99 | "ELPIDA 2GB", |
| 100 | "SAMSUNG 2GB", |
| 101 | "HYNIX 2GB", |
| 102 | }; |
| 103 | |
| 104 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
| 105 | { |
| 106 | void *spd_file; |
| 107 | size_t spd_file_len = 0; |
| 108 | const int spd_gpios[] = {71, 70, 16, 48, -1}; |
| 109 | |
| 110 | u32 spd_index = get_gpios(spd_gpios); |
| 111 | if (spd_index >= ARRAY_SIZE(mainboard_spd_names)) { |
| 112 | /* Fallback to pessimistic 2GB image (ELPIDA 2GB) */ |
| 113 | spd_index = 6; |
| 114 | } |
| 115 | |
| 116 | printk(BIOS_INFO, "SPD index %d (%s)\n", |
| 117 | spd_index, mainboard_spd_names[spd_index]); |
| 118 | |
| 119 | /* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */ |
| 120 | spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD, |
| 121 | &spd_file_len); |
| 122 | |
| 123 | if (!spd_file || spd_file_len < SPD_LEN * spd_index + SPD_LEN) |
| 124 | die("SPD data not found."); |
| 125 | |
| 126 | memcpy(spd, spd_file + SPD_LEN * spd_index, SPD_LEN); |
| 127 | } |