Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 LiPPERT Embedded Computers GmbH |
| 5 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 6 | * |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
Stefan Reinauer | 38f147e | 2010-02-08 12:20:50 +0000 | [diff] [blame] | 18 | /* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */ |
Uwe Hermann | 86c9b88 | 2008-11-19 13:42:14 +0000 | [diff] [blame] | 19 | |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 20 | #include <stdlib.h> |
| 21 | #include <stdint.h> |
| 22 | #include <device/pci_def.h> |
| 23 | #include <arch/io.h> |
| 24 | #include <device/pnp_def.h> |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 25 | #include <console/console.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 26 | #include <cpu/x86/bist.h> |
| 27 | #include <cpu/x86/msr.h> |
Kyösti Mälkki | 5276941 | 2016-06-17 07:55:03 +0300 | [diff] [blame] | 28 | #include <cpu/amd/car.h> |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 29 | #include <cpu/amd/lxdef.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 30 | #include <southbridge/amd/cs5536/cs5536.h> |
Patrick Georgi | 9bd9a90 | 2010-11-20 10:31:00 +0000 | [diff] [blame] | 31 | #include <spd.h> |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 32 | #include "southbridge/amd/cs5536/early_smbus.c" |
| 33 | #include "southbridge/amd/cs5536/early_setup.c" |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 34 | #include <superio/ite/common/ite.h> |
| 35 | #include <superio/ite/it8712f/it8712f.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 36 | #include <northbridge/amd/lx/raminit.h> |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 37 | |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 38 | #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) |
| 39 | #define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO) |
| 40 | |
Christian Gmeiner | c4e07bb | 2013-06-04 17:34:35 +0200 | [diff] [blame] | 41 | int spd_read_byte(unsigned int device, unsigned int address) |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 42 | { |
Uwe Hermann | 86c9b88 | 2008-11-19 13:42:14 +0000 | [diff] [blame] | 43 | if (device != DIMM0) |
| 44 | return 0xFF; /* No DIMM1, don't even try. */ |
| 45 | |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 46 | return smbus_read_byte(device, address); |
| 47 | } |
| 48 | |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 49 | #include "northbridge/amd/lx/pll_reset.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 50 | #include "lib/generic_sdram.c" |
Kyösti Mälkki | 7916f4c | 2012-02-09 16:07:41 +0200 | [diff] [blame] | 51 | #include "cpu/amd/geode_lx/cpureginit.c" |
| 52 | #include "cpu/amd/geode_lx/syspreinit.c" |
| 53 | #include "cpu/amd/geode_lx/msrinit.c" |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 54 | |
Elyes HAOUAS | a5aad2e | 2016-09-19 09:47:16 -0600 | [diff] [blame] | 55 | static const u16 sio_init_table[] = { // hi = data, lo = index |
Jens Rottmann | c914053 | 2010-09-03 15:16:36 +0000 | [diff] [blame] | 56 | 0x1E2C, // disable ATXPG; VIN6,FAN4/5,VIN3 enabled, VIN7 internal |
| 57 | 0x1423, // don't delay PoWeROK1/2 - triggers 2nd reset |
| 58 | 0x9072, // watchdog triggers PWROK, counts seconds |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 59 | #if !CONFIG_USE_WATCHDOG_ON_BOOT |
Jens Rottmann | c914053 | 2010-09-03 15:16:36 +0000 | [diff] [blame] | 60 | 0x0073, 0x0074, // disarm watchdog by changing 56 s timeout to 0 |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 61 | #endif |
| 62 | 0xBF25, 0x372A, 0xF326, // select GPIO function for most pins |
Elyes HAOUAS | a5aad2e | 2016-09-19 09:47:16 -0600 | [diff] [blame] | 63 | 0xBF27, 0xFF28, 0x2529, // (GP36 = FAN_CTL3, GP13 = PWROK1) |
Jens Rottmann | c914053 | 2010-09-03 15:16:36 +0000 | [diff] [blame] | 64 | 0x46B8, 0x0CB9, // enable pullups on RS485_EN |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 65 | 0x36C0, // enable Simple-I/O for GP15,14,12,11= LIVE_LED, WD_ACTIVE, RS485_EN2,1 |
| 66 | 0xFFC3, // enable Simple-I/O for GP47-40 (GPIOs on Supervisory Connector) |
| 67 | 0x26C8, // config GP15,12,11 as output; GP14 as input |
| 68 | 0x2DF5, // map Hw Monitor Thermal Output to GP55 |
Elyes HAOUAS | a5aad2e | 2016-09-19 09:47:16 -0600 | [diff] [blame] | 69 | 0x0DF8, // map GP LED Blinking 1 to GP15 = LIVE_LED (deactivate Simple-I/O to use) |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 70 | }; |
| 71 | |
| 72 | /* Early mainboard specific GPIO setup. */ |
| 73 | static void mb_gpio_init(void) |
| 74 | { |
| 75 | int i; |
| 76 | |
Uwe Hermann | 86c9b88 | 2008-11-19 13:42:14 +0000 | [diff] [blame] | 77 | /* Init Super I/O WDT, GPIOs. Done early, WDT init may trigger reset! */ |
Uwe Hermann | 86c9b88 | 2008-11-19 13:42:14 +0000 | [diff] [blame] | 78 | for (i = 0; i < ARRAY_SIZE(sio_init_table); i++) { |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 79 | u16 reg = sio_init_table[i]; |
| 80 | ite_reg_write(GPIO_DEV, (u8) reg, (reg >> 8)); |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 81 | } |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 82 | } |
| 83 | |
Kyösti Mälkki | 8e1f908 | 2017-03-07 11:10:55 +0200 | [diff] [blame] | 84 | void asmlinkage mainboard_romstage_entry(unsigned long bist) |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 85 | { |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 86 | |
| 87 | static const struct mem_controller memctrl[] = { |
Uwe Hermann | 6dc92f0 | 2010-11-21 11:36:03 +0000 | [diff] [blame] | 88 | {.channel0 = {DIMM0, DIMM1}} |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 89 | }; |
| 90 | |
| 91 | SystemPreInit(); |
| 92 | msr_init(); |
| 93 | |
| 94 | cs5536_early_setup(); |
| 95 | |
Uwe Hermann | 86c9b88 | 2008-11-19 13:42:14 +0000 | [diff] [blame] | 96 | /* |
| 97 | * Note: must do this AFTER the early_setup! It is counting on some |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 98 | * early MSR setup for CS5536. |
| 99 | */ |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 100 | ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 101 | mb_gpio_init(); |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 102 | console_init(); |
| 103 | |
Stefan Reinauer | 9839cbd | 2010-04-21 20:06:10 +0000 | [diff] [blame] | 104 | /* Halt if there was a built in self test failure */ |
| 105 | report_bist_failure(bist); |
| 106 | |
Patrick Georgi | 7dc2864 | 2012-07-13 19:06:22 +0200 | [diff] [blame] | 107 | pll_reset(); |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 108 | |
Edwin Beasant | f333ba0 | 2010-06-10 15:24:57 +0000 | [diff] [blame] | 109 | cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 110 | |
| 111 | sdram_initialize(1, memctrl); |
| 112 | |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 113 | /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 114 | } |