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Alexandru Gagniucfccfee32014-03-26 18:51:08 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Alexandru Gagniucfccfee32014-03-26 18:51:08 -050014 */
15
Kyösti Mälkki526c2fb2014-07-10 22:16:58 +030016#include "AGESA.h"
Kyösti Mälkki26f297e2014-05-26 11:27:54 +030017#include <northbridge/amd/agesa/BiosCallOuts.h>
Alexandru Gagniuc1d87dac2014-03-28 14:48:13 -050018
19#include <cbfs.h>
20#include <southbridge/amd/agesa/hudson/imc.h>
21#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
Kyösti Mälkki6025efa2014-05-05 13:20:56 +030022#include <stdlib.h>
Alexandru Gagniucfccfee32014-03-26 18:51:08 -050023
Stefan Reinauerdd132a52015-07-30 11:16:37 -070024static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr);
Kyösti Mälkkif5f9e382014-10-17 23:21:01 +030025
Kyösti Mälkki6025efa2014-05-05 13:20:56 +030026const BIOS_CALLOUT_STRUCT BiosCallouts[] =
Alexandru Gagniucfccfee32014-03-26 18:51:08 -050027{
Kyösti Mälkki83cc3b02014-05-04 23:13:08 +030028 {AGESA_DO_RESET, agesa_Reset },
Kyösti Mälkkic5cc9f22014-10-17 22:33:22 +030029 {AGESA_READ_SPD, agesa_ReadSpd },
Kyösti Mälkki83cc3b02014-05-04 23:13:08 +030030 {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
31 {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
32 {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
33 {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
34 {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
Alexandru Gagniucfccfee32014-03-26 18:51:08 -050035 {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config },
Kyösti Mälkkicb989f22014-05-04 23:13:08 +030036 {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
Alexandru Gagniucfccfee32014-03-26 18:51:08 -050037};
Kyösti Mälkki6025efa2014-05-05 13:20:56 +030038const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
Alexandru Gagniucfccfee32014-03-26 18:51:08 -050039
40/**
41 * AMD Parmer Platform ALC272 Verb Table
42 */
43static const CODEC_ENTRY Parmer_Alc272_VerbTbl[] = {
44 {0x11, 0x411111F0},
45 {0x12, 0x411111F0},
46 {0x13, 0x411111F0},
47 {0x14, 0x411111F0},
48 {0x15, 0x411111F0},
49 {0x16, 0x411111F0},
50 {0x17, 0x411111F0},
51 {0x18, 0x01a19840},
52 {0x19, 0x411111F0},
53 {0x1a, 0x01813030},
54 {0x1b, 0x411111F0},
55 {0x1d, 0x40130605},
56 {0x1e, 0x01441120},
57 {0x21, 0x01211010},
58 {0xff, 0xffffffff}
59};
60
61static const CODEC_TBL_LIST CodecTableList[] =
62{
63 {0x10ec0272, (CODEC_ENTRY*)&Parmer_Alc272_VerbTbl[0]},
64 {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL}
65};
66
67#define FAN_INPUT_INTERNAL_DIODE 0
68#define FAN_INPUT_TEMP0 1
69#define FAN_INPUT_TEMP1 2
70#define FAN_INPUT_TEMP2 3
71#define FAN_INPUT_TEMP3 4
72#define FAN_INPUT_TEMP0_FILTER 5
73#define FAN_INPUT_ZERO 6
74#define FAN_INPUT_DISABLED 7
75
76#define FAN_AUTOMODE (1 << 0)
77#define FAN_LINEARMODE (1 << 1)
78#define FAN_STEPMODE ~(1 << 1)
79#define FAN_POLARITY_HIGH (1 << 2)
80#define FAN_POLARITY_LOW ~(1 << 2)
81
82/* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */
83#define FREQ_28KHZ 0x0
84#define FREQ_25KHZ 0x1
85#define FREQ_23KHZ 0x2
86#define FREQ_21KHZ 0x3
87#define FREQ_29KHZ 0x4
88#define FREQ_18KHZ 0x5
89#define FREQ_100HZ 0xF7
90#define FREQ_87HZ 0xF8
91#define FREQ_58HZ 0xF9
92#define FREQ_44HZ 0xFA
93#define FREQ_35HZ 0xFB
94#define FREQ_29HZ 0xFC
95#define FREQ_22HZ 0xFD
96#define FREQ_14HZ 0xFE
97#define FREQ_11HZ 0xFF
98
99/* Parmer Hardware Monitor Fan Control
100 * Hardware limitation:
101 * HWM failed to read the input temperture vi I2C,
102 * if other software switch the I2C switch by mistake or intention.
103 * We recommend to using IMC to control Fans, instead of HWM.
104 */
105static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
106{
107 /* Enable IMC fan control. the recommand way */
108#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM)
109
110 imc_reg_init();
111
112 /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */
113 FchParams->Hwm.HwMonitorEnable = TRUE;
114 FchParams->Hwm.HwmFchtsiAutoPoll = FALSE;/* 0 disable, 1 enable TSI Auto Polling */
115
116 FchParams->Imc.ImcEnable = TRUE;
117 FchParams->Hwm.HwmControl = 1; /* 1 IMC, 0 HWM */
118 FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC , 1 enable IMC, 0 following hw strap setting */
119
120 LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), FchParams->StdHeader);
121
122 /* Thermal Zone Parameter */
123 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00;
124 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */
125 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d; //BIT0 | BIT2 | BIT5;
126 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0x0e;//6 | BIT3;
127 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00;
128 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x54;
129 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x98; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */
130 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x02;
131 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01; /* PWM steping rate in unit of PWM level percentage */
132 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00;
133
134 /* IMC Fan Policy temperature thresholds */
135 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00;
136 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */
137 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg2 = 0x46;///80; /*AC0 threshold in Celsius */
138 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg3 = 0x3c; /*AC1 threshold in Celsius */
139 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg4 = 0x32; /*AC2 threshold in Celsius */
140 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 threshold in Celsius, 0xFF is not define */
141 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 threshold in Celsius, 0xFF is not define */
142 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 threshold in Celsius, 0xFF is not define */
143 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 threshold in Celsius, 0xFF is not define */
144 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 lowest threshold in Celsius, 0xFF is not define */
145 FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*critical threshold* in Celsius, 0xFF is not define */
146 FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00;
147
148 /* IMC Fan Policy PWM Settings */
149 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00;
150 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */
151 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg2 = 0x5a; /* AL0 percentage */
152 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg3 = 0x46; /* AL1 percentage */
153 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg4 = 0x28; /* AL2 percentage */
154 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percentage */
155 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percentage */
156 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percentage */
157 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percentage */
158 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percentage */
159
160 FchParams->Imc.EcStruct.IMCFUNSupportBitMap = 0x111;//BIT0 | BIT4 |BIT8;
161
162 /* NOTE:
163 * FchInitLateHwm will overwrite the EcStruct with EcDefaultMassege,
164 * AGESA put EcDefaultMassege as global data in ROM, so we can't overwride it.
165 * so we remove it from AGESA code. Please Seee FchInitLateHwm.
166 */
167
168#else /* HWM fan control, the way not recommand */
169 FchParams->Imc.ImcEnable = FALSE;
170 FchParams->Hwm.HwMonitorEnable = TRUE;
171 FchParams->Hwm.HwmFchtsiAutoPoll = TRUE;/* 1 enable, 0 disable TSI Auto Polling */
172
173#endif /* CONFIG_HUDSON_IMC_FWM */
174}
175
176/**
177 * Fch Oem setting callback
178 *
179 * Configure platform specific Hudson device,
180 * such Azalia, SATA, IMC etc.
181 */
Stefan Reinauerdd132a52015-07-30 11:16:37 -0700182static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
Alexandru Gagniucfccfee32014-03-26 18:51:08 -0500183{
Kyösti Mälkkidfad0702014-07-10 06:32:36 +0300184 AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
Alexandru Gagniucfccfee32014-03-26 18:51:08 -0500185
Kyösti Mälkkidfad0702014-07-10 06:32:36 +0300186 if (StdHeader->Func == AMD_INIT_RESET) {
Kyösti Mälkkib1666282014-07-06 22:40:15 +0300187 FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
Alexandru Gagniucfccfee32014-03-26 18:51:08 -0500188 printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
189 //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
Kyösti Mälkki37ab7292014-07-10 06:43:44 +0300190 FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
Kyösti Mälkkib1666282014-07-06 22:40:15 +0300191 FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
192 FchParams_reset->FchReset.Xhci1Enable = FALSE;
Kyösti Mälkkidfad0702014-07-10 06:32:36 +0300193 } else if (StdHeader->Func == AMD_INIT_ENV) {
Alexandru Gagniucfccfee32014-03-26 18:51:08 -0500194 FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
195 printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
196
197 /* Azalia Controller OEM Codec Table Pointer */
198 FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]);
199 /* Azalia Controller Front Panel OEM Table Pointer */
200
201 /* Fan Control */
202 oem_fan_control(FchParams_env);
203
204 /* XHCI configuration */
Kyösti Mälkkib1666282014-07-06 22:40:15 +0300205 FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
Alexandru Gagniucfccfee32014-03-26 18:51:08 -0500206 FchParams_env->Usb.Xhci1Enable = FALSE;
207
208 /* sata configuration */
209 }
210 printk(BIOS_DEBUG, "Done\n");
211
212 return AGESA_SUCCESS;
213}