blob: de8e2f1ecc59217811192f038144bdd3f429a506 [file] [log] [blame]
Arthur Heymans6d3682e2023-07-13 12:34:04 +02001## SPDX-License-Identifier: GPL-2.0-only
2ifeq ($(CONFIG_SOC_AMD_GENOA),y)
3
Arthur Heymanse4eba132023-07-13 14:02:42 +02004all-y += mmap_boot.c
Arthur Heymansb4aaa6f2023-07-13 14:11:18 +02005all-y += reset.c
Arthur Heymansc5c35ce2023-07-13 14:05:08 +02006all-y += config.c
Varshit Pandya95d78d92023-10-04 19:30:21 +05307all-y += gpio.c
Varshit Pandya970d7702023-10-06 18:14:02 +05308all-y += uart.c
Arthur Heymanse4eba132023-07-13 14:02:42 +02009
Arthur Heymans6d3682e2023-07-13 12:34:04 +020010bootblock-y += early_fch.c
Arthur Heymans4da9d6b42023-07-13 14:19:09 +020011bootblock-y += aoac.c
Arthur Heymans6d3682e2023-07-13 12:34:04 +020012
13romstage-y += romstage.c
14
Arthur Heymans4da9d6b42023-07-13 14:19:09 +020015ramstage-y += aoac.c
Arthur Heymans6d3682e2023-07-13 12:34:04 +020016ramstage-y += chip.c
Felix Held926887c2023-10-13 21:19:53 +020017ramstage-y += domain.c
Felix Heldbe9fcf12023-08-23 22:15:39 +020018ramstage-y += root_complex.c
Arthur Heymans6d3682e2023-07-13 12:34:04 +020019
20CPPFLAGS_common += -I$(src)/soc/amd/genoa/include
21
Arthur Heymans926d55c2023-07-13 12:50:45 +020022ifeq ($(call int-gt, $(CONFIG_ROM_SIZE) 0x1000000), 1)
23CBFSTOOL_ADD_CMD_OPTIONS+= --mmap 0:0xff000000:0x1000000
24endif
25
Arthur Heymans8f1c7072023-07-13 12:52:49 +020026#
27# PSP Directory Table items
28#
29# Certain ordering requirements apply, however these are ensured by amdfwtool.
30# For more information see "AMD Platform Security Processor BIOS Implementation
31# Guide for Server EPYC Processors" #57299
32#
33
34FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}')
35
36ifeq ($(CONFIG_PSP_DISABLE_POSTCODES),y)
37PSP_SOFTFUSE_BITS += 7
38endif
39
40ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
41# Enable secure debug unlock
42PSP_SOFTFUSE_BITS += 0
43OPT_TOKEN_UNLOCK="--token-unlock"
44endif
45
46# Use additional Soft Fuse bits specified in Kconfig
47PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS))
48
49# type = 0x3a
50ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
51PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
52endif
53
54# type = 0x55
Arthur Heymans8f1c7072023-07-13 12:52:49 +020055SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE)
Arthur Heymans8f1c7072023-07-13 12:52:49 +020056
57#
58# BIOS Directory Table items - proper ordering is managed by amdfwtool
59#
60
61# type = 0x60
62PSP_APCB_FILES=$(APCB_SOURCES) $(APCB1_SOURCES) $(APCB_SOURCES_RECOVERY) $(APCB_SOURCES_RECOVERY1) $(APCB_SOURCES_RECOVERY2)
63
64# type = 0x61
65PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS)
66
67# type = 0x62
68PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
69PSP_ELF_FILE=$(objcbfs)/bootblock.elf
70PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}')
71PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
72
73# Helper function to return a value with given bit set
74# Soft Fuse type = 0xb - See #57299 (NDA) for bit definitions.
75set-bit=$(call int-shift-left, 1 $(call _toint,$1))
76PSP_SOFTFUSE=$(shell A=$(call int-add, \
77 $(foreach bit,$(PSP_SOFTFUSE_BITS),$(call set-bit,$(bit)))); printf "0x%x" $$A)
78
79#
80# Build the arguments to amdfwtool (order is unimportant). Missing file names
81# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
82#
83
84add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
85
86OPT_PSP_APCB_FILES= $(if $(APCB_SOURCES), --instance 0 --apcb $(APCB_SOURCES)) \
87 $(if $(APCB_SOURCES1), --instance 1 --apcb $(APCB_SOURCES1)) \
88 $(if $(APCB_SOURCES_RECOVERY), --instance 10 --apcb $(APCB_SOURCES_RECOVERY)) \
89 $(if $(APCB_SOURCES_RECOVERY1), --instance 18 --apcb $(APCB_SOURCES_RECOVERY1)) \
90 $(if $(APCB_SOURCES_RECOVERY2), --instance 19 --apcb $(APCB_SOURCES_RECOVERY2)) \
91 $(if $(APCB_SOURCES_68), --instance 18 --apcb $(APCB_SOURCES_68))
92
93OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
94OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
95OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
96OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
97
98OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
99OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
100OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag)
101OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
102
103OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
104OPT_SPL_TABLE_FILE=$(call add_opt_prefix, $(SPL_TABLE_FILE), --spl-table)
105
106AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
107 $(OPT_APOB_ADDR) \
108 $(OPT_DEBUG_AMDFWTOOL) \
109 $(OPT_PSP_BIOSBIN_FILE) \
110 $(OPT_PSP_BIOSBIN_DEST) \
111 $(OPT_PSP_BIOSBIN_SIZE) \
112 $(OPT_PSP_SOFTFUSE) \
113 --use-pspsecureos \
114 $(OPT_TOKEN_UNLOCK) \
115 $(OPT_WHITELIST_FILE) \
116 $(OPT_SPL_TABLE_FILE) \
117 $(OPT_EFS_SPI_READ_MODE) \
118 $(OPT_EFS_SPI_SPEED) \
119 $(OPT_EFS_SPI_MICRON_FLAG) \
120 --config $(CONFIG_AMDFW_CONFIG_FILE) \
121 --flashsize 0x1000000
122
123$(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
124 $$(PSP_APCB_FILES) \
125 $(DEP_FILES) \
126 $(AMDFWTOOL) \
127 $(obj)/fmap_config.h \
128 $(objcbfs)/bootblock.elf # this target also creates the .map file
129 $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set))
130 rm -f $@
131 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
132 $(AMDFWTOOL) \
133 $(AMDFW_COMMON_ARGS) \
134 --location $(CONFIG_AMD_FWM_POSITION) \
135 --multilevel \
136 --output $@
137
138$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
139 rm -f $@
140 @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
141 $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
142 --maxsize $(PSP_BIOSBIN_SIZE)
143
Arthur Heymans6d3682e2023-07-13 12:34:04 +0200144endif