soc/amd/genoa: Deal with memory map for 32M or larger flash
Only the lower half of the flash gets memory mapped below 4G in the
current setup.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Change-Id: Iffe5c17a50f3254411a4847c7e635ce0fd282fde
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76499
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/genoa/Makefile.inc b/src/soc/amd/genoa/Makefile.inc
index de996d6..164c5e9 100644
--- a/src/soc/amd/genoa/Makefile.inc
+++ b/src/soc/amd/genoa/Makefile.inc
@@ -1,6 +1,8 @@
## SPDX-License-Identifier: GPL-2.0-only
ifeq ($(CONFIG_SOC_AMD_GENOA),y)
+all-y += mmap_boot.c
+
bootblock-y += early_fch.c
romstage-y += romstage.c