blob: f5de8c38faef9005c14bc33e8a51717aaf65347f [file] [log] [blame]
Patrick Georgi23f38cd2012-11-16 14:50:32 +01001ramstage-y += model_206ax_init.c
Stefan Reinauer5c554632012-04-04 00:09:50 +02002subdirs-y += ../../x86/name
Vladimir Serbinenkoc16e9dfa2015-05-29 16:18:01 +02003subdirs-y += ../smm/gen1
Matt DeVilliered6fe2f2016-12-14 16:12:43 -06004subdirs-y += ../common
Stefan Reinauer5c554632012-04-04 00:09:50 +02005
Arthur Heymans7e6946a2019-01-21 17:55:02 +01006subdirs-y += ../../x86/tsc
7subdirs-y += ../../x86/mtrr
8subdirs-y += ../../x86/lapic
9subdirs-y += ../../x86/cache
10subdirs-y += ../../x86/smm
11subdirs-y += ../microcode
12subdirs-y += ../turbo
13
Vladimir Serbinenko822bc652014-01-03 15:55:40 +010014ramstage-y += acpi.c
Stefan Reinauer5c554632012-04-04 00:09:50 +020015
Patrick Rudolph74203de2017-11-20 11:57:01 +010016ramstage-y += common.c
17romstage-y += common.c
Kyösti Mälkki9265f892019-07-07 23:58:34 +030018smm-y += common.c
Patrick Rudolph74203de2017-11-20 11:57:01 +010019
Patrick Rudolphb9959e22017-06-06 10:44:29 +020020ramstage-y += tsc_freq.c
21romstage-y += tsc_freq.c
Philipp Deppenwiese66f9a092018-11-08 10:59:40 +010022postcar-y += tsc_freq.c
Kyösti Mälkki9265f892019-07-07 23:58:34 +030023smm-y += tsc_freq.c
Patrick Rudolphb9959e22017-06-06 10:44:29 +020024
Kyösti Mälkki9265f892019-07-07 23:58:34 +030025smm-y += finalize.c
Stefan Reinauer5c554632012-04-04 00:09:50 +020026
Arthur Heymans67031a52018-02-05 19:08:03 +010027romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
Arthur Heymans6fcd7b82018-06-03 12:16:24 +020028postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
Arthur Heymans67031a52018-02-05 19:08:03 +010029ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
30
Arthur Heymansa4492902019-06-17 10:50:47 +020031cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-2a-*)
32cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3a-*)
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -050033
Arthur Heymansdd4d8952018-06-03 12:04:26 +020034cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S
35postcar-y += ../car/non-evict/exit_car.S
Arthur Heymansdd4d8952018-06-03 12:04:26 +020036
Kyösti Mälkki75d139b2016-06-17 10:00:28 +030037romstage-y += ../car/romstage.c