Patrick Georgi | 23f38cd | 2012-11-16 14:50:32 +0100 | [diff] [blame] | 1 | ramstage-y += model_206ax_init.c |
Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 2 | subdirs-y += ../../x86/name |
Vladimir Serbinenko | c16e9dfa | 2015-05-29 16:18:01 +0200 | [diff] [blame] | 3 | subdirs-y += ../smm/gen1 |
Matt DeVillier | ed6fe2f | 2016-12-14 16:12:43 -0600 | [diff] [blame] | 4 | subdirs-y += ../common |
Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 5 | |
Arthur Heymans | 7e6946a | 2019-01-21 17:55:02 +0100 | [diff] [blame] | 6 | subdirs-y += ../../x86/tsc |
| 7 | subdirs-y += ../../x86/mtrr |
| 8 | subdirs-y += ../../x86/lapic |
| 9 | subdirs-y += ../../x86/cache |
| 10 | subdirs-y += ../../x86/smm |
| 11 | subdirs-y += ../microcode |
| 12 | subdirs-y += ../turbo |
| 13 | |
Vladimir Serbinenko | 822bc65 | 2014-01-03 15:55:40 +0100 | [diff] [blame] | 14 | ramstage-y += acpi.c |
Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 15 | |
Patrick Rudolph | 74203de | 2017-11-20 11:57:01 +0100 | [diff] [blame] | 16 | ramstage-y += common.c |
| 17 | romstage-y += common.c |
| 18 | smm-$(CONFIG_HAVE_SMI_HANDLER) += common.c |
| 19 | |
Patrick Rudolph | b9959e2 | 2017-06-06 10:44:29 +0200 | [diff] [blame] | 20 | ramstage-y += tsc_freq.c |
| 21 | romstage-y += tsc_freq.c |
Philipp Deppenwiese | 66f9a09 | 2018-11-08 10:59:40 +0100 | [diff] [blame^] | 22 | postcar-y += tsc_freq.c |
Patrick Rudolph | b9959e2 | 2017-06-06 10:44:29 +0200 | [diff] [blame] | 23 | smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c |
| 24 | |
Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 25 | smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c |
| 26 | |
Arthur Heymans | 67031a5 | 2018-02-05 19:08:03 +0100 | [diff] [blame] | 27 | romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c |
Arthur Heymans | 6fcd7b8 | 2018-06-03 12:16:24 +0200 | [diff] [blame] | 28 | postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c |
Arthur Heymans | 67031a5 | 2018-02-05 19:08:03 +0100 | [diff] [blame] | 29 | ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c |
| 30 | |
Alexandru Gagniuc | 1d85700 | 2015-09-09 22:38:06 -0700 | [diff] [blame] | 31 | cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_206ax/microcode.bin |
| 32 | cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_306ax/microcode.bin |
Alexandru Gagniuc | 00b579a | 2012-07-20 00:11:21 -0500 | [diff] [blame] | 33 | |
Arthur Heymans | dd4d895 | 2018-06-03 12:04:26 +0200 | [diff] [blame] | 34 | cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S |
| 35 | postcar-y += ../car/non-evict/exit_car.S |
Arthur Heymans | dd4d895 | 2018-06-03 12:04:26 +0200 | [diff] [blame] | 36 | |
Kyösti Mälkki | 75d139b | 2016-06-17 10:00:28 +0300 | [diff] [blame] | 37 | romstage-y += ../car/romstage.c |