Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 3 | |
| 4 | #include <console/console.h> |
| 5 | #include <device/device.h> |
| 6 | #include <device/pci.h> |
| 7 | #include <device/pci_ids.h> |
Kyösti Mälkki | cbf9571 | 2020-01-05 08:05:45 +0200 | [diff] [blame] | 8 | #include <option.h> |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 9 | #include <pc80/mc146818rtc.h> |
| 10 | #include <pc80/isa-dma.h> |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 11 | #include <pc80/i8259.h> |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 12 | #include <arch/io.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 13 | #include <device/pci_ops.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 14 | #include <arch/ioapic.h> |
Stefan Reinauer | ab87254 | 2011-10-14 15:18:29 -0700 | [diff] [blame] | 15 | #include <arch/acpi.h> |
Sven Schnelle | f4dc1a7 | 2011-06-05 11:33:41 +0200 | [diff] [blame] | 16 | #include <cpu/x86/smm.h> |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 17 | #include <arch/acpigen.h> |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 18 | #include <arch/smp/mpspec.h> |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 19 | #include <cbmem.h> |
| 20 | #include <string.h> |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 21 | #include <southbridge/intel/common/acpi_pirq_gen.h> |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 22 | #include <southbridge/intel/common/pmbase.h> |
Arthur Heymans | b429c5b | 2019-05-28 13:24:15 +0200 | [diff] [blame] | 23 | #include <southbridge/intel/common/spi.h> |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 24 | |
Arthur Heymans | 742df5a | 2019-06-03 16:24:41 +0200 | [diff] [blame] | 25 | #include "chip.h" |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 26 | #include "i82801gx.h" |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 27 | #include "nvs.h" |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 28 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 29 | #define NMI_OFF 0 |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 30 | |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 31 | typedef struct southbridge_intel_i82801gx_config config_t; |
| 32 | |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 33 | /** |
Martin Roth | 2ed0aa2 | 2016-01-05 20:58:58 -0700 | [diff] [blame] | 34 | * Set miscellaneous static southbridge features. |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 35 | * |
| 36 | * @param dev PCI device with I/O APIC control registers |
| 37 | */ |
| 38 | static void i82801gx_enable_ioapic(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 39 | { |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 40 | /* Enable ACPI I/O range decode */ |
Kyösti Mälkki | 1cca340 | 2013-02-26 19:21:39 +0200 | [diff] [blame] | 41 | pci_write_config8(dev, ACPI_CNTL, ACPI_EN); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 42 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 43 | set_ioapic_id(VIO_APIC_VADDR, 0x02); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 44 | |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 45 | /* |
| 46 | * Select Boot Configuration register (0x03) and |
| 47 | * use Processor System Bus (0x01) to deliver interrupts. |
| 48 | */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 49 | io_apic_write(VIO_APIC_VADDR, 0x03, 0x01); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 50 | } |
| 51 | |
| 52 | static void i82801gx_enable_serial_irqs(struct device *dev) |
| 53 | { |
| 54 | /* Set packet length and toggle silent mode bit for one frame. */ |
| 55 | pci_write_config8(dev, SERIRQ_CNTL, |
| 56 | (1 << 7) | (1 << 6) | ((21 - 17) << 2) | (0 << 0)); |
| 57 | } |
| 58 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 59 | /* PIRQ[n]_ROUT[3:0] - PIRQ Routing Control |
| 60 | * 0x00 - 0000 = Reserved |
| 61 | * 0x01 - 0001 = Reserved |
| 62 | * 0x02 - 0010 = Reserved |
| 63 | * 0x03 - 0011 = IRQ3 |
| 64 | * 0x04 - 0100 = IRQ4 |
| 65 | * 0x05 - 0101 = IRQ5 |
| 66 | * 0x06 - 0110 = IRQ6 |
| 67 | * 0x07 - 0111 = IRQ7 |
| 68 | * 0x08 - 1000 = Reserved |
| 69 | * 0x09 - 1001 = IRQ9 |
| 70 | * 0x0A - 1010 = IRQ10 |
| 71 | * 0x0B - 1011 = IRQ11 |
| 72 | * 0x0C - 1100 = IRQ12 |
| 73 | * 0x0D - 1101 = Reserved |
| 74 | * 0x0E - 1110 = IRQ14 |
| 75 | * 0x0F - 1111 = IRQ15 |
| 76 | * PIRQ[n]_ROUT[7] - PIRQ Routing Control |
| 77 | * 0x80 - The PIRQ is not routed. |
| 78 | */ |
| 79 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 80 | static void i82801gx_pirq_init(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 81 | { |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 82 | struct device *irq_dev; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 83 | /* Get the chip configuration */ |
| 84 | config_t *config = dev->chip_info; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 85 | |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 86 | pci_write_config8(dev, PIRQA_ROUT, config->pirqa_routing); |
| 87 | pci_write_config8(dev, PIRQB_ROUT, config->pirqb_routing); |
| 88 | pci_write_config8(dev, PIRQC_ROUT, config->pirqc_routing); |
| 89 | pci_write_config8(dev, PIRQD_ROUT, config->pirqd_routing); |
| 90 | |
| 91 | pci_write_config8(dev, PIRQE_ROUT, config->pirqe_routing); |
| 92 | pci_write_config8(dev, PIRQF_ROUT, config->pirqf_routing); |
| 93 | pci_write_config8(dev, PIRQG_ROUT, config->pirqg_routing); |
| 94 | pci_write_config8(dev, PIRQH_ROUT, config->pirqh_routing); |
| 95 | |
| 96 | /* Eric Biederman once said we should let the OS do this. |
| 97 | * I am not so sure anymore he was right. |
| 98 | */ |
| 99 | |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 100 | for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 101 | u8 int_pin = 0, int_line = 0; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 102 | |
| 103 | if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) |
| 104 | continue; |
| 105 | |
| 106 | int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN); |
| 107 | |
| 108 | switch (int_pin) { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 109 | case 1: |
| 110 | /* INTA# */ int_line = config->pirqa_routing; break; |
| 111 | case 2: |
| 112 | /* INTB# */ int_line = config->pirqb_routing; break; |
| 113 | case 3: |
| 114 | /* INTC# */ int_line = config->pirqc_routing; break; |
| 115 | case 4: |
| 116 | /* INTD# */ int_line = config->pirqd_routing; break; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 117 | } |
| 118 | |
| 119 | if (!int_line) |
| 120 | continue; |
| 121 | |
| 122 | pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line); |
| 123 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 124 | } |
| 125 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 126 | static void i82801gx_gpi_routing(struct device *dev) |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 127 | { |
| 128 | /* Get the chip configuration */ |
| 129 | config_t *config = dev->chip_info; |
| 130 | u32 reg32 = 0; |
| 131 | |
| 132 | /* An array would be much nicer here, or some |
| 133 | * other method of doing this. |
| 134 | */ |
| 135 | reg32 |= (config->gpi0_routing & 0x03) << 0; |
| 136 | reg32 |= (config->gpi1_routing & 0x03) << 2; |
| 137 | reg32 |= (config->gpi2_routing & 0x03) << 4; |
| 138 | reg32 |= (config->gpi3_routing & 0x03) << 6; |
| 139 | reg32 |= (config->gpi4_routing & 0x03) << 8; |
| 140 | reg32 |= (config->gpi5_routing & 0x03) << 10; |
| 141 | reg32 |= (config->gpi6_routing & 0x03) << 12; |
| 142 | reg32 |= (config->gpi7_routing & 0x03) << 14; |
| 143 | reg32 |= (config->gpi8_routing & 0x03) << 16; |
| 144 | reg32 |= (config->gpi9_routing & 0x03) << 18; |
| 145 | reg32 |= (config->gpi10_routing & 0x03) << 20; |
| 146 | reg32 |= (config->gpi11_routing & 0x03) << 22; |
| 147 | reg32 |= (config->gpi12_routing & 0x03) << 24; |
| 148 | reg32 |= (config->gpi13_routing & 0x03) << 26; |
| 149 | reg32 |= (config->gpi14_routing & 0x03) << 28; |
| 150 | reg32 |= (config->gpi15_routing & 0x03) << 30; |
| 151 | |
Kyösti Mälkki | b85a87b | 2014-12-29 11:32:27 +0200 | [diff] [blame] | 152 | pci_write_config32(dev, GPIO_ROUT, reg32); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 153 | } |
| 154 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 155 | static void i82801gx_power_options(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 156 | { |
| 157 | u8 reg8; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 158 | u16 reg16; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 159 | u32 reg32; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 160 | const char *state; |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 161 | /* Get the chip configuration */ |
| 162 | config_t *config = dev->chip_info; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 163 | |
Nico Huber | 9faae2b | 2018-11-14 00:00:35 +0100 | [diff] [blame] | 164 | int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE; |
Luc Verhaegen | a9c5ea0 | 2009-06-03 14:19:33 +0000 | [diff] [blame] | 165 | int nmi_option; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 166 | |
| 167 | /* Which state do we want to goto after g3 (power restored)? |
| 168 | * 0 == S0 Full On |
| 169 | * 1 == S5 Soft Off |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 170 | * |
| 171 | * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 172 | */ |
Varad Gautam | 06ef046 | 2015-03-11 09:54:41 +0530 | [diff] [blame] | 173 | pwr_on = MAINBOARD_POWER_ON; |
| 174 | get_option(&pwr_on, "power_on_after_fail"); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 175 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 176 | reg8 = pci_read_config8(dev, GEN_PMCON_3); |
| 177 | reg8 &= 0xfe; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 178 | switch (pwr_on) { |
| 179 | case MAINBOARD_POWER_OFF: |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 180 | reg8 |= 1; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 181 | state = "off"; |
| 182 | break; |
| 183 | case MAINBOARD_POWER_ON: |
| 184 | reg8 &= ~1; |
| 185 | state = "on"; |
| 186 | break; |
| 187 | case MAINBOARD_POWER_KEEP: |
| 188 | reg8 &= ~1; |
| 189 | state = "state keep"; |
| 190 | break; |
| 191 | default: |
| 192 | state = "undefined"; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 193 | } |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 194 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 195 | reg8 |= (3 << 4); /* avoid #S4 assertions */ |
Martin Roth | 2ed0aa2 | 2016-01-05 20:58:58 -0700 | [diff] [blame] | 196 | reg8 &= ~(1 << 3); /* minimum assertion is 1 to 2 RTCCLK */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 197 | |
| 198 | pci_write_config8(dev, GEN_PMCON_3, reg8); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 199 | printk(BIOS_INFO, "Set power %s after power failure.\n", state); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 200 | |
| 201 | /* Set up NMI on errors. */ |
| 202 | reg8 = inb(0x61); |
| 203 | reg8 &= 0x0f; /* Higher Nibble must be 0 */ |
| 204 | reg8 &= ~(1 << 3); /* IOCHK# NMI Enable */ |
| 205 | // reg8 &= ~(1 << 2); /* PCI SERR# Enable */ |
| 206 | reg8 |= (1 << 2); /* PCI SERR# Disable for now */ |
| 207 | outb(reg8, 0x61); |
| 208 | |
| 209 | reg8 = inb(0x70); |
| 210 | nmi_option = NMI_OFF; |
Luc Verhaegen | a9c5ea0 | 2009-06-03 14:19:33 +0000 | [diff] [blame] | 211 | get_option(&nmi_option, "nmi"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 212 | if (nmi_option) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 213 | printk(BIOS_INFO, "NMI sources enabled.\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 214 | reg8 &= ~(1 << 7); /* Set NMI. */ |
| 215 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 216 | printk(BIOS_INFO, "NMI sources disabled.\n"); |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 217 | reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 218 | } |
| 219 | outb(reg8, 0x70); |
| 220 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 221 | /* Enable CPU_SLP# and Intel Speedstep, set SMI# rate down */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 222 | reg16 = pci_read_config16(dev, GEN_PMCON_1); |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 223 | reg16 &= ~(3 << 0); // SMI# rate 1 minute |
| 224 | reg16 |= (1 << 2); // CLKRUN_EN - Mobile/Ultra only |
| 225 | reg16 |= (1 << 3); // Speedstep Enable - Mobile/Ultra only |
| 226 | reg16 |= (1 << 5); // CPUSLP_EN Desktop only |
Sven Schnelle | 906f9ae | 2011-10-23 16:35:01 +0200 | [diff] [blame] | 227 | |
| 228 | if (config->c4onc3_enable) |
| 229 | reg16 |= (1 << 7); |
| 230 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 231 | // another laptop wants this? |
| 232 | // reg16 &= ~(1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only |
| 233 | reg16 |= (1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 234 | #if DEBUG_PERIODIC_SMIS |
| 235 | /* Set DEBUG_PERIODIC_SMIS in i82801gx.h to debug using |
| 236 | * periodic SMIs. |
| 237 | */ |
| 238 | reg16 |= (3 << 0); // Periodic SMI every 8s |
| 239 | #endif |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 240 | pci_write_config16(dev, GEN_PMCON_1, reg16); |
| 241 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 242 | // Set the board's GPI routing. |
| 243 | i82801gx_gpi_routing(dev); |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 244 | |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 245 | write_pmbase32(GPE0_EN, config->gpe0_en); |
| 246 | write_pmbase16(ALT_GP_SMI_EN, config->alt_gp_smi_en); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 247 | |
| 248 | /* Set up power management block and determine sleep mode */ |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 249 | reg32 = read_pmbase32(PM1_CNT); |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 250 | |
| 251 | reg32 &= ~(7 << 10); // SLP_TYP |
| 252 | reg32 |= (1 << 1); // enable C3->C0 transition on bus master |
| 253 | reg32 |= (1 << 0); // SCI_EN |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 254 | write_pmbase32(PM1_CNT, reg32); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 255 | } |
| 256 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 257 | static void i82801gx_configure_cstates(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 258 | { |
| 259 | u8 reg8; |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 260 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 261 | reg8 = pci_read_config8(dev, 0xa9); // Cx state configuration |
| 262 | reg8 |= (1 << 4) | (1 << 3) | (1 << 2); // Enable Popup & Popdown |
| 263 | pci_write_config8(dev, 0xa9, reg8); |
| 264 | |
| 265 | // Set Deeper Sleep configuration to recommended values |
| 266 | reg8 = pci_read_config8(dev, 0xaa); |
| 267 | reg8 &= 0xf0; |
| 268 | reg8 |= (2 << 2); // Deeper Sleep to Stop CPU: 34-40us |
| 269 | reg8 |= (2 << 0); // Deeper Sleep to Sleep: 15us |
| 270 | pci_write_config8(dev, 0xaa, reg8); |
| 271 | } |
| 272 | |
| 273 | static void i82801gx_rtc_init(struct device *dev) |
| 274 | { |
| 275 | u8 reg8; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 276 | int rtc_failed; |
| 277 | |
| 278 | reg8 = pci_read_config8(dev, GEN_PMCON_3); |
| 279 | rtc_failed = reg8 & RTC_BATTERY_DEAD; |
| 280 | if (rtc_failed) { |
| 281 | reg8 &= ~RTC_BATTERY_DEAD; |
| 282 | pci_write_config8(dev, GEN_PMCON_3, reg8); |
| 283 | } |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 284 | printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 285 | |
Gabe Black | b3f08c6 | 2014-04-30 17:12:25 -0700 | [diff] [blame] | 286 | cmos_init(rtc_failed); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 287 | } |
| 288 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 289 | static void enable_hpet(void) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 290 | { |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 291 | u32 reg32; |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 292 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 293 | /* Move HPET to default address 0xfed00000 and enable it */ |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 294 | reg32 = RCBA32(HPTC); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 295 | reg32 |= (1 << 7); // HPET Address Enable |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 296 | reg32 &= ~(3 << 0); |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 297 | RCBA32(HPTC) = reg32; |
Arthur Heymans | c73c923 | 2019-10-02 14:57:50 +0200 | [diff] [blame] | 298 | /* On NM10 this only works if read back */ |
| 299 | RCBA32(HPTC); |
| 300 | |
| 301 | write32((u32 *)0xfed00010, read32((u32 *)0xfed00010) | 1); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 302 | } |
| 303 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 304 | static void enable_clock_gating(void) |
| 305 | { |
| 306 | u32 reg32; |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 307 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 308 | /* Enable Clock Gating for most devices */ |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 309 | reg32 = RCBA32(CG); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 310 | reg32 |= (1 << 31); // LPC clock gating |
| 311 | reg32 |= (1 << 30); // PATA clock gating |
| 312 | // SATA clock gating |
| 313 | reg32 |= (1 << 27) | (1 << 26) | (1 << 25) | (1 << 24); |
| 314 | reg32 |= (1 << 23); // AC97 clock gating |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 315 | reg32 |= (1 << 19); // USB EHCI clock gating |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 316 | reg32 |= (1 << 3) | (1 << 1); // DMI clock gating |
| 317 | reg32 |= (1 << 2); // PCIe clock gating; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 318 | reg32 &= ~(1 << 20); // No static clock gating for USB |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 319 | reg32 &= ~((1 << 29) | (1 << 28)); // Disable UHCI clock gating |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 320 | RCBA32(CG) = reg32; |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 321 | } |
Stefan Reinauer | 269563a | 2009-01-19 21:20:22 +0000 | [diff] [blame] | 322 | |
Kyösti Mälkki | 83d6a8a | 2019-07-12 08:16:53 +0300 | [diff] [blame] | 323 | static void i82801gx_set_acpi_mode(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 324 | { |
Kyösti Mälkki | 44da9e7 | 2019-10-09 12:32:16 +0300 | [diff] [blame] | 325 | if (CONFIG(HAVE_SMI_HANDLER)) { |
| 326 | if (!acpi_is_wakeup_s3()) { |
| 327 | printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n"); |
| 328 | outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode |
| 329 | printk(BIOS_DEBUG, "done.\n"); |
| 330 | } else { |
| 331 | printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n"); |
| 332 | outb(APM_CNT_ACPI_ENABLE, APM_CNT); |
| 333 | } |
Sven Schnelle | e261807 | 2011-06-05 11:39:12 +0200 | [diff] [blame] | 334 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 335 | } |
| 336 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 337 | #define SPIBASE 0x3020 |
| 338 | static void i82801gx_spi_init(void) |
| 339 | { |
| 340 | u16 spicontrol; |
| 341 | |
| 342 | spicontrol = RCBA16(SPIBASE + 2); |
| 343 | spicontrol &= ~(1 << 0); // SPI Access Request |
| 344 | RCBA16(SPIBASE + 2) = spicontrol; |
| 345 | } |
| 346 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 347 | static void i82801gx_fixups(struct device *dev) |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 348 | { |
| 349 | /* This needs to happen after PCI enumeration */ |
| 350 | RCBA32(0x1d40) |= 1; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 351 | |
| 352 | /* USB Transient Disconnect Detect: |
| 353 | * Prevent a SE0 condition on the USB ports from being |
| 354 | * interpreted by the UHCI controller as a disconnect |
| 355 | */ |
| 356 | pci_write_config8(dev, 0xad, 0x3); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 357 | } |
| 358 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 359 | static void lpc_init(struct device *dev) |
| 360 | { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 361 | printk(BIOS_DEBUG, "i82801gx: lpc_init\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 362 | |
| 363 | /* Set the value for PCI command register. */ |
| 364 | pci_write_config16(dev, PCI_COMMAND, 0x000f); |
| 365 | |
| 366 | /* IO APIC initialization. */ |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 367 | i82801gx_enable_ioapic(dev); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 368 | |
| 369 | i82801gx_enable_serial_irqs(dev); |
| 370 | |
| 371 | /* Setup the PIRQ. */ |
| 372 | i82801gx_pirq_init(dev); |
| 373 | |
| 374 | /* Setup power options. */ |
| 375 | i82801gx_power_options(dev); |
| 376 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 377 | /* Configure Cx state registers */ |
| 378 | i82801gx_configure_cstates(dev); |
| 379 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 380 | /* Set the state of the GPIO lines. */ |
| 381 | //gpio_init(dev); |
| 382 | |
| 383 | /* Initialize the real time clock. */ |
| 384 | i82801gx_rtc_init(dev); |
| 385 | |
| 386 | /* Initialize ISA DMA. */ |
| 387 | isa_dma_init(); |
| 388 | |
| 389 | /* Initialize the High Precision Event Timers, if present. */ |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 390 | enable_hpet(); |
| 391 | |
| 392 | /* Initialize Clock Gating */ |
| 393 | enable_clock_gating(); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 394 | |
| 395 | setup_i8259(); |
| 396 | |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 397 | /* The OS should do this? */ |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 398 | /* Interrupt 9 should be level triggered (SCI) */ |
| 399 | i8259_configure_irq_trigger(9, 1); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 400 | |
Kyösti Mälkki | 44da9e7 | 2019-10-09 12:32:16 +0300 | [diff] [blame] | 401 | i82801gx_set_acpi_mode(dev); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 402 | |
| 403 | i82801gx_spi_init(); |
| 404 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 405 | i82801gx_fixups(dev); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 406 | } |
| 407 | |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 408 | unsigned long acpi_fill_madt(unsigned long current) |
| 409 | { |
| 410 | /* Local APICs */ |
| 411 | current = acpi_create_madt_lapics(current); |
| 412 | |
| 413 | /* IOAPIC */ |
| 414 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, |
| 415 | 2, IO_APIC_ADDR, 0); |
| 416 | |
| 417 | /* LAPIC_NMI */ |
| 418 | current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *) |
| 419 | current, 0, |
| 420 | MP_IRQ_POLARITY_HIGH | |
| 421 | MP_IRQ_TRIGGER_EDGE, 0x01); |
| 422 | current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *) |
| 423 | current, 1, MP_IRQ_POLARITY_HIGH | |
| 424 | MP_IRQ_TRIGGER_EDGE, 0x01); |
| 425 | |
| 426 | /* INT_SRC_OVR */ |
| 427 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 428 | current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE); |
| 429 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 430 | current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL); |
| 431 | |
| 432 | |
| 433 | return current; |
| 434 | } |
| 435 | |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 436 | void acpi_fill_fadt(acpi_fadt_t *fadt) |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 437 | { |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 438 | struct device *dev = pcidev_on_root(0x1f, 0); |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 439 | config_t *chip = dev->chip_info; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 440 | u16 pmbase = lpc_get_pmbase(); |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 441 | |
| 442 | fadt->pm1a_evt_blk = pmbase; |
| 443 | fadt->pm1b_evt_blk = 0x0; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 444 | fadt->pm1a_cnt_blk = pmbase + PM1_CNT; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 445 | fadt->pm1b_cnt_blk = 0x0; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 446 | fadt->pm2_cnt_blk = pmbase + PM2_CNT; |
| 447 | fadt->pm_tmr_blk = pmbase + PM1_TMR; |
| 448 | fadt->gpe0_blk = pmbase + GPE0_STS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 449 | fadt->gpe1_blk = 0; |
| 450 | |
| 451 | fadt->pm1_evt_len = 4; |
| 452 | fadt->pm1_cnt_len = 2; |
| 453 | fadt->pm2_cnt_len = 1; |
| 454 | fadt->pm_tmr_len = 4; |
| 455 | fadt->gpe0_blk_len = 8; |
| 456 | fadt->gpe1_blk_len = 0; |
| 457 | fadt->gpe1_base = 0; |
| 458 | |
| 459 | fadt->reset_reg.space_id = 1; |
| 460 | fadt->reset_reg.bit_width = 8; |
| 461 | fadt->reset_reg.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 462 | fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 463 | fadt->reset_reg.addrl = 0xcf9; |
| 464 | fadt->reset_reg.addrh = 0; |
| 465 | |
| 466 | fadt->reset_value = 6; |
| 467 | |
| 468 | fadt->x_pm1a_evt_blk.space_id = 1; |
| 469 | fadt->x_pm1a_evt_blk.bit_width = 32; |
| 470 | fadt->x_pm1a_evt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 471 | fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 472 | fadt->x_pm1a_evt_blk.addrl = pmbase; |
| 473 | fadt->x_pm1a_evt_blk.addrh = 0x0; |
| 474 | |
| 475 | fadt->x_pm1b_evt_blk.space_id = 0; |
| 476 | fadt->x_pm1b_evt_blk.bit_width = 0; |
| 477 | fadt->x_pm1b_evt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 478 | fadt->x_pm1b_evt_blk.access_size = 0; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 479 | fadt->x_pm1b_evt_blk.addrl = 0x0; |
| 480 | fadt->x_pm1b_evt_blk.addrh = 0x0; |
| 481 | |
| 482 | fadt->x_pm1a_cnt_blk.space_id = 1; |
| 483 | fadt->x_pm1a_cnt_blk.bit_width = 16; |
| 484 | fadt->x_pm1a_cnt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 485 | fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 486 | fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 487 | fadt->x_pm1a_cnt_blk.addrh = 0x0; |
| 488 | |
| 489 | fadt->x_pm1b_cnt_blk.space_id = 0; |
| 490 | fadt->x_pm1b_cnt_blk.bit_width = 0; |
| 491 | fadt->x_pm1b_cnt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 492 | fadt->x_pm1b_cnt_blk.access_size = 0; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 493 | fadt->x_pm1b_cnt_blk.addrl = 0x0; |
| 494 | fadt->x_pm1b_cnt_blk.addrh = 0x0; |
| 495 | |
| 496 | fadt->x_pm2_cnt_blk.space_id = 1; |
| 497 | fadt->x_pm2_cnt_blk.bit_width = 8; |
| 498 | fadt->x_pm2_cnt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 499 | fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 500 | fadt->x_pm2_cnt_blk.addrl = pmbase + PM2_CNT; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 501 | fadt->x_pm2_cnt_blk.addrh = 0x0; |
| 502 | |
| 503 | fadt->x_pm_tmr_blk.space_id = 1; |
| 504 | fadt->x_pm_tmr_blk.bit_width = 32; |
| 505 | fadt->x_pm_tmr_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 506 | fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 507 | fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 508 | fadt->x_pm_tmr_blk.addrh = 0x0; |
| 509 | |
| 510 | fadt->x_gpe0_blk.space_id = 1; |
| 511 | fadt->x_gpe0_blk.bit_width = 64; |
| 512 | fadt->x_gpe0_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 513 | fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
Elyes HAOUAS | 7118701 | 2019-02-10 14:58:13 +0100 | [diff] [blame] | 514 | fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 515 | fadt->x_gpe0_blk.addrh = 0x0; |
| 516 | |
| 517 | fadt->x_gpe1_blk.space_id = 0; |
| 518 | fadt->x_gpe1_blk.bit_width = 0; |
| 519 | fadt->x_gpe1_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 520 | fadt->x_gpe1_blk.access_size = 0; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 521 | fadt->x_gpe1_blk.addrl = 0x0; |
| 522 | fadt->x_gpe1_blk.addrh = 0x0; |
| 523 | fadt->day_alrm = 0xd; |
| 524 | fadt->mon_alrm = 0x00; |
| 525 | fadt->century = 0x32; |
| 526 | |
Elyes HAOUAS | 0d4de2a | 2019-02-28 13:04:29 +0100 | [diff] [blame] | 527 | fadt->reserved = 0; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 528 | fadt->sci_int = 0x9; |
| 529 | fadt->smi_cmd = APM_CNT; |
| 530 | fadt->acpi_enable = APM_CNT_ACPI_ENABLE; |
| 531 | fadt->acpi_disable = APM_CNT_ACPI_DISABLE; |
| 532 | fadt->s4bios_req = 0x0; |
| 533 | fadt->pstate_cnt = APM_CNT_PST_CONTROL; |
| 534 | |
| 535 | fadt->cst_cnt = APM_CNT_CST_CONTROL; |
| 536 | fadt->p_lvl2_lat = 1; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 537 | fadt->p_lvl3_lat = chip->c3_latency; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 538 | fadt->flush_size = 0; |
| 539 | fadt->flush_stride = 0; |
| 540 | fadt->duty_offset = 1; |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 541 | if (chip->p_cnt_throttling_supported) |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 542 | fadt->duty_width = 3; |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 543 | else |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 544 | fadt->duty_width = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 545 | fadt->iapc_boot_arch = 0x03; |
| 546 | fadt->flags = (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
| 547 | | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
| 548 | | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_RESET_REGISTER |
| 549 | | ACPI_FADT_C2_MP_SUPPORTED); |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 550 | if (chip->docking_supported) |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 551 | fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 552 | } |
| 553 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 554 | static void i82801gx_lpc_read_resources(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 555 | { |
| 556 | struct resource *res; |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 557 | u8 io_index = 0; |
| 558 | int i; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 559 | |
| 560 | /* Get the normal PCI resources of this device. */ |
| 561 | pci_dev_read_resources(dev); |
| 562 | |
| 563 | /* Add an extra subtractive resource for both memory and I/O. */ |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 564 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 565 | res->base = 0; |
| 566 | res->size = 0x1000; |
| 567 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 568 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 569 | |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 570 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 571 | res->base = 0xff800000; |
| 572 | res->size = 0x00800000; /* 8 MB for flash */ |
| 573 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 574 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 575 | |
| 576 | res = new_resource(dev, 3); /* IOAPIC */ |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 577 | res->base = IO_APIC_ADDR; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 578 | res->size = 0x00001000; |
| 579 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 580 | |
| 581 | /* Set IO decode ranges if required.*/ |
| 582 | for (i = 0; i < 4; i++) { |
| 583 | u32 gen_dec; |
| 584 | gen_dec = pci_read_config32(dev, 0x84 + 4 * i); |
| 585 | |
| 586 | if ((gen_dec & 0xFFFC) > 0x1000) { |
| 587 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
| 588 | res->base = gen_dec & 0xFFFC; |
| 589 | res->size = (gen_dec >> 16) & 0xFC; |
| 590 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 591 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 592 | } |
| 593 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 594 | } |
| 595 | |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 596 | #define SPIBAR16(x) RCBA16(0x3020 + x) |
| 597 | #define SPIBAR32(x) RCBA32(0x3020 + x) |
| 598 | |
| 599 | static void lpc_final(struct device *dev) |
| 600 | { |
| 601 | u16 tco1_cnt; |
| 602 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 603 | if (!CONFIG(INTEL_CHIPSET_LOCKDOWN)) |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 604 | return; |
| 605 | |
Arthur Heymans | 767de0a | 2019-11-15 19:19:53 +0100 | [diff] [blame] | 606 | if (CONFIG(BOOT_DEVICE_SPI_FLASH)) |
| 607 | spi_finalize_ops(); |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 608 | |
| 609 | /* Lock SPIBAR */ |
| 610 | SPIBAR16(0) = SPIBAR16(0) | (1 << 15); |
| 611 | |
| 612 | /* BIOS Interface Lockdown */ |
| 613 | RCBA32(0x3410) |= 1 << 0; |
| 614 | |
| 615 | /* Global SMI Lock */ |
| 616 | pci_or_config16(dev, GEN_PMCON_1, 1 << 4); |
| 617 | |
| 618 | /* TCO_Lock */ |
| 619 | tco1_cnt = inw(DEFAULT_PMBASE + 0x60 + TCO1_CNT); |
| 620 | tco1_cnt |= (1 << 12); /* TCO lock */ |
| 621 | outw(tco1_cnt, DEFAULT_PMBASE + 0x60 + TCO1_CNT); |
| 622 | |
| 623 | /* Indicate finalize step with post code */ |
| 624 | outb(POST_OS_BOOT, 0x80); |
| 625 | } |
| 626 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 627 | static void southbridge_inject_dsdt(struct device *dev) |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 628 | { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 629 | global_nvs_t *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 630 | |
| 631 | if (gnvs) { |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 632 | memset(gnvs, 0, sizeof(*gnvs)); |
Vladimir Serbinenko | 385743a | 2014-10-18 02:26:21 +0200 | [diff] [blame] | 633 | |
| 634 | gnvs->apic = 1; |
| 635 | gnvs->mpen = 1; /* Enable Multi Processing */ |
| 636 | |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 637 | acpi_create_gnvs(gnvs); |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 638 | |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 639 | /* And tell SMI about it */ |
| 640 | smm_setup_structures(gnvs, NULL, NULL); |
| 641 | |
| 642 | /* Add it to SSDT. */ |
Vladimir Serbinenko | 1bad88e | 2014-11-04 21:20:56 +0100 | [diff] [blame] | 643 | acpigen_write_scope("\\"); |
| 644 | acpigen_write_name_dword("NVSA", (u32) gnvs); |
| 645 | acpigen_pop_len(); |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 646 | } |
| 647 | } |
| 648 | |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 649 | static const char *lpc_acpi_name(const struct device *dev) |
| 650 | { |
| 651 | return "LPCB"; |
| 652 | } |
| 653 | |
Elyes HAOUAS | 38f1d13 | 2018-09-17 08:44:18 +0200 | [diff] [blame] | 654 | static void southbridge_fill_ssdt(struct device *device) |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 655 | { |
| 656 | intel_acpi_gen_def_acpi_pirq(device); |
| 657 | } |
| 658 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 659 | static struct pci_operations pci_ops = { |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 660 | .set_subsystem = pci_dev_set_subsystem, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 661 | }; |
| 662 | |
| 663 | static struct device_operations device_ops = { |
| 664 | .read_resources = i82801gx_lpc_read_resources, |
| 665 | .set_resources = pci_dev_set_resources, |
Myles Watson | 7eac445 | 2010-06-17 16:16:56 +0000 | [diff] [blame] | 666 | .enable_resources = pci_dev_enable_resources, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 667 | .acpi_inject_dsdt = southbridge_inject_dsdt, |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 668 | .write_acpi_tables = acpi_write_hpet, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 669 | .acpi_fill_ssdt = southbridge_fill_ssdt, |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 670 | .acpi_name = lpc_acpi_name, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 671 | .init = lpc_init, |
Nico Huber | 51b75ae | 2019-03-14 16:02:05 +0100 | [diff] [blame] | 672 | .scan_bus = scan_static_bus, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 673 | .enable = i82801gx_enable, |
| 674 | .ops_pci = &pci_ops, |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 675 | .final = lpc_final, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 676 | }; |
| 677 | |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 678 | /* 27b0: 82801GH (ICH7 DH) */ |
| 679 | /* 27b8: 82801GB/GR (ICH7/ICH7R) */ |
| 680 | /* 27b9: 82801GBM/GU (ICH7-M/ICH7-U) */ |
| 681 | /* 27bc: 82NM10 (NM10) */ |
| 682 | /* 27bd: 82801GHM (ICH7-M DH) */ |
| 683 | |
| 684 | static const unsigned short pci_device_ids[] = { |
| 685 | 0x27b0, 0x27b8, 0x27b9, 0x27bc, 0x27bd, 0 |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 686 | }; |
| 687 | |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 688 | static const struct pci_driver ich7_lpc __pci_driver = { |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 689 | .ops = &device_ops, |
| 690 | .vendor = PCI_VENDOR_ID_INTEL, |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 691 | .devices = pci_device_ids, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 692 | }; |