Angel Pons | ba38f37 | 2020-04-05 15:46:45 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 2 | |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 3 | #include "chip.h" |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 4 | #include <console/console.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 5 | #include <device/device.h> |
| 6 | #include <device/pci.h> |
| 7 | #include <device/pci_ids.h> |
Matt DeVillier | 132bbe6 | 2017-07-01 13:02:47 -0500 | [diff] [blame] | 8 | #include <drivers/intel/gma/opregion.h> |
Matt DeVillier | 8ff2ecd | 2020-03-29 16:58:48 -0500 | [diff] [blame] | 9 | #include <drivers/intel/gma/i915.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 10 | #include <reg_script.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 11 | #include <soc/gfx.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 12 | #include <soc/pci_devs.h> |
| 13 | #include <soc/ramstage.h> |
| 14 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 15 | static const struct reg_script gpu_pre_vbios_script[] = { |
| 16 | /* Make sure GFX is bus master with MMIO access */ |
| 17 | REG_PCI_OR32(PCI_COMMAND, PCI_COMMAND_MASTER|PCI_COMMAND_MEMORY), |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 18 | REG_SCRIPT_END |
| 19 | }; |
| 20 | |
| 21 | static const struct reg_script gfx_post_vbios_script[] = { |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 22 | /* Set Lock bits */ |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame] | 23 | REG_PCI_RMW32(GGC, 0xffffffff, GGC_GGCLCK), |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 24 | REG_PCI_RMW32(GSM_BASE, 0xffffffff, GSM_BDSM_LOCK), |
| 25 | REG_PCI_RMW32(GTT_BASE, 0xffffffff, GTT_BGSM_LOCK), |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 26 | REG_SCRIPT_END |
| 27 | }; |
| 28 | |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame] | 29 | static inline void gfx_run_script(struct device *dev, const struct reg_script *ops) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 30 | { |
| 31 | reg_script_run_on_dev(dev, ops); |
| 32 | } |
| 33 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 34 | static void gfx_pre_vbios_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 35 | { |
| 36 | printk(BIOS_INFO, "GFX: Pre VBIOS Init\n"); |
| 37 | gfx_run_script(dev, gpu_pre_vbios_script); |
| 38 | } |
| 39 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 40 | static void gfx_post_vbios_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 41 | { |
| 42 | printk(BIOS_INFO, "GFX: Post VBIOS Init\n"); |
| 43 | gfx_run_script(dev, gfx_post_vbios_script); |
| 44 | } |
| 45 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 46 | static void gfx_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 47 | { |
Nico Huber | f2a0be2 | 2020-04-26 17:01:25 +0200 | [diff] [blame] | 48 | intel_gma_init_igd_opregion(); |
| 49 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 50 | if (!CONFIG(RUN_FSP_GOP)) { |
Matt DeVillier | a9492a6 | 2018-06-20 00:40:48 -0500 | [diff] [blame] | 51 | /* Pre VBIOS Init */ |
| 52 | gfx_pre_vbios_init(dev); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 53 | |
Matt DeVillier | a9492a6 | 2018-06-20 00:40:48 -0500 | [diff] [blame] | 54 | /* Run VBIOS */ |
| 55 | pci_dev_init(dev); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 56 | |
Matt DeVillier | a9492a6 | 2018-06-20 00:40:48 -0500 | [diff] [blame] | 57 | /* Post VBIOS Init */ |
| 58 | gfx_post_vbios_init(dev); |
| 59 | } |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 60 | } |
| 61 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 62 | static void gma_generate_ssdt(const struct device *dev) |
Matt DeVillier | 8ff2ecd | 2020-03-29 16:58:48 -0500 | [diff] [blame] | 63 | { |
| 64 | const struct soc_intel_braswell_config *chip = dev->chip_info; |
| 65 | |
| 66 | drivers_intel_gma_displays_ssdt_generate(&chip->gfx); |
| 67 | } |
| 68 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 69 | static struct device_operations gfx_device_ops = { |
Nico Huber | 1ef8014 | 2015-11-05 23:27:06 +0100 | [diff] [blame] | 70 | .read_resources = pci_dev_read_resources, |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 71 | .set_resources = pci_dev_set_resources, |
| 72 | .enable_resources = pci_dev_enable_resources, |
| 73 | .init = gfx_init, |
| 74 | .ops_pci = &soc_pci_ops, |
Matt DeVillier | 8ff2ecd | 2020-03-29 16:58:48 -0500 | [diff] [blame] | 75 | .acpi_fill_ssdt = gma_generate_ssdt, |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 76 | }; |
| 77 | |
| 78 | static const struct pci_driver gfx_driver __pci_driver = { |
| 79 | .ops = &gfx_device_ops, |
| 80 | .vendor = PCI_VENDOR_ID_INTEL, |
| 81 | .device = GFX_DEVID, |
| 82 | }; |