Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; version 2 of the License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 13 | */ |
| 14 | |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 15 | #include "chip.h" |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 16 | #include <console/console.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <device/pci_ids.h> |
Matt DeVillier | 132bbe6 | 2017-07-01 13:02:47 -0500 | [diff] [blame] | 20 | #include <drivers/intel/gma/opregion.h> |
Matt DeVillier | 8ff2ecd | 2020-03-29 16:58:48 -0500 | [diff] [blame^] | 21 | #include <drivers/intel/gma/i915.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 22 | #include <reg_script.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 23 | #include <soc/gfx.h> |
Matt DeVillier | 132bbe6 | 2017-07-01 13:02:47 -0500 | [diff] [blame] | 24 | #include <soc/nvs.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 25 | #include <soc/pci_devs.h> |
| 26 | #include <soc/ramstage.h> |
| 27 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 28 | static const struct reg_script gpu_pre_vbios_script[] = { |
| 29 | /* Make sure GFX is bus master with MMIO access */ |
| 30 | REG_PCI_OR32(PCI_COMMAND, PCI_COMMAND_MASTER|PCI_COMMAND_MEMORY), |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 31 | REG_SCRIPT_END |
| 32 | }; |
| 33 | |
| 34 | static const struct reg_script gfx_post_vbios_script[] = { |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 35 | /* Set Lock bits */ |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame] | 36 | REG_PCI_RMW32(GGC, 0xffffffff, GGC_GGCLCK), |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 37 | REG_PCI_RMW32(GSM_BASE, 0xffffffff, GSM_BDSM_LOCK), |
| 38 | REG_PCI_RMW32(GTT_BASE, 0xffffffff, GTT_BGSM_LOCK), |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 39 | REG_SCRIPT_END |
| 40 | }; |
| 41 | |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame] | 42 | static inline void gfx_run_script(struct device *dev, const struct reg_script *ops) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 43 | { |
| 44 | reg_script_run_on_dev(dev, ops); |
| 45 | } |
| 46 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 47 | static void gfx_pre_vbios_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 48 | { |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame] | 49 | printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 50 | printk(BIOS_INFO, "GFX: Pre VBIOS Init\n"); |
| 51 | gfx_run_script(dev, gpu_pre_vbios_script); |
| 52 | } |
| 53 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 54 | static void gfx_post_vbios_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 55 | { |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame] | 56 | printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 57 | printk(BIOS_INFO, "GFX: Post VBIOS Init\n"); |
| 58 | gfx_run_script(dev, gfx_post_vbios_script); |
| 59 | } |
| 60 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 61 | static void gfx_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 62 | { |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame] | 63 | printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 64 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 65 | if (!CONFIG(RUN_FSP_GOP)) { |
Matt DeVillier | a9492a6 | 2018-06-20 00:40:48 -0500 | [diff] [blame] | 66 | /* Pre VBIOS Init */ |
| 67 | gfx_pre_vbios_init(dev); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 68 | |
Matt DeVillier | a9492a6 | 2018-06-20 00:40:48 -0500 | [diff] [blame] | 69 | /* Run VBIOS */ |
| 70 | pci_dev_init(dev); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 71 | |
Matt DeVillier | a9492a6 | 2018-06-20 00:40:48 -0500 | [diff] [blame] | 72 | /* Post VBIOS Init */ |
| 73 | gfx_post_vbios_init(dev); |
| 74 | } |
Matt DeVillier | 132bbe6 | 2017-07-01 13:02:47 -0500 | [diff] [blame] | 75 | intel_gma_restore_opregion(); |
| 76 | } |
| 77 | |
| 78 | uintptr_t gma_get_gnvs_aslb(const void *gnvs) |
| 79 | { |
| 80 | const global_nvs_t *gnvs_ptr = gnvs; |
| 81 | return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0); |
| 82 | } |
| 83 | |
| 84 | void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) |
| 85 | { |
| 86 | global_nvs_t *gnvs_ptr = gnvs; |
| 87 | if (gnvs_ptr) |
| 88 | gnvs_ptr->aslb = aslb; |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 89 | } |
| 90 | |
Matt DeVillier | 8ff2ecd | 2020-03-29 16:58:48 -0500 | [diff] [blame^] | 91 | static void gma_generate_ssdt(struct device *dev) |
| 92 | { |
| 93 | const struct soc_intel_braswell_config *chip = dev->chip_info; |
| 94 | |
| 95 | drivers_intel_gma_displays_ssdt_generate(&chip->gfx); |
| 96 | } |
| 97 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 98 | static struct device_operations gfx_device_ops = { |
Nico Huber | 1ef8014 | 2015-11-05 23:27:06 +0100 | [diff] [blame] | 99 | .read_resources = pci_dev_read_resources, |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 100 | .set_resources = pci_dev_set_resources, |
| 101 | .enable_resources = pci_dev_enable_resources, |
| 102 | .init = gfx_init, |
| 103 | .ops_pci = &soc_pci_ops, |
Matt DeVillier | 8ff2ecd | 2020-03-29 16:58:48 -0500 | [diff] [blame^] | 104 | .acpi_fill_ssdt = gma_generate_ssdt, |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 105 | }; |
| 106 | |
| 107 | static const struct pci_driver gfx_driver __pci_driver = { |
| 108 | .ops = &gfx_device_ops, |
| 109 | .vendor = PCI_VENDOR_ID_INTEL, |
| 110 | .device = GFX_DEVID, |
| 111 | }; |