Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2013 Google Inc. |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 5 | * Copyright (C) 2015 Intel Corp. |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 15 | */ |
| 16 | |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 17 | #include "chip.h" |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 18 | #include <arch/io.h> |
| 19 | #include <console/console.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 20 | #include <device/device.h> |
| 21 | #include <device/pci.h> |
| 22 | #include <device/pci_ids.h> |
Matt DeVillier | 132bbe6 | 2017-07-01 13:02:47 -0500 | [diff] [blame] | 23 | #include <drivers/intel/gma/opregion.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 24 | #include <reg_script.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 25 | #include <soc/gfx.h> |
Matt DeVillier | 132bbe6 | 2017-07-01 13:02:47 -0500 | [diff] [blame] | 26 | #include <soc/nvs.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 27 | #include <soc/pci_devs.h> |
| 28 | #include <soc/ramstage.h> |
| 29 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 30 | static const struct reg_script gpu_pre_vbios_script[] = { |
| 31 | /* Make sure GFX is bus master with MMIO access */ |
| 32 | REG_PCI_OR32(PCI_COMMAND, PCI_COMMAND_MASTER|PCI_COMMAND_MEMORY), |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 33 | REG_SCRIPT_END |
| 34 | }; |
| 35 | |
| 36 | static const struct reg_script gfx_post_vbios_script[] = { |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 37 | /* Set Lock bits */ |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 38 | REG_PCI_RMW32(GGC, 0xffffffff, GGC_GGCLCK), |
| 39 | REG_PCI_RMW32(GSM_BASE, 0xffffffff, GSM_BDSM_LOCK), |
| 40 | REG_PCI_RMW32(GTT_BASE, 0xffffffff, GTT_BGSM_LOCK), |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 41 | REG_SCRIPT_END |
| 42 | }; |
| 43 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame^] | 44 | static inline void gfx_run_script(struct device *dev, |
| 45 | const struct reg_script *ops) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 46 | { |
| 47 | reg_script_run_on_dev(dev, ops); |
| 48 | } |
| 49 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame^] | 50 | static void gfx_pre_vbios_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 51 | { |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 52 | printk(BIOS_SPEW, "%s/%s ( %s )\n", |
| 53 | __FILE__, __func__, dev_name(dev)); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 54 | printk(BIOS_INFO, "GFX: Pre VBIOS Init\n"); |
| 55 | gfx_run_script(dev, gpu_pre_vbios_script); |
| 56 | } |
| 57 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame^] | 58 | static void gfx_post_vbios_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 59 | { |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 60 | printk(BIOS_SPEW, "%s/%s ( %s )\n", |
| 61 | __FILE__, __func__, dev_name(dev)); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 62 | printk(BIOS_INFO, "GFX: Post VBIOS Init\n"); |
| 63 | gfx_run_script(dev, gfx_post_vbios_script); |
| 64 | } |
| 65 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame^] | 66 | static void gfx_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 67 | { |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 68 | printk(BIOS_SPEW, "%s/%s ( %s )\n", |
| 69 | __FILE__, __func__, dev_name(dev)); |
| 70 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 71 | /* Pre VBIOS Init */ |
| 72 | gfx_pre_vbios_init(dev); |
| 73 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 74 | /* Run VBIOS */ |
| 75 | pci_dev_init(dev); |
| 76 | |
| 77 | /* Post VBIOS Init */ |
| 78 | gfx_post_vbios_init(dev); |
Matt DeVillier | 132bbe6 | 2017-07-01 13:02:47 -0500 | [diff] [blame] | 79 | |
| 80 | intel_gma_restore_opregion(); |
| 81 | } |
| 82 | |
| 83 | uintptr_t gma_get_gnvs_aslb(const void *gnvs) |
| 84 | { |
| 85 | const global_nvs_t *gnvs_ptr = gnvs; |
| 86 | return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0); |
| 87 | } |
| 88 | |
| 89 | void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) |
| 90 | { |
| 91 | global_nvs_t *gnvs_ptr = gnvs; |
| 92 | if (gnvs_ptr) |
| 93 | gnvs_ptr->aslb = aslb; |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 94 | } |
| 95 | |
| 96 | static struct device_operations gfx_device_ops = { |
Nico Huber | 1ef8014 | 2015-11-05 23:27:06 +0100 | [diff] [blame] | 97 | .read_resources = pci_dev_read_resources, |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 98 | .set_resources = pci_dev_set_resources, |
| 99 | .enable_resources = pci_dev_enable_resources, |
| 100 | .init = gfx_init, |
| 101 | .ops_pci = &soc_pci_ops, |
| 102 | }; |
| 103 | |
| 104 | static const struct pci_driver gfx_driver __pci_driver = { |
| 105 | .ops = &gfx_device_ops, |
| 106 | .vendor = PCI_VENDOR_ID_INTEL, |
| 107 | .device = GFX_DEVID, |
| 108 | }; |