Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <memlayout.h> |
| 4 | #include <arch/header.ld> |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 5 | #include <soc/psp_transfer.h> |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 6 | |
Julius Werner | 82d16b1 | 2020-12-30 15:51:10 -0800 | [diff] [blame] | 7 | #define EARLY_RESERVED_DRAM_START(addr) REGION_START(early_reserved_dram, addr) |
| 8 | #define EARLY_RESERVED_DRAM_END(addr) REGION_END(early_reserved_dram, addr) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 9 | |
Julius Werner | 82d16b1 | 2020-12-30 15:51:10 -0800 | [diff] [blame] | 10 | #define PSP_SHAREDMEM_DRAM_START(addr) REGION_START(psp_sharedmem_dram, addr) |
| 11 | #define PSP_SHAREDMEM_DRAM_END(addr) REGION_END(psp_sharedmem_dram, addr) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 12 | |
Kyösti Mälkki | b3621f8 | 2020-12-04 19:51:17 +0200 | [diff] [blame] | 13 | BOOTBLOCK_END = CONFIG_ROMSTAGE_ADDR; |
| 14 | BOOTBLOCK_ADDR = BOOTBLOCK_END - CONFIG_C_ENV_BOOTBLOCK_SIZE; |
| 15 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 16 | /* |
| 17 | * |
| 18 | * +--------------------------------+ |
| 19 | * | | |
| 20 | * | | |
| 21 | * | | |
| 22 | * | | |
| 23 | * | | |
| 24 | * | | |
| 25 | * | | |
| 26 | * reserved_dram_end +--------------------------------+ |
| 27 | * | | |
Raul E Rangel | 55fea11 | 2021-07-23 16:43:18 -0600 | [diff] [blame] | 28 | * | cbfs_cache (if reqd) | |
| 29 | * | (CBFS_CACHE_SIZE) | |
Raul E Rangel | 86302a8 | 2022-01-18 15:29:54 -0700 | [diff] [blame] | 30 | * +--------------------------------+ VERSTAGE_ADDR + VERSTAGE_SIZE + PRERAM_CBMEM_CONSOLE_SIZE |
| 31 | * | Preram CBMEM console | |
| 32 | * | (PRERAM_CBMEM_CONSOLE_SIZE) | |
Raul E Rangel | 55fea11 | 2021-07-23 16:43:18 -0600 | [diff] [blame] | 33 | * +--------------------------------+ VERSTAGE_ADDR + VERSTAGE_SIZE |
| 34 | * | | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 35 | * | verstage (if reqd) | |
| 36 | * | (VERSTAGE_SIZE) | |
| 37 | * +--------------------------------+ VERSTAGE_ADDR |
| 38 | * | | |
| 39 | * | FSP-M | |
| 40 | * | (FSP_M_SIZE) | |
| 41 | * +--------------------------------+ FSP_M_ADDR |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 42 | * | romstage | |
| 43 | * | (ROMSTAGE_SIZE) | |
Kyösti Mälkki | b3621f8 | 2020-12-04 19:51:17 +0200 | [diff] [blame] | 44 | * +--------------------------------+ ROMSTAGE_ADDR = BOOTBLOCK_END |
| 45 | * | | X86_RESET_VECTOR = BOOTBLOCK_END - 0x10 |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 46 | * | bootblock | |
| 47 | * | (C_ENV_BOOTBLOCK_SIZE) | |
Kyösti Mälkki | b3621f8 | 2020-12-04 19:51:17 +0200 | [diff] [blame] | 48 | * +--------------------------------+ BOOTBLOCK_ADDR = BOOTBLOCK_END - C_ENV_BOOTBLOCK_SIZE |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 49 | * | Unused hole | |
| 50 | * +--------------------------------+ |
| 51 | * | FMAP cache (FMAP_SIZE) | |
Julius Werner | baf27db | 2019-10-02 17:28:56 -0700 | [diff] [blame] | 52 | * +--------------------------------+ |
| 53 | * | CBFS mcache (CBFS_MCACHE_SIZE) | |
Raul E Rangel | 86302a8 | 2022-01-18 15:29:54 -0700 | [diff] [blame] | 54 | * +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE + PRE_X86_CBMEM_CONSOLE_SIZE + 0x200 |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 55 | * | Early Timestamp region (512B) | |
Raul E Rangel | 86302a8 | 2022-01-18 15:29:54 -0700 | [diff] [blame] | 56 | * +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE + PRE_X86_CBMEM_CONSOLE_SIZE |
| 57 | * | PSP Verstage CBMEM console | |
| 58 | * | (PRE_X86_CBMEM_CONSOLE_SIZE) | |
Josie Nordrum | 5ae96aa | 2020-09-01 16:31:57 -0600 | [diff] [blame] | 59 | * +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 60 | * | PSP shared (vboot workbuf) | |
Josie Nordrum | 5ae96aa | 2020-09-01 16:31:57 -0600 | [diff] [blame] | 61 | * |(VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) | |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 62 | * +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 |
| 63 | * | Transfer Info Structure | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 64 | * +--------------------------------+ PSP_SHAREDMEM_BASE |
Fred Reitberger | 475e282 | 2022-07-14 11:06:30 -0400 | [diff] [blame] | 65 | * | APOB (PSP_APOB_DRAM_SIZE) | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 66 | * +--------------------------------+ PSP_APOB_DRAM_ADDRESS |
| 67 | * | Early BSP stack | |
| 68 | * | (EARLYRAM_BSP_STACK_SIZE) | |
| 69 | * reserved_dram_start +--------------------------------+ EARLY_RESERVED_DRAM_BASE |
| 70 | * | DRAM | |
| 71 | * +--------------------------------+ 0x100000 |
| 72 | * | Option ROM | |
| 73 | * +--------------------------------+ 0xc0000 |
| 74 | * | Legacy VGA | |
| 75 | * +--------------------------------+ 0xa0000 |
| 76 | * | DRAM | |
| 77 | * +--------------------------------+ 0x0 |
| 78 | */ |
| 79 | SECTIONS |
| 80 | { |
| 81 | DRAM_START(0x0) |
| 82 | |
| 83 | EARLY_RESERVED_DRAM_START(CONFIG_EARLY_RESERVED_DRAM_BASE) |
| 84 | |
| 85 | EARLYRAM_STACK(., CONFIG_EARLYRAM_BSP_STACK_SIZE) |
Fred Reitberger | 475e282 | 2022-07-14 11:06:30 -0400 | [diff] [blame] | 86 | REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, CONFIG_PSP_APOB_DRAM_SIZE, 1) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 87 | |
Raul E Rangel | d86db1c | 2021-02-05 10:24:22 -0700 | [diff] [blame] | 88 | #if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 89 | PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 90 | #endif |
| 91 | |
Martin Roth | 89815c9 | 2020-10-23 15:24:30 -0600 | [diff] [blame] | 92 | #include "memlayout_transfer_buffer.inc" |
| 93 | |
Raul E Rangel | d86db1c | 2021-02-05 10:24:22 -0700 | [diff] [blame] | 94 | #if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) |
Josie Nordrum | 5ae96aa | 2020-09-01 16:31:57 -0600 | [diff] [blame] | 95 | PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE) |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 96 | #endif |
Kyösti Mälkki | b3621f8 | 2020-12-04 19:51:17 +0200 | [diff] [blame] | 97 | _ = ASSERT(BOOTBLOCK_END == ((BOOTBLOCK_END + 0xFFFF) & 0xFFFF0000), "Bootblock end must be 16 bit aligned"); |
| 98 | BOOTBLOCK(BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 99 | ROMSTAGE(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE) |
Felix Held | 87f08be | 2023-07-26 17:29:47 +0200 | [diff] [blame^] | 100 | |
| 101 | #if CONFIG(PLATFORM_USES_FSP2_0) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 102 | REGION(fspm, CONFIG_FSP_M_ADDR, CONFIG_FSP_M_SIZE, 1) |
Felix Held | 87f08be | 2023-07-26 17:29:47 +0200 | [diff] [blame^] | 103 | #endif |
| 104 | |
Raul E Rangel | a36f9ab | 2022-01-18 15:50:06 -0700 | [diff] [blame] | 105 | #if CONFIG(VBOOT_SEPARATE_VERSTAGE) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 106 | VERSTAGE(CONFIG_VERSTAGE_ADDR, CONFIG_VERSTAGE_SIZE) |
| 107 | #endif |
| 108 | |
Raul E Rangel | 86302a8 | 2022-01-18 15:29:54 -0700 | [diff] [blame] | 109 | PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE) |
| 110 | |
Raul E Rangel | 55fea11 | 2021-07-23 16:43:18 -0600 | [diff] [blame] | 111 | #if CONFIG_CBFS_CACHE_SIZE > 0 |
| 112 | . = ALIGN(ARCH_CACHELINE_ALIGN_SIZE); |
| 113 | CBFS_CACHE(., CONFIG_CBFS_CACHE_SIZE) |
| 114 | #endif |
| 115 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 116 | EARLY_RESERVED_DRAM_END(.) |
| 117 | |
Arthur Heymans | 0c62987 | 2022-03-30 19:34:10 +0200 | [diff] [blame] | 118 | /* Relocated at runtime in cbmem so the address does not matter. */ |
Arthur Heymans | d22bb25 | 2023-07-13 12:18:08 +0200 | [diff] [blame] | 119 | RAMSTAGE(512M, 8M) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | #if ENV_BOOTBLOCK |
Furquan Shaikh | 1eaf64c | 2020-07-17 14:35:26 -0700 | [diff] [blame] | 123 | |
Kyösti Mälkki | dc873cc | 2020-11-21 17:59:41 +0200 | [diff] [blame] | 124 | gdtptr_offset = gdtptr & 0xffff; |
Furquan Shaikh | 1eaf64c | 2020-07-17 14:35:26 -0700 | [diff] [blame] | 125 | nullidt_offset = nullidt & 0xffff; |
| 126 | |
| 127 | SECTIONS { |
| 128 | /* Trigger an error if I have an unusable start address */ |
Kyösti Mälkki | 8d187f4 | 2020-12-04 19:51:17 +0200 | [diff] [blame] | 129 | _TOO_LOW = _X86_RESET_VECTOR - 0xfff0; |
Furquan Shaikh | 1eaf64c | 2020-07-17 14:35:26 -0700 | [diff] [blame] | 130 | _bogus = ASSERT(_start16bit >= _TOO_LOW, "_start16bit too low. Please report."); |
| 131 | |
Kyösti Mälkki | 2289a70 | 2019-12-21 10:17:56 +0200 | [diff] [blame] | 132 | . = _X86_RESET_VECTOR - EARLYASM_SZ; |
| 133 | . = ALIGN(16); |
| 134 | BOOTBLOCK_TOP = .; |
| 135 | .init (.) : { |
| 136 | *(.init._start); |
| 137 | *(.init); |
| 138 | *(.init.*); |
| 139 | } |
| 140 | |
| 141 | /* |
| 142 | * Allocation reserves extra space here. Alignment requirements |
| 143 | * may cause the total size of a section to change when the start |
| 144 | * address gets applied. |
| 145 | */ |
| 146 | EARLYASM_SZ = SIZEOF(.init) + 16; |
| 147 | |
Kyösti Mälkki | b3621f8 | 2020-12-04 19:51:17 +0200 | [diff] [blame] | 148 | . = BOOTBLOCK_END - 0x10; |
Kyösti Mälkki | 8d187f4 | 2020-12-04 19:51:17 +0200 | [diff] [blame] | 149 | _X86_RESET_VECTOR = .; |
Furquan Shaikh | 1eaf64c | 2020-07-17 14:35:26 -0700 | [diff] [blame] | 150 | .reset . : { |
| 151 | *(.reset); |
| 152 | . = 15; |
| 153 | BYTE(0x00); |
| 154 | } |
| 155 | } |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 156 | #endif /* ENV_BOOTBLOCK */ |