blob: 6f43ba18af54cf59f4f76bb13cd3419990757d44 [file] [log] [blame]
Martin Rothc7acf162020-05-28 00:44:50 -06001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <memlayout.h>
4#include <arch/header.ld>
5
6#define EARLY_RESERVED_DRAM_START(addr) SYMBOL(early_reserved_dram, addr)
7#define EARLY_RESERVED_DRAM_END(addr) SYMBOL(eearly_reserved_dram, addr)
8
9#define PSP_SHAREDMEM_DRAM_START(addr) SYMBOL(psp_sharedmem_dram, addr)
10#define PSP_SHAREDMEM_DRAM_END(addr) SYMBOL(epsp_sharedmem_dram, addr)
11
12/*
13 *
14 * +--------------------------------+
15 * | |
16 * | |
17 * | |
18 * | |
19 * | |
20 * | |
21 * | |
22 * reserved_dram_end +--------------------------------+
23 * | |
24 * | verstage (if reqd) |
25 * | (VERSTAGE_SIZE) |
26 * +--------------------------------+ VERSTAGE_ADDR
27 * | |
28 * | FSP-M |
29 * | (FSP_M_SIZE) |
30 * +--------------------------------+ FSP_M_ADDR
31 * | |X86_RESET_VECTOR = ROMSTAGE_ADDR + ROMSTAGE_SIZE - 0x10
32 * | romstage |
33 * | (ROMSTAGE_SIZE) |
34 * +--------------------------------+ ROMSTAGE_ADDR
35 * | bootblock |
36 * | (C_ENV_BOOTBLOCK_SIZE) |
37 * +--------------------------------+ BOOTBLOCK_ADDR
38 * | Unused hole |
39 * +--------------------------------+
40 * | FMAP cache (FMAP_SIZE) |
41 * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200
42 * | Early Timestamp region (512B) |
43 * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE
44 * | Preram CBMEM console |
45 * | (PRERAM_CBMEM_CONSOLE_SIZE) |
46 * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE
47 * | PSP shared (vboot workbuf) |
48 * | (PSP_SHAREDMEM_SIZE) |
49 * +--------------------------------+ PSP_SHAREDMEM_BASE
50 * | APOB (64KiB) |
51 * +--------------------------------+ PSP_APOB_DRAM_ADDRESS
52 * | Early BSP stack |
53 * | (EARLYRAM_BSP_STACK_SIZE) |
54 * reserved_dram_start +--------------------------------+ EARLY_RESERVED_DRAM_BASE
55 * | DRAM |
56 * +--------------------------------+ 0x100000
57 * | Option ROM |
58 * +--------------------------------+ 0xc0000
59 * | Legacy VGA |
60 * +--------------------------------+ 0xa0000
61 * | DRAM |
62 * +--------------------------------+ 0x0
63 */
64SECTIONS
65{
66 DRAM_START(0x0)
67
68 EARLY_RESERVED_DRAM_START(CONFIG_EARLY_RESERVED_DRAM_BASE)
69
70 EARLYRAM_STACK(., CONFIG_EARLYRAM_BSP_STACK_SIZE)
71 REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, 64K, 1)
72
73#if CONFIG(VBOOT)
74 PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE)
75 VBOOT2_WORK(., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE)
76 PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE)
77#endif
78
79 PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE)
80 TIMESTAMP(., 0x200)
81 FMAP_CACHE(., FMAP_SIZE)
82
83 _ = ASSERT((CONFIG_BOOTBLOCK_ADDR + CONFIG_C_ENV_BOOTBLOCK_SIZE - 0x10) == CONFIG_X86_RESET_VECTOR, "Reset vector should be -0x10 from end of bootblock");
84 _ = ASSERT(CONFIG_BOOTBLOCK_ADDR == ((CONFIG_BOOTBLOCK_ADDR + 0xFFFF) & 0xFFFF0000), "Bootblock must be 16 bit aligned");
85 BOOTBLOCK(CONFIG_BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE)
86 ROMSTAGE(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE)
87 REGION(fspm, CONFIG_FSP_M_ADDR, CONFIG_FSP_M_SIZE, 1)
88#if CONFIG(VBOOT_SEPARATE_VERSTAGE)
89 VERSTAGE(CONFIG_VERSTAGE_ADDR, CONFIG_VERSTAGE_SIZE)
90#endif
91
92 EARLY_RESERVED_DRAM_END(.)
93
94 RAMSTAGE(CONFIG_RAMBASE, 8M)
95}
96
97#if ENV_BOOTBLOCK
98/* Bootblock specific scripts which provide more SECTION directives. */
99#include <cpu/x86/16bit/entry16.ld>
100#include <cpu/x86/16bit/reset16.ld>
101#endif /* ENV_BOOTBLOCK */