blob: 434b58c6a319e66f5573275d8c3bce75329e5f9c [file] [log] [blame]
Angel Pons89ab2502020-04-03 01:22:28 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Tobias Diedrichcee930a2017-02-12 14:09:06 +01002
3#include <stdint.h>
4#include <string.h>
5#include <cbfs.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +02006#include <device/pci_ops.h>
Tobias Diedrichcee930a2017-02-12 14:09:06 +01007#include <console/console.h>
Elyes HAOUAS4ad14462018-06-16 18:29:33 +02008#include <northbridge/intel/sandybridge/raminit_native.h>
9#include <southbridge/intel/bd82x6x/pch.h>
Tobias Diedrichcee930a2017-02-12 14:09:06 +010010#include <southbridge/intel/common/gpio.h>
Tobias Diedrichcee930a2017-02-12 14:09:06 +010011#include "ec.h"
12
13#define SPD_LEN 256
14
Arthur Heymans2b28a162019-11-12 17:21:08 +010015void mainboard_pch_lpc_setup(void)
Tobias Diedrichcee930a2017-02-12 14:09:06 +010016{
Tobias Diedrichcee930a2017-02-12 14:09:06 +010017 /* Memory map KB9012 EC registers */
18 pci_write_config32(
Peter Lemenkov9b7ae2f2018-10-09 13:09:07 +020019 PCH_LPC_DEV, LGMR,
Tobias Diedrichcee930a2017-02-12 14:09:06 +010020 CONFIG_EC_BASE_ADDRESS | 1);
Peter Lemenkov9b7ae2f2018-10-09 13:09:07 +020021 pci_write_config16(PCH_LPC_DEV, BIOS_DEC_EN1, 0xffc0);
Tobias Diedrichcee930a2017-02-12 14:09:06 +010022
Tobias Diedrichcee930a2017-02-12 14:09:06 +010023 /* Enable external USB port power. */
Julius Wernercd49cce2019-03-05 16:53:33 -080024 if (CONFIG(USBDEBUG))
Martin Roth5ef5c002017-03-24 11:08:32 -060025 ec_mm_set_bit(0x3b, 4);
Tobias Diedrichcee930a2017-02-12 14:09:06 +010026}
27
Tobias Diedrichcee930a2017-02-12 14:09:06 +010028const struct southbridge_usb_port mainboard_usb_ports[] = {
29 { 1, 1, 0 },
30 { 1, 0, 0 },
31 { 1, 1, 1 },
32 { 1, 0, 1 },
33 { 1, 1, 2 },
34 { 1, 0, 2 },
35 { 0, 0, 3 },
36 { 0, 1, 3 },
37 { 1, 0, 4 },
38 { 1, 1, 4 },
39 { 1, 1, 5 },
40 { 1, 1, 5 },
41 { 1, 1, 6 },
42 { 1, 1, 6 },
43};
44
Tobias Diedrichcee930a2017-02-12 14:09:06 +010045static const char *mainboard_spd_names[9] = {
46 "ELPIDA 4GB",
47 "SAMSUNG 4GB",
48 "HYNIX 4GB",
49 "ELPIDA 8GB",
50 "SAMSUNG 8GB",
51 "HYNIX 8GB",
52 "ELPIDA 2GB",
53 "SAMSUNG 2GB",
54 "HYNIX 2GB",
55};
56
57void mainboard_get_spd(spd_raw_data *spd, bool id_only)
58{
59 void *spd_file;
60 size_t spd_file_len = 0;
61 const int spd_gpios[] = {71, 70, 16, 48, -1};
62
63 u32 spd_index = get_gpios(spd_gpios);
64 if (spd_index >= ARRAY_SIZE(mainboard_spd_names)) {
65 /* Fallback to pessimistic 2GB image (ELPIDA 2GB) */
66 spd_index = 6;
67 }
68
69 printk(BIOS_INFO, "SPD index %d (%s)\n",
70 spd_index, mainboard_spd_names[spd_index]);
71
Peter Lemenkov6b7d40a2020-01-22 11:40:16 +010072 /* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */
Julius Werner834b3ec2020-03-04 16:52:08 -080073 spd_file = cbfs_map("spd.bin", &spd_file_len);
Tobias Diedrichcee930a2017-02-12 14:09:06 +010074
75 if (!spd_file || spd_file_len < SPD_LEN * spd_index + SPD_LEN)
76 die("SPD data not found.");
77
78 memcpy(spd, spd_file + SPD_LEN * spd_index, SPD_LEN);
79}