Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 2 | |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 3 | #include <device/device.h> |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 4 | #include <device/pci.h> |
| 5 | #include <device/pci_ids.h> |
| 6 | #include <device/pci_ops.h> |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 7 | |
Elyes HAOUAS | bf0970e | 2019-03-21 11:10:03 +0100 | [diff] [blame] | 8 | #include "hudson.h" |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 9 | |
| 10 | static void sata_init(struct device *dev) |
| 11 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 12 | #if CONFIG(SOUTHBRIDGE_AMD_PI_AVALON) || CONFIG(SOUTHBRIDGE_AMD_PI_KERN) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 13 | /************************************** |
| 14 | * Configure the SATA port multiplier * |
| 15 | **************************************/ |
Elyes Haouas | ba9deba | 2022-07-16 09:43:03 +0200 | [diff] [blame] | 16 | #define BYTE_TO_DWORD_OFFSET(x) (x / 4) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 17 | #define AHCI_BASE_ADDRESS_REG 0x24 |
| 18 | #define MISC_CONTROL_REG 0x40 |
Elyes Haouas | ba9deba | 2022-07-16 09:43:03 +0200 | [diff] [blame] | 19 | #define UNLOCK_BIT (1 << 0) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 20 | #define SATA_CAPABILITIES_REG 0xFC |
Elyes Haouas | ba9deba | 2022-07-16 09:43:03 +0200 | [diff] [blame] | 21 | #define CFG_CAP_SPM (1 << 12) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 22 | |
| 23 | volatile u32 *ahci_ptr = |
| 24 | (u32*)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00); |
| 25 | u32 temp; |
| 26 | |
| 27 | /* unlock the write-protect */ |
| 28 | temp = pci_read_config32(dev, MISC_CONTROL_REG); |
| 29 | temp |= UNLOCK_BIT; |
| 30 | pci_write_config32(dev, MISC_CONTROL_REG, temp); |
| 31 | |
| 32 | /* set the SATA AHCI mode to allow port expanders */ |
| 33 | *(ahci_ptr + BYTE_TO_DWORD_OFFSET(SATA_CAPABILITIES_REG)) |= CFG_CAP_SPM; |
| 34 | |
| 35 | /* lock the write-protect */ |
| 36 | temp = pci_read_config32(dev, MISC_CONTROL_REG); |
| 37 | temp &= ~UNLOCK_BIT; |
| 38 | pci_write_config32(dev, MISC_CONTROL_REG, temp); |
| 39 | #endif |
| 40 | }; |
| 41 | |
| 42 | static struct pci_operations lops_pci = { |
| 43 | /* .set_subsystem = pci_dev_set_subsystem, */ |
| 44 | }; |
| 45 | |
| 46 | static struct device_operations sata_ops = { |
| 47 | .read_resources = pci_dev_read_resources, |
| 48 | .set_resources = pci_dev_set_resources, |
| 49 | .enable_resources = pci_dev_enable_resources, |
| 50 | .init = sata_init, |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 51 | .ops_pci = &lops_pci, |
| 52 | }; |
| 53 | |
WANG Siyuan | f2dfef0 | 2015-05-20 14:41:01 +0800 | [diff] [blame] | 54 | static const unsigned short pci_device_ids[] = { |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 55 | PCI_DID_AMD_SB900_SATA, |
| 56 | PCI_DID_AMD_SB900_SATA_AHCI, |
| 57 | PCI_DID_AMD_CZ_SATA, |
| 58 | PCI_DID_AMD_CZ_SATA_AHCI, |
WANG Siyuan | f2dfef0 | 2015-05-20 14:41:01 +0800 | [diff] [blame] | 59 | 0 |
| 60 | }; |
| 61 | |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 62 | static const struct pci_driver sata0_driver __pci_driver = { |
| 63 | .ops = &sata_ops, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 64 | .vendor = PCI_VID_AMD, |
WANG Siyuan | f2dfef0 | 2015-05-20 14:41:01 +0800 | [diff] [blame] | 65 | .devices = pci_device_ids, |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 66 | }; |