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Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030014 */
15
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030016#include <device/device.h>
17#include <delay.h>
18#include <device/pci.h>
19#include <device/pci_ids.h>
20#include <device/pci_ops.h>
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030021#include "hudson.h"
22
23
24static void sata_init(struct device *dev)
25{
Julius Wernercd49cce2019-03-05 16:53:33 -080026#if CONFIG(SOUTHBRIDGE_AMD_PI_AVALON) || CONFIG(SOUTHBRIDGE_AMD_PI_KERN)
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030027 /**************************************
28 * Configure the SATA port multiplier *
29 **************************************/
30 #define BYTE_TO_DWORD_OFFSET(x) (x/4)
31 #define AHCI_BASE_ADDRESS_REG 0x24
32 #define MISC_CONTROL_REG 0x40
33 #define UNLOCK_BIT (1<<0)
34 #define SATA_CAPABILITIES_REG 0xFC
35 #define CFG_CAP_SPM (1<<12)
36
37 volatile u32 *ahci_ptr =
38 (u32*)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00);
39 u32 temp;
40
41 /* unlock the write-protect */
42 temp = pci_read_config32(dev, MISC_CONTROL_REG);
43 temp |= UNLOCK_BIT;
44 pci_write_config32(dev, MISC_CONTROL_REG, temp);
45
46 /* set the SATA AHCI mode to allow port expanders */
47 *(ahci_ptr + BYTE_TO_DWORD_OFFSET(SATA_CAPABILITIES_REG)) |= CFG_CAP_SPM;
48
49 /* lock the write-protect */
50 temp = pci_read_config32(dev, MISC_CONTROL_REG);
51 temp &= ~UNLOCK_BIT;
52 pci_write_config32(dev, MISC_CONTROL_REG, temp);
53#endif
54};
55
56static struct pci_operations lops_pci = {
57 /* .set_subsystem = pci_dev_set_subsystem, */
58};
59
60static struct device_operations sata_ops = {
61 .read_resources = pci_dev_read_resources,
62 .set_resources = pci_dev_set_resources,
63 .enable_resources = pci_dev_enable_resources,
64 .init = sata_init,
65 .scan_bus = 0,
66 .ops_pci = &lops_pci,
67};
68
WANG Siyuanf2dfef02015-05-20 14:41:01 +080069static const unsigned short pci_device_ids[] = {
Kyösti Mälkki9d9a5522016-11-19 22:14:59 +020070 PCI_DEVICE_ID_AMD_SB900_SATA,
71 PCI_DEVICE_ID_AMD_SB900_SATA_AHCI,
WANG Siyuanf2dfef02015-05-20 14:41:01 +080072 PCI_DEVICE_ID_AMD_CZ_SATA,
73 PCI_DEVICE_ID_AMD_CZ_SATA_AHCI,
74 0
75};
76
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030077static const struct pci_driver sata0_driver __pci_driver = {
78 .ops = &sata_ops,
79 .vendor = PCI_VENDOR_ID_AMD,
WANG Siyuanf2dfef02015-05-20 14:41:01 +080080 .devices = pci_device_ids,
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030081};