Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2005 Yinghai Lu <yinghailu@gmail.com> |
| 5 | * Copyright (C) 2009 coresystems GmbH |
| 6 | * Copyright (C) 2013 Vladimir Serbinenko |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 7 | * Copyright (C) 2018-2019 Eltan B.V. |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; version 2 of the License. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #include <arch/io.h> |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 20 | #include <console/console.h> |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 21 | #include <device/smbus_def.h> |
Kyösti Mälkki | 1cae454 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 22 | #include <device/smbus_host.h> |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 23 | #include <types.h> |
| 24 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 25 | #if CONFIG(DEBUG_SMBUS) |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 26 | #define dprintk(args...) printk(BIOS_DEBUG, ##args) |
| 27 | #else |
| 28 | #define dprintk(args...) do {} while (0) |
| 29 | #endif |
| 30 | |
Kyösti Mälkki | 7f40bd6 | 2020-01-06 19:00:31 +0200 | [diff] [blame^] | 31 | /* SMBus register offsets. */ |
| 32 | #define SMBHSTSTAT 0x0 |
| 33 | #define SMBHSTCTL 0x2 |
| 34 | #define SMBHSTCMD 0x3 |
| 35 | #define SMBXMITADD 0x4 |
| 36 | #define SMBHSTDAT0 0x5 |
| 37 | #define SMBHSTDAT1 0x6 |
| 38 | #define SMBBLKDAT 0x7 |
| 39 | #define SMBTRNSADD 0x9 |
| 40 | #define SMBSLVDATA 0xa |
| 41 | #define SMLINK_PIN_CTL 0xe |
| 42 | #define SMBUS_PIN_CTL 0xf |
| 43 | #define SMBSLVCMD 0x11 |
| 44 | |
| 45 | #define SMB_RCV_SLVA SMBTRNSADD |
| 46 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 47 | /* I801 command constants */ |
| 48 | #define I801_QUICK (0 << 2) |
| 49 | #define I801_BYTE (1 << 2) |
| 50 | #define I801_BYTE_DATA (2 << 2) |
| 51 | #define I801_WORD_DATA (3 << 2) |
| 52 | #define I801_BLOCK_DATA (5 << 2) |
| 53 | #define I801_I2C_BLOCK_DATA (6 << 2) /* ICH5 and later */ |
| 54 | |
| 55 | /* I801 Host Control register bits */ |
| 56 | #define SMBHSTCNT_INTREN (1 << 0) |
| 57 | #define SMBHSTCNT_KILL (1 << 1) |
| 58 | #define SMBHSTCNT_LAST_BYTE (1 << 5) |
| 59 | #define SMBHSTCNT_START (1 << 6) |
| 60 | #define SMBHSTCNT_PEC_EN (1 << 7) /* ICH3 and later */ |
| 61 | |
| 62 | /* I801 Hosts Status register bits */ |
| 63 | #define SMBHSTSTS_BYTE_DONE (1 << 7) |
| 64 | #define SMBHSTSTS_INUSE_STS (1 << 6) |
| 65 | #define SMBHSTSTS_SMBALERT_STS (1 << 5) |
| 66 | #define SMBHSTSTS_FAILED (1 << 4) |
| 67 | #define SMBHSTSTS_BUS_ERR (1 << 3) |
| 68 | #define SMBHSTSTS_DEV_ERR (1 << 2) |
| 69 | #define SMBHSTSTS_INTR (1 << 1) |
| 70 | #define SMBHSTSTS_HOST_BUSY (1 << 0) |
| 71 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 72 | /* For SMBXMITADD register. */ |
| 73 | #define XMIT_WRITE(dev) (((dev) << 1) | 0) |
| 74 | #define XMIT_READ(dev) (((dev) << 1) | 1) |
| 75 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 76 | #define SMBUS_TIMEOUT (10 * 1000 * 100) |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 77 | #define SMBUS_BLOCK_MAXLEN 32 |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 78 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 79 | /* block_cmd_loop flags */ |
| 80 | #define BLOCK_READ 0 |
| 81 | #define BLOCK_WRITE (1 << 0) |
| 82 | #define BLOCK_I2C (1 << 1) |
| 83 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 84 | static void smbus_delay(void) |
| 85 | { |
| 86 | inb(0x80); |
| 87 | } |
| 88 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 89 | static void host_outb(uintptr_t base, u8 reg, u8 value) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 90 | { |
| 91 | outb(value, base + reg); |
| 92 | } |
| 93 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 94 | static u8 host_inb(uintptr_t base, u8 reg) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 95 | { |
| 96 | return inb(base + reg); |
| 97 | } |
| 98 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 99 | static void host_and_or(uintptr_t base, u8 reg, u8 mask, u8 or) |
Kyösti Mälkki | 65f5de2 | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 100 | { |
| 101 | u8 value; |
| 102 | value = host_inb(base, reg); |
| 103 | value &= mask; |
| 104 | value |= or; |
| 105 | host_outb(base, reg, value); |
| 106 | } |
| 107 | |
Kyösti Mälkki | 7cdcc38 | 2020-01-06 19:00:31 +0200 | [diff] [blame] | 108 | void smbus_host_reset(uintptr_t base) |
| 109 | { |
| 110 | /* Disable interrupt generation. */ |
| 111 | host_outb(base, SMBHSTCTL, 0); |
| 112 | |
| 113 | /* Clear any lingering errors, so transactions can run. */ |
| 114 | host_and_or(base, SMBHSTSTAT, 0xff, 0); |
| 115 | } |
| 116 | |
Kyösti Mälkki | 73451fd | 2020-01-06 19:00:31 +0200 | [diff] [blame] | 117 | void smbus_set_slave_addr(uintptr_t base, u8 slave_address) |
| 118 | { |
| 119 | host_outb(base, SMB_RCV_SLVA, slave_address); |
| 120 | } |
| 121 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 122 | static int host_completed(u8 status) |
| 123 | { |
| 124 | if (status & SMBHSTSTS_HOST_BUSY) |
| 125 | return 0; |
Kyösti Mälkki | 44206e3 | 2019-02-26 17:17:24 +0200 | [diff] [blame] | 126 | |
| 127 | /* These status bits do not imply completion of transaction. */ |
| 128 | status &= ~(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INUSE_STS | |
| 129 | SMBHSTSTS_SMBALERT_STS); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 130 | return status != 0; |
| 131 | } |
| 132 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 133 | static int recover_master(uintptr_t base, int ret) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 134 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 135 | /* TODO: Depending of the failure, drive KILL transaction |
| 136 | * or force soft reset on SMBus master controller. |
| 137 | */ |
| 138 | printk(BIOS_ERR, "SMBus: Fatal master timeout (%d)\n", ret); |
| 139 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 140 | } |
| 141 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 142 | static int cb_err_from_stat(u8 status) |
| 143 | { |
Kyösti Mälkki | 44206e3 | 2019-02-26 17:17:24 +0200 | [diff] [blame] | 144 | /* These status bits do not imply errors. */ |
| 145 | status &= ~(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INUSE_STS | |
| 146 | SMBHSTSTS_SMBALERT_STS); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 147 | |
| 148 | if (status == SMBHSTSTS_INTR) |
| 149 | return 0; |
| 150 | |
| 151 | return SMBUS_ERROR; |
| 152 | } |
| 153 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 154 | static int setup_command(uintptr_t base, u8 ctrl, u8 xmitadd) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 155 | { |
| 156 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 157 | u8 host_busy; |
| 158 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 159 | do { |
| 160 | smbus_delay(); |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 161 | host_busy = host_inb(base, SMBHSTSTAT) & SMBHSTSTS_HOST_BUSY; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 162 | } while (--loops && host_busy); |
| 163 | |
| 164 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 165 | return recover_master(base, SMBUS_WAIT_UNTIL_READY_TIMEOUT); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 166 | |
| 167 | /* Clear any lingering errors, so the transaction will run. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 168 | host_and_or(base, SMBHSTSTAT, 0xff, 0); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 169 | |
| 170 | /* Set up transaction */ |
| 171 | /* Disable interrupts */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 172 | host_outb(base, SMBHSTCTL, ctrl); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 173 | |
| 174 | /* Set the device I'm talking to. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 175 | host_outb(base, SMBXMITADD, xmitadd); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 176 | |
| 177 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 178 | } |
| 179 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 180 | static int execute_command(uintptr_t base) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 181 | { |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 182 | unsigned int loops = SMBUS_TIMEOUT; |
| 183 | u8 status; |
| 184 | |
| 185 | /* Start the command. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 186 | host_and_or(base, SMBHSTCTL, 0xff, SMBHSTCNT_START); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 187 | |
| 188 | /* Poll for it to start. */ |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 189 | do { |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 190 | smbus_delay(); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 191 | |
| 192 | /* If we poll too slow, we could miss HOST_BUSY flag |
| 193 | * set and detect INTR or x_ERR flags instead here. |
| 194 | */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 195 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 196 | status &= ~(SMBHSTSTS_SMBALERT_STS | SMBHSTSTS_INUSE_STS); |
| 197 | } while (--loops && status == 0); |
| 198 | |
| 199 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 200 | return recover_master(base, |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 201 | SMBUS_WAIT_UNTIL_ACTIVE_TIMEOUT); |
| 202 | |
| 203 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 204 | } |
| 205 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 206 | static int complete_command(uintptr_t base) |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 207 | { |
| 208 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 209 | u8 status; |
| 210 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 211 | do { |
| 212 | smbus_delay(); |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 213 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 214 | } while (--loops && !host_completed(status)); |
| 215 | |
| 216 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 217 | return recover_master(base, |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 218 | SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
| 219 | |
| 220 | return cb_err_from_stat(status); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 221 | } |
| 222 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 223 | static int smbus_read_cmd(uintptr_t base, u8 ctrl, u8 device, u8 address) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 224 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 225 | int ret; |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 226 | u16 word; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 227 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 228 | /* Set up for a byte data read. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 229 | ret = setup_command(base, ctrl, XMIT_READ(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 230 | if (ret < 0) |
| 231 | return ret; |
| 232 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 233 | /* Set the command/address... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 234 | host_outb(base, SMBHSTCMD, address); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 235 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 236 | /* Clear the data bytes... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 237 | host_outb(base, SMBHSTDAT0, 0); |
| 238 | host_outb(base, SMBHSTDAT1, 0); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 239 | |
| 240 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 241 | ret = execute_command(base); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 242 | if (ret < 0) |
| 243 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 244 | |
| 245 | /* Poll for transaction completion */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 246 | ret = complete_command(base); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 247 | if (ret < 0) |
| 248 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 249 | |
| 250 | /* Read results of transaction */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 251 | word = host_inb(base, SMBHSTDAT0); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 252 | if (ctrl == I801_WORD_DATA) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 253 | word |= host_inb(base, SMBHSTDAT1) << 8; |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 254 | |
| 255 | return word; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 256 | } |
| 257 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 258 | static int smbus_write_cmd(uintptr_t base, u8 ctrl, u8 device, u8 address, u16 data) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 259 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 260 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 261 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 262 | /* Set up for a byte data write. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 263 | ret = setup_command(base, ctrl, XMIT_WRITE(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 264 | if (ret < 0) |
| 265 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 266 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 267 | /* Set the command/address... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 268 | host_outb(base, SMBHSTCMD, address); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 269 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 270 | /* Set the data bytes... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 271 | host_outb(base, SMBHSTDAT0, data & 0xff); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 272 | if (ctrl == I801_WORD_DATA) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 273 | host_outb(base, SMBHSTDAT1, data >> 8); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 274 | |
| 275 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 276 | ret = execute_command(base); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 277 | if (ret < 0) |
| 278 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 279 | |
| 280 | /* Poll for transaction completion */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 281 | return complete_command(base); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 282 | } |
| 283 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 284 | static int block_cmd_loop(uintptr_t base, u8 *buf, size_t max_bytes, int flags) |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 285 | { |
| 286 | u8 status; |
| 287 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 288 | int ret; |
| 289 | size_t bytes = 0; |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 290 | int is_write_cmd = flags & BLOCK_WRITE; |
| 291 | int sw_drives_nak = flags & BLOCK_I2C; |
| 292 | |
| 293 | /* Hardware limitations. */ |
| 294 | if (flags == (BLOCK_WRITE | BLOCK_I2C)) |
| 295 | return SMBUS_ERROR; |
| 296 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 297 | /* Set number of bytes to transfer. */ |
| 298 | /* Reset number of bytes to transfer so we notice later it |
| 299 | * was really updated with the transaction. */ |
| 300 | if (!sw_drives_nak) { |
| 301 | if (is_write_cmd) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 302 | host_outb(base, SMBHSTDAT0, max_bytes); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 303 | else |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 304 | host_outb(base, SMBHSTDAT0, 0); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | /* Send first byte from buffer, bytes_sent increments after |
| 308 | * hardware acknowledges it. |
| 309 | */ |
| 310 | if (is_write_cmd) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 311 | host_outb(base, SMBBLKDAT, *buf++); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 312 | |
| 313 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 314 | ret = execute_command(base); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 315 | if (ret < 0) |
| 316 | return ret; |
| 317 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 318 | /* Poll for transaction completion */ |
| 319 | do { |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 320 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 321 | |
| 322 | if (status & SMBHSTSTS_BYTE_DONE) { /* Byte done */ |
| 323 | |
| 324 | if (is_write_cmd) { |
| 325 | bytes++; |
| 326 | if (bytes < max_bytes) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 327 | host_outb(base, SMBBLKDAT, *buf++); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 328 | } else { |
| 329 | if (bytes < max_bytes) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 330 | *buf++ = host_inb(base, SMBBLKDAT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 331 | bytes++; |
| 332 | |
| 333 | /* Indicate that next byte is the last one. */ |
| 334 | if (sw_drives_nak && (bytes + 1 >= max_bytes)) { |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 335 | host_and_or(base, SMBHSTCTL, 0xff, |
| 336 | SMBHSTCNT_LAST_BYTE); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | } |
| 340 | |
| 341 | /* Engine internally completes the transaction |
| 342 | * and clears HOST_BUSY flag once the byte count |
| 343 | * has been reached or LAST_BYTE was set. |
| 344 | */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 345 | host_outb(base, SMBHSTSTAT, SMBHSTSTS_BYTE_DONE); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 346 | } |
| 347 | |
| 348 | } while (--loops && !host_completed(status)); |
| 349 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 350 | dprintk("%s: status = %02x, len = %zd / %zd, loops = %d\n", |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 351 | __func__, status, bytes, max_bytes, SMBUS_TIMEOUT - loops); |
| 352 | |
| 353 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 354 | return recover_master(base, SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 355 | |
| 356 | ret = cb_err_from_stat(status); |
| 357 | if (ret < 0) |
| 358 | return ret; |
| 359 | |
| 360 | return bytes; |
| 361 | } |
| 362 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 363 | int do_smbus_read_byte(uintptr_t base, u8 device, u8 address) |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 364 | { |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 365 | return smbus_read_cmd(base, I801_BYTE_DATA, device, address); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 366 | } |
| 367 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 368 | int do_smbus_read_word(uintptr_t base, u8 device, u8 address) |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 369 | { |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 370 | return smbus_read_cmd(base, I801_WORD_DATA, device, address); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 371 | } |
| 372 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 373 | int do_smbus_write_byte(uintptr_t base, u8 device, u8 address, u8 data) |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 374 | { |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 375 | return smbus_write_cmd(base, I801_BYTE_DATA, device, address, data); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 376 | } |
| 377 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 378 | int do_smbus_write_word(uintptr_t base, u8 device, u8 address, u16 data) |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 379 | { |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 380 | return smbus_write_cmd(base, I801_WORD_DATA, device, address, data); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 381 | } |
| 382 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 383 | int do_smbus_block_read(uintptr_t base, u8 device, u8 cmd, size_t max_bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 384 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 385 | int ret, slave_bytes; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 386 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 387 | max_bytes = MIN(SMBUS_BLOCK_MAXLEN, max_bytes); |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 388 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 389 | /* Set up for a block data read. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 390 | ret = setup_command(base, I801_BLOCK_DATA, XMIT_READ(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 391 | if (ret < 0) |
| 392 | return ret; |
| 393 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 394 | /* Set the command/address... */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 395 | host_outb(base, SMBHSTCMD, cmd); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 396 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 397 | /* Execute block transaction. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 398 | ret = block_cmd_loop(base, buf, max_bytes, BLOCK_READ); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 399 | if (ret < 0) |
| 400 | return ret; |
| 401 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 402 | /* Post-check we received complete message. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 403 | slave_bytes = host_inb(base, SMBHSTDAT0); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 404 | if (ret < slave_bytes) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 405 | return SMBUS_ERROR; |
| 406 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 407 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 408 | } |
| 409 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 410 | int do_smbus_block_write(uintptr_t base, u8 device, u8 cmd, const size_t bytes, const u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 411 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 412 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 413 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 414 | if (bytes > SMBUS_BLOCK_MAXLEN) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 415 | return SMBUS_ERROR; |
| 416 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 417 | /* Set up for a block data write. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 418 | ret = setup_command(base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 419 | if (ret < 0) |
| 420 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 421 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 422 | /* Set the command/address... */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 423 | host_outb(base, SMBHSTCMD, cmd); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 424 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 425 | /* Execute block transaction. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 426 | ret = block_cmd_loop(base, (u8 *)buf, bytes, BLOCK_WRITE); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 427 | if (ret < 0) |
| 428 | return ret; |
| 429 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 430 | if (ret < bytes) |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 431 | return SMBUS_ERROR; |
| 432 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 433 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 434 | } |
| 435 | |
| 436 | /* Only since ICH5 */ |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 437 | static int has_i2c_read_command(void) |
| 438 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 439 | if (CONFIG(SOUTHBRIDGE_INTEL_I82371EB) || |
| 440 | CONFIG(SOUTHBRIDGE_INTEL_I82801DX)) |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 441 | return 0; |
| 442 | return 1; |
| 443 | } |
| 444 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 445 | int do_i2c_eeprom_read(uintptr_t base, u8 device, u8 offset, const size_t bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 446 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 447 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 448 | |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 449 | if (!has_i2c_read_command()) |
| 450 | return SMBUS_ERROR; |
| 451 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 452 | /* Set up for a i2c block data read. |
| 453 | * |
| 454 | * FIXME: Address parameter changes to XMIT_READ(device) with |
| 455 | * some revision of PCH. Presumably hardware revisions that |
| 456 | * do not have i2c block write support internally set LSB. |
| 457 | */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 458 | ret = setup_command(base, I801_I2C_BLOCK_DATA, |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 459 | XMIT_WRITE(device)); |
| 460 | if (ret < 0) |
| 461 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 462 | |
| 463 | /* device offset */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 464 | host_outb(base, SMBHSTDAT1, offset); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 465 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 466 | /* Execute block transaction. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 467 | ret = block_cmd_loop(base, buf, bytes, BLOCK_READ | BLOCK_I2C); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 468 | if (ret < 0) |
| 469 | return ret; |
| 470 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 471 | /* Post-check we received complete message. */ |
| 472 | if (ret < bytes) |
Kyösti Mälkki | 1e39236 | 2017-08-20 21:36:03 +0300 | [diff] [blame] | 473 | return SMBUS_ERROR; |
| 474 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 475 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 476 | } |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 477 | |
| 478 | /* |
| 479 | * The caller is responsible of settings HOSTC I2C_EN bit prior to making this |
| 480 | * call! |
| 481 | */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 482 | int do_i2c_block_write(uintptr_t base, u8 device, size_t bytes, u8 *buf) |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 483 | { |
| 484 | u8 cmd; |
| 485 | int ret; |
| 486 | |
| 487 | if (!CONFIG(SOC_INTEL_BRASWELL)) |
| 488 | return SMBUS_ERROR; |
| 489 | |
| 490 | if (!bytes || (bytes > SMBUS_BLOCK_MAXLEN)) |
| 491 | return SMBUS_ERROR; |
| 492 | |
| 493 | /* Set up for a block data write. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 494 | ret = setup_command(base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 495 | if (ret < 0) |
| 496 | return ret; |
| 497 | |
| 498 | /* |
| 499 | * In i2c mode SMBus controller sequence on bus will be: |
| 500 | * <SMBXINTADD> <SMBHSTDAT1> <SMBBLKDAT> .. <SMBBLKDAT> |
| 501 | * The SMBHSTCMD must be written also to ensure the SMBUs controller |
| 502 | * will generate the i2c sequence. |
| 503 | */ |
| 504 | cmd = *buf++; |
| 505 | bytes--; |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 506 | host_outb(base, SMBHSTCMD, cmd); |
| 507 | host_outb(base, SMBHSTDAT1, cmd); |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 508 | |
| 509 | /* Execute block transaction. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 510 | ret = block_cmd_loop(base, buf, bytes, BLOCK_WRITE); |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 511 | if (ret < 0) |
| 512 | return ret; |
| 513 | |
| 514 | if (ret < bytes) |
| 515 | return SMBUS_ERROR; |
| 516 | |
| 517 | ret++; /* 1st byte has been written using SMBHSTDAT1 */ |
| 518 | return ret; |
| 519 | } |