Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2005 Yinghai Lu <yinghailu@gmail.com> |
| 5 | * Copyright (C) 2009 coresystems GmbH |
| 6 | * Copyright (C) 2013 Vladimir Serbinenko |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 7 | * Copyright (C) 2018-2019 Eltan B.V. |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; version 2 of the License. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #include <arch/io.h> |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 20 | #include <console/console.h> |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 21 | #include <device/smbus_def.h> |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 22 | #include <types.h> |
| 23 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 24 | #include "smbus.h" |
| 25 | |
| 26 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 27 | #if CONFIG(DEBUG_SMBUS) |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 28 | #define dprintk(args...) printk(BIOS_DEBUG, ##args) |
| 29 | #else |
| 30 | #define dprintk(args...) do {} while (0) |
| 31 | #endif |
| 32 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 33 | /* I801 command constants */ |
| 34 | #define I801_QUICK (0 << 2) |
| 35 | #define I801_BYTE (1 << 2) |
| 36 | #define I801_BYTE_DATA (2 << 2) |
| 37 | #define I801_WORD_DATA (3 << 2) |
| 38 | #define I801_BLOCK_DATA (5 << 2) |
| 39 | #define I801_I2C_BLOCK_DATA (6 << 2) /* ICH5 and later */ |
| 40 | |
| 41 | /* I801 Host Control register bits */ |
| 42 | #define SMBHSTCNT_INTREN (1 << 0) |
| 43 | #define SMBHSTCNT_KILL (1 << 1) |
| 44 | #define SMBHSTCNT_LAST_BYTE (1 << 5) |
| 45 | #define SMBHSTCNT_START (1 << 6) |
| 46 | #define SMBHSTCNT_PEC_EN (1 << 7) /* ICH3 and later */ |
| 47 | |
| 48 | /* I801 Hosts Status register bits */ |
| 49 | #define SMBHSTSTS_BYTE_DONE (1 << 7) |
| 50 | #define SMBHSTSTS_INUSE_STS (1 << 6) |
| 51 | #define SMBHSTSTS_SMBALERT_STS (1 << 5) |
| 52 | #define SMBHSTSTS_FAILED (1 << 4) |
| 53 | #define SMBHSTSTS_BUS_ERR (1 << 3) |
| 54 | #define SMBHSTSTS_DEV_ERR (1 << 2) |
| 55 | #define SMBHSTSTS_INTR (1 << 1) |
| 56 | #define SMBHSTSTS_HOST_BUSY (1 << 0) |
| 57 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 58 | /* For SMBXMITADD register. */ |
| 59 | #define XMIT_WRITE(dev) (((dev) << 1) | 0) |
| 60 | #define XMIT_READ(dev) (((dev) << 1) | 1) |
| 61 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 62 | #define SMBUS_TIMEOUT (10 * 1000 * 100) |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 63 | #define SMBUS_BLOCK_MAXLEN 32 |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 64 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 65 | /* block_cmd_loop flags */ |
| 66 | #define BLOCK_READ 0 |
| 67 | #define BLOCK_WRITE (1 << 0) |
| 68 | #define BLOCK_I2C (1 << 1) |
| 69 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 70 | static void smbus_delay(void) |
| 71 | { |
| 72 | inb(0x80); |
| 73 | } |
| 74 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 75 | static void host_outb(uintptr_t base, u8 reg, u8 value) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 76 | { |
| 77 | outb(value, base + reg); |
| 78 | } |
| 79 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 80 | static u8 host_inb(uintptr_t base, u8 reg) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 81 | { |
| 82 | return inb(base + reg); |
| 83 | } |
| 84 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 85 | static void host_and_or(uintptr_t base, u8 reg, u8 mask, u8 or) |
Kyösti Mälkki | 65f5de2 | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 86 | { |
| 87 | u8 value; |
| 88 | value = host_inb(base, reg); |
| 89 | value &= mask; |
| 90 | value |= or; |
| 91 | host_outb(base, reg, value); |
| 92 | } |
| 93 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 94 | static int host_completed(u8 status) |
| 95 | { |
| 96 | if (status & SMBHSTSTS_HOST_BUSY) |
| 97 | return 0; |
Kyösti Mälkki | 44206e3 | 2019-02-26 17:17:24 +0200 | [diff] [blame] | 98 | |
| 99 | /* These status bits do not imply completion of transaction. */ |
| 100 | status &= ~(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INUSE_STS | |
| 101 | SMBHSTSTS_SMBALERT_STS); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 102 | return status != 0; |
| 103 | } |
| 104 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 105 | static int recover_master(uintptr_t base, int ret) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 106 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 107 | /* TODO: Depending of the failure, drive KILL transaction |
| 108 | * or force soft reset on SMBus master controller. |
| 109 | */ |
| 110 | printk(BIOS_ERR, "SMBus: Fatal master timeout (%d)\n", ret); |
| 111 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 112 | } |
| 113 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 114 | static int cb_err_from_stat(u8 status) |
| 115 | { |
Kyösti Mälkki | 44206e3 | 2019-02-26 17:17:24 +0200 | [diff] [blame] | 116 | /* These status bits do not imply errors. */ |
| 117 | status &= ~(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INUSE_STS | |
| 118 | SMBHSTSTS_SMBALERT_STS); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 119 | |
| 120 | if (status == SMBHSTSTS_INTR) |
| 121 | return 0; |
| 122 | |
| 123 | return SMBUS_ERROR; |
| 124 | } |
| 125 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 126 | static int setup_command(uintptr_t base, u8 ctrl, u8 xmitadd) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 127 | { |
| 128 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 129 | u8 host_busy; |
| 130 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 131 | do { |
| 132 | smbus_delay(); |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 133 | host_busy = host_inb(base, SMBHSTSTAT) & SMBHSTSTS_HOST_BUSY; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 134 | } while (--loops && host_busy); |
| 135 | |
| 136 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 137 | return recover_master(base, SMBUS_WAIT_UNTIL_READY_TIMEOUT); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 138 | |
| 139 | /* Clear any lingering errors, so the transaction will run. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 140 | host_and_or(base, SMBHSTSTAT, 0xff, 0); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 141 | |
| 142 | /* Set up transaction */ |
| 143 | /* Disable interrupts */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 144 | host_outb(base, SMBHSTCTL, ctrl); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 145 | |
| 146 | /* Set the device I'm talking to. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 147 | host_outb(base, SMBXMITADD, xmitadd); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 148 | |
| 149 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 150 | } |
| 151 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 152 | static int execute_command(uintptr_t base) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 153 | { |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 154 | unsigned int loops = SMBUS_TIMEOUT; |
| 155 | u8 status; |
| 156 | |
| 157 | /* Start the command. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 158 | host_and_or(base, SMBHSTCTL, 0xff, SMBHSTCNT_START); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 159 | |
| 160 | /* Poll for it to start. */ |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 161 | do { |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 162 | smbus_delay(); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 163 | |
| 164 | /* If we poll too slow, we could miss HOST_BUSY flag |
| 165 | * set and detect INTR or x_ERR flags instead here. |
| 166 | */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 167 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 168 | status &= ~(SMBHSTSTS_SMBALERT_STS | SMBHSTSTS_INUSE_STS); |
| 169 | } while (--loops && status == 0); |
| 170 | |
| 171 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 172 | return recover_master(base, |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 173 | SMBUS_WAIT_UNTIL_ACTIVE_TIMEOUT); |
| 174 | |
| 175 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 176 | } |
| 177 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 178 | static int complete_command(uintptr_t base) |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 179 | { |
| 180 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 181 | u8 status; |
| 182 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 183 | do { |
| 184 | smbus_delay(); |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 185 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 186 | } while (--loops && !host_completed(status)); |
| 187 | |
| 188 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 189 | return recover_master(base, |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 190 | SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
| 191 | |
| 192 | return cb_err_from_stat(status); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 193 | } |
| 194 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 195 | static int smbus_read_cmd(uintptr_t base, u8 ctrl, u8 device, u8 address) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 196 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 197 | int ret; |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 198 | u16 word; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 199 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 200 | /* Set up for a byte data read. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 201 | ret = setup_command(base, ctrl, XMIT_READ(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 202 | if (ret < 0) |
| 203 | return ret; |
| 204 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 205 | /* Set the command/address... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 206 | host_outb(base, SMBHSTCMD, address); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 207 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 208 | /* Clear the data bytes... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 209 | host_outb(base, SMBHSTDAT0, 0); |
| 210 | host_outb(base, SMBHSTDAT1, 0); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 211 | |
| 212 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 213 | ret = execute_command(base); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 214 | if (ret < 0) |
| 215 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 216 | |
| 217 | /* Poll for transaction completion */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 218 | ret = complete_command(base); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 219 | if (ret < 0) |
| 220 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 221 | |
| 222 | /* Read results of transaction */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 223 | word = host_inb(base, SMBHSTDAT0); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 224 | if (ctrl == I801_WORD_DATA) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 225 | word |= host_inb(base, SMBHSTDAT1) << 8; |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 226 | |
| 227 | return word; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 228 | } |
| 229 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 230 | static int smbus_write_cmd(uintptr_t base, u8 ctrl, u8 device, u8 address, u16 data) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 231 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 232 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 233 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 234 | /* Set up for a byte data write. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 235 | ret = setup_command(base, ctrl, XMIT_WRITE(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 236 | if (ret < 0) |
| 237 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 238 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 239 | /* Set the command/address... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 240 | host_outb(base, SMBHSTCMD, address); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 241 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 242 | /* Set the data bytes... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 243 | host_outb(base, SMBHSTDAT0, data & 0xff); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 244 | if (ctrl == I801_WORD_DATA) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 245 | host_outb(base, SMBHSTDAT1, data >> 8); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 246 | |
| 247 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 248 | ret = execute_command(base); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 249 | if (ret < 0) |
| 250 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 251 | |
| 252 | /* Poll for transaction completion */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 253 | return complete_command(base); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 254 | } |
| 255 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 256 | static int block_cmd_loop(uintptr_t base, u8 *buf, size_t max_bytes, int flags) |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 257 | { |
| 258 | u8 status; |
| 259 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 260 | int ret; |
| 261 | size_t bytes = 0; |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 262 | int is_write_cmd = flags & BLOCK_WRITE; |
| 263 | int sw_drives_nak = flags & BLOCK_I2C; |
| 264 | |
| 265 | /* Hardware limitations. */ |
| 266 | if (flags == (BLOCK_WRITE | BLOCK_I2C)) |
| 267 | return SMBUS_ERROR; |
| 268 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 269 | /* Set number of bytes to transfer. */ |
| 270 | /* Reset number of bytes to transfer so we notice later it |
| 271 | * was really updated with the transaction. */ |
| 272 | if (!sw_drives_nak) { |
| 273 | if (is_write_cmd) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 274 | host_outb(base, SMBHSTDAT0, max_bytes); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 275 | else |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 276 | host_outb(base, SMBHSTDAT0, 0); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | /* Send first byte from buffer, bytes_sent increments after |
| 280 | * hardware acknowledges it. |
| 281 | */ |
| 282 | if (is_write_cmd) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 283 | host_outb(base, SMBBLKDAT, *buf++); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 284 | |
| 285 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 286 | ret = execute_command(base); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 287 | if (ret < 0) |
| 288 | return ret; |
| 289 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 290 | /* Poll for transaction completion */ |
| 291 | do { |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 292 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 293 | |
| 294 | if (status & SMBHSTSTS_BYTE_DONE) { /* Byte done */ |
| 295 | |
| 296 | if (is_write_cmd) { |
| 297 | bytes++; |
| 298 | if (bytes < max_bytes) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 299 | host_outb(base, SMBBLKDAT, *buf++); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 300 | } else { |
| 301 | if (bytes < max_bytes) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 302 | *buf++ = host_inb(base, SMBBLKDAT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 303 | bytes++; |
| 304 | |
| 305 | /* Indicate that next byte is the last one. */ |
| 306 | if (sw_drives_nak && (bytes + 1 >= max_bytes)) { |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 307 | host_and_or(base, SMBHSTCTL, 0xff, |
| 308 | SMBHSTCNT_LAST_BYTE); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 309 | } |
| 310 | |
| 311 | } |
| 312 | |
| 313 | /* Engine internally completes the transaction |
| 314 | * and clears HOST_BUSY flag once the byte count |
| 315 | * has been reached or LAST_BYTE was set. |
| 316 | */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 317 | host_outb(base, SMBHSTSTAT, SMBHSTSTS_BYTE_DONE); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 318 | } |
| 319 | |
| 320 | } while (--loops && !host_completed(status)); |
| 321 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 322 | dprintk("%s: status = %02x, len = %zd / %zd, loops = %d\n", |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 323 | __func__, status, bytes, max_bytes, SMBUS_TIMEOUT - loops); |
| 324 | |
| 325 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame^] | 326 | return recover_master(base, SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 327 | |
| 328 | ret = cb_err_from_stat(status); |
| 329 | if (ret < 0) |
| 330 | return ret; |
| 331 | |
| 332 | return bytes; |
| 333 | } |
| 334 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 335 | int do_smbus_read_byte(unsigned int smbus_base, u8 device, unsigned int address) |
| 336 | { |
| 337 | return smbus_read_cmd(smbus_base, I801_BYTE_DATA, device, address); |
| 338 | } |
| 339 | |
| 340 | int do_smbus_read_word(unsigned int smbus_base, u8 device, unsigned int address) |
| 341 | { |
| 342 | return smbus_read_cmd(smbus_base, I801_WORD_DATA, device, address); |
| 343 | } |
| 344 | |
| 345 | int do_smbus_write_byte(unsigned int smbus_base, u8 device, unsigned int address, |
| 346 | unsigned int data) |
| 347 | { |
| 348 | return smbus_write_cmd(smbus_base, I801_BYTE_DATA, device, address, data); |
| 349 | } |
| 350 | |
| 351 | int do_smbus_write_word(unsigned int smbus_base, u8 device, unsigned int address, |
| 352 | unsigned int data) |
| 353 | { |
| 354 | return smbus_write_cmd(smbus_base, I801_WORD_DATA, device, address, data); |
| 355 | } |
| 356 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 357 | int do_smbus_block_read(unsigned int smbus_base, u8 device, u8 cmd, |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 358 | unsigned int max_bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 359 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 360 | int ret, slave_bytes; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 361 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 362 | max_bytes = MIN(SMBUS_BLOCK_MAXLEN, max_bytes); |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 363 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 364 | /* Set up for a block data read. */ |
| 365 | ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_READ(device)); |
| 366 | if (ret < 0) |
| 367 | return ret; |
| 368 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 369 | /* Set the command/address... */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 370 | host_outb(smbus_base, SMBHSTCMD, cmd); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 371 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 372 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 373 | ret = block_cmd_loop(smbus_base, buf, max_bytes, BLOCK_READ); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 374 | if (ret < 0) |
| 375 | return ret; |
| 376 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 377 | /* Post-check we received complete message. */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 378 | slave_bytes = host_inb(smbus_base, SMBHSTDAT0); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 379 | if (ret < slave_bytes) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 380 | return SMBUS_ERROR; |
| 381 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 382 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 383 | } |
| 384 | |
| 385 | int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd, |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 386 | const unsigned int bytes, const u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 387 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 388 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 389 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 390 | if (bytes > SMBUS_BLOCK_MAXLEN) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 391 | return SMBUS_ERROR; |
| 392 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 393 | /* Set up for a block data write. */ |
| 394 | ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
| 395 | if (ret < 0) |
| 396 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 397 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 398 | /* Set the command/address... */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 399 | host_outb(smbus_base, SMBHSTCMD, cmd); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 400 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 401 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 402 | ret = block_cmd_loop(smbus_base, (u8 *)buf, bytes, BLOCK_WRITE); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 403 | if (ret < 0) |
| 404 | return ret; |
| 405 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 406 | if (ret < bytes) |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 407 | return SMBUS_ERROR; |
| 408 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 409 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 410 | } |
| 411 | |
| 412 | /* Only since ICH5 */ |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 413 | static int has_i2c_read_command(void) |
| 414 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 415 | if (CONFIG(SOUTHBRIDGE_INTEL_I82371EB) || |
| 416 | CONFIG(SOUTHBRIDGE_INTEL_I82801DX)) |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 417 | return 0; |
| 418 | return 1; |
| 419 | } |
| 420 | |
| 421 | int do_i2c_eeprom_read(unsigned int smbus_base, u8 device, |
Kyösti Mälkki | 1e39236 | 2017-08-20 21:36:03 +0300 | [diff] [blame] | 422 | unsigned int offset, const unsigned int bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 423 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 424 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 425 | |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 426 | if (!has_i2c_read_command()) |
| 427 | return SMBUS_ERROR; |
| 428 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 429 | /* Set up for a i2c block data read. |
| 430 | * |
| 431 | * FIXME: Address parameter changes to XMIT_READ(device) with |
| 432 | * some revision of PCH. Presumably hardware revisions that |
| 433 | * do not have i2c block write support internally set LSB. |
| 434 | */ |
| 435 | ret = setup_command(smbus_base, I801_I2C_BLOCK_DATA, |
| 436 | XMIT_WRITE(device)); |
| 437 | if (ret < 0) |
| 438 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 439 | |
| 440 | /* device offset */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 441 | host_outb(smbus_base, SMBHSTDAT1, offset); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 442 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 443 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 444 | ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_READ | BLOCK_I2C); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 445 | if (ret < 0) |
| 446 | return ret; |
| 447 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 448 | /* Post-check we received complete message. */ |
| 449 | if (ret < bytes) |
Kyösti Mälkki | 1e39236 | 2017-08-20 21:36:03 +0300 | [diff] [blame] | 450 | return SMBUS_ERROR; |
| 451 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 452 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 453 | } |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 454 | |
| 455 | /* |
| 456 | * The caller is responsible of settings HOSTC I2C_EN bit prior to making this |
| 457 | * call! |
| 458 | */ |
| 459 | int do_i2c_block_write(unsigned int smbus_base, u8 device, |
| 460 | unsigned int bytes, u8 *buf) |
| 461 | { |
| 462 | u8 cmd; |
| 463 | int ret; |
| 464 | |
| 465 | if (!CONFIG(SOC_INTEL_BRASWELL)) |
| 466 | return SMBUS_ERROR; |
| 467 | |
| 468 | if (!bytes || (bytes > SMBUS_BLOCK_MAXLEN)) |
| 469 | return SMBUS_ERROR; |
| 470 | |
| 471 | /* Set up for a block data write. */ |
| 472 | ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
| 473 | if (ret < 0) |
| 474 | return ret; |
| 475 | |
| 476 | /* |
| 477 | * In i2c mode SMBus controller sequence on bus will be: |
| 478 | * <SMBXINTADD> <SMBHSTDAT1> <SMBBLKDAT> .. <SMBBLKDAT> |
| 479 | * The SMBHSTCMD must be written also to ensure the SMBUs controller |
| 480 | * will generate the i2c sequence. |
| 481 | */ |
| 482 | cmd = *buf++; |
| 483 | bytes--; |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 484 | host_outb(smbus_base, SMBHSTCMD, cmd); |
| 485 | host_outb(smbus_base, SMBHSTDAT1, cmd); |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 486 | |
| 487 | /* Execute block transaction. */ |
| 488 | ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_WRITE); |
| 489 | if (ret < 0) |
| 490 | return ret; |
| 491 | |
| 492 | if (ret < bytes) |
| 493 | return SMBUS_ERROR; |
| 494 | |
| 495 | ret++; /* 1st byte has been written using SMBHSTDAT1 */ |
| 496 | return ret; |
| 497 | } |