Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 3 | |
| 4 | #include <console/console.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 5 | #include <device/pci_ops.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame^] | 6 | #include <acpi/acpi.h> |
| 7 | #include <acpi/acpigen.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 8 | #include <stdint.h> |
| 9 | #include <device/device.h> |
| 10 | #include <device/pci.h> |
| 11 | #include <device/pci_ids.h> |
| 12 | #include <device/hypertransport.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 13 | #include <string.h> |
Ronald G. Minnich | 5079a0d | 2012-11-27 11:32:38 -0800 | [diff] [blame] | 14 | #include <lib.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 15 | #include <cpu/cpu.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 16 | #include <cpu/x86/lapic.h> |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 17 | #include <cpu/amd/msr.h> |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 18 | #include <cpu/amd/mtrr.h> |
Kyösti Mälkki | 3d3152e | 2019-01-10 09:05:30 +0200 | [diff] [blame] | 19 | #include <northbridge/amd/agesa/nb_common.h> |
Kyösti Mälkki | 28c4d2f | 2016-11-25 11:21:02 +0200 | [diff] [blame] | 20 | #include <northbridge/amd/agesa/state_machine.h> |
Kyösti Mälkki | d610c58 | 2017-03-05 06:28:18 +0200 | [diff] [blame] | 21 | #include <northbridge/amd/agesa/agesa_helper.h> |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 22 | #include <sb_cimx.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 23 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 24 | #define FX_DEVS 1 |
| 25 | |
Kyösti Mälkki | e2c2a4c | 2018-05-20 20:59:52 +0300 | [diff] [blame] | 26 | static struct device *__f0_dev[FX_DEVS]; |
| 27 | static struct device *__f1_dev[FX_DEVS]; |
| 28 | static struct device *__f2_dev[FX_DEVS]; |
| 29 | static struct device *__f4_dev[FX_DEVS]; |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 30 | static unsigned int fx_devs = 0; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 31 | |
Kyösti Mälkki | 2b218e3 | 2019-01-15 11:14:28 +0200 | [diff] [blame] | 32 | |
| 33 | struct dram_base_mask_t { |
| 34 | u32 base; //[47:27] at [28:8] |
| 35 | u32 mask; //[47:27] at [28:8] and enable at bit 0 |
| 36 | }; |
| 37 | |
| 38 | static struct dram_base_mask_t get_dram_base_mask(u32 nodeid) |
| 39 | { |
| 40 | struct device *dev; |
| 41 | struct dram_base_mask_t d; |
Kyösti Mälkki | 2b218e3 | 2019-01-15 11:14:28 +0200 | [diff] [blame] | 42 | dev = __f1_dev[0]; |
Kyösti Mälkki | 2b218e3 | 2019-01-15 11:14:28 +0200 | [diff] [blame] | 43 | |
| 44 | u32 temp; |
| 45 | temp = pci_read_config32(dev, 0x44); //[39:24] at [31:16] |
| 46 | d.mask = (temp & 0xffff0000); // mask out DramMask [26:24] too |
| 47 | |
| 48 | temp = pci_read_config32(dev, 0x40); //[35:24] at [27:16] |
| 49 | d.mask |= (temp & 1); // read enable bit |
| 50 | |
| 51 | d.base = (temp & 0x0fff0000); // mask out DramBase [26:24) too |
| 52 | |
| 53 | return d; |
| 54 | } |
| 55 | |
| 56 | static u32 get_io_addr_index(u32 nodeid, u32 linkn) |
| 57 | { |
| 58 | return 0; |
| 59 | } |
| 60 | |
| 61 | static u32 get_mmio_addr_index(u32 nodeid, u32 linkn) |
| 62 | { |
| 63 | return 0; |
| 64 | } |
| 65 | |
| 66 | static void set_io_addr_reg(struct device *dev, u32 nodeid, u32 linkn, u32 reg, |
| 67 | u32 io_min, u32 io_max) |
| 68 | { |
| 69 | |
| 70 | u32 tempreg; |
| 71 | /* io range allocation */ |
| 72 | tempreg = (nodeid & 0xf) | ((nodeid & 0x30) << (8 - 4)) | (linkn << 4) | |
| 73 | ((io_max & 0xf0) << (12 - 4)); //limit |
| 74 | pci_write_config32(__f1_dev[0], reg+4, tempreg); |
| 75 | |
| 76 | tempreg = 3 | ((io_min & 0xf0) << (12 - 4)); //base :ISA and VGA ? |
| 77 | pci_write_config32(__f1_dev[0], reg, tempreg); |
| 78 | } |
| 79 | |
| 80 | static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, |
| 81 | u32 mmio_min, u32 mmio_max, u32 nodes) |
| 82 | { |
| 83 | |
| 84 | u32 tempreg; |
| 85 | /* io range allocation */ |
| 86 | tempreg = (nodeid & 0xf) | (linkn << 4) | (mmio_max & 0xffffff00); |
| 87 | pci_write_config32(__f1_dev[0], reg + 4, tempreg); |
| 88 | tempreg = 3 | (nodeid & 0x30) | (mmio_min & 0xffffff00); |
| 89 | pci_write_config32(__f1_dev[0], reg, tempreg); |
| 90 | } |
| 91 | |
Kyösti Mälkki | e2c2a4c | 2018-05-20 20:59:52 +0300 | [diff] [blame] | 92 | static struct device *get_node_pci(u32 nodeid, u32 fn) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 93 | { |
Kyösti Mälkki | 3d3152e | 2019-01-10 09:05:30 +0200 | [diff] [blame] | 94 | return pcidev_on_root(DEV_CDB + nodeid, fn); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 95 | } |
| 96 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 97 | static void get_fx_devs(void) |
| 98 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 99 | int i; |
| 100 | for (i = 0; i < FX_DEVS; i++) { |
| 101 | __f0_dev[i] = get_node_pci(i, 0); |
| 102 | __f1_dev[i] = get_node_pci(i, 1); |
| 103 | __f2_dev[i] = get_node_pci(i, 2); |
| 104 | __f4_dev[i] = get_node_pci(i, 4); |
| 105 | if (__f0_dev[i] != NULL && __f1_dev[i] != NULL) |
| 106 | fx_devs = i + 1; |
| 107 | } |
| 108 | if (__f1_dev[0] == NULL || __f0_dev[0] == NULL || fx_devs == 0) { |
| 109 | die("Cannot find 0:0x18.[0|1]\n"); |
| 110 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 111 | } |
| 112 | |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 113 | static u32 f1_read_config32(unsigned int reg) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 114 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 115 | if (fx_devs == 0) |
| 116 | get_fx_devs(); |
| 117 | return pci_read_config32(__f1_dev[0], reg); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 118 | } |
| 119 | |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 120 | static void f1_write_config32(unsigned int reg, u32 value) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 121 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 122 | int i; |
| 123 | if (fx_devs == 0) |
| 124 | get_fx_devs(); |
| 125 | for (i = 0; i < fx_devs; i++) { |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 126 | struct device *dev; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 127 | dev = __f1_dev[i]; |
| 128 | if (dev && dev->enabled) { |
| 129 | pci_write_config32(dev, reg, value); |
| 130 | } |
| 131 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 132 | } |
| 133 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 134 | static u32 amdfam14_nodeid(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 135 | { |
Kyösti Mälkki | 3d3152e | 2019-01-10 09:05:30 +0200 | [diff] [blame] | 136 | return (dev->path.pci.devfn >> 3) - DEV_CDB; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 137 | } |
| 138 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 139 | static void northbridge_init(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 140 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 141 | printk(BIOS_DEBUG, "Northbridge init\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 142 | } |
| 143 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 144 | static void set_vga_enable_reg(u32 nodeid, u32 linkn) |
| 145 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 146 | u32 val; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 147 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 148 | val = 1 | (nodeid << 4) | (linkn << 12); |
| 149 | /* it will routing (1)mmio 0xa0000:0xbffff (2) io 0x3b0:0x3bb, |
| 150 | 0x3c0:0x3df */ |
| 151 | f1_write_config32(0xf4, val); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 152 | |
| 153 | } |
| 154 | |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 155 | static int reg_useable(unsigned int reg, struct device *goal_dev, |
| 156 | unsigned int goal_nodeid, unsigned int goal_link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 157 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 158 | struct resource *res; |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 159 | unsigned int nodeid, link = 0; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 160 | int result; |
| 161 | res = 0; |
| 162 | for (nodeid = 0; !res && (nodeid < fx_devs); nodeid++) { |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 163 | struct device *dev; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 164 | dev = __f0_dev[nodeid]; |
| 165 | if (!dev) |
| 166 | continue; |
| 167 | for (link = 0; !res && (link < 8); link++) { |
| 168 | res = probe_resource(dev, IOINDEX(0x1000 + reg, link)); |
| 169 | } |
| 170 | } |
| 171 | result = 2; |
| 172 | if (res) { |
| 173 | result = 0; |
| 174 | if ((goal_link == (link - 1)) && |
| 175 | (goal_nodeid == (nodeid - 1)) && (res->flags <= 1)) { |
| 176 | result = 1; |
| 177 | } |
| 178 | } |
| 179 | return result; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 180 | } |
| 181 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 182 | static struct resource *amdfam14_find_iopair(struct device *dev, |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 183 | unsigned int nodeid, unsigned int link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 184 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 185 | struct resource *resource; |
| 186 | u32 result, reg; |
| 187 | resource = 0; |
| 188 | reg = 0; |
| 189 | result = reg_useable(0xc0, dev, nodeid, link); |
| 190 | if (result >= 1) { |
| 191 | /* I have been allocated this one */ |
| 192 | reg = 0xc0; |
| 193 | } |
| 194 | /* Ext conf space */ |
| 195 | if (!reg) { |
| 196 | /* Because of Extend conf space, we will never run out of reg, |
Elyes HAOUAS | a342f39 | 2018-10-17 10:56:26 +0200 | [diff] [blame] | 197 | * but we need one index to differ them. So,same node and same |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 198 | * link can have multi range |
| 199 | */ |
| 200 | u32 index = get_io_addr_index(nodeid, link); |
| 201 | reg = 0x110 + (index << 24) + (4 << 20); // index could be 0, 255 |
| 202 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 203 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 204 | resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 205 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 206 | return resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 207 | } |
| 208 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 209 | static struct resource *amdfam14_find_mempair(struct device *dev, u32 nodeid, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 210 | u32 link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 211 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 212 | struct resource *resource; |
| 213 | u32 free_reg, reg; |
| 214 | resource = 0; |
| 215 | free_reg = 0; |
| 216 | for (reg = 0x80; reg <= 0xb8; reg += 0x8) { |
| 217 | int result; |
| 218 | result = reg_useable(reg, dev, nodeid, link); |
| 219 | if (result == 1) { |
| 220 | /* I have been allocated this one */ |
| 221 | break; |
| 222 | } else if (result > 1) { |
| 223 | /* I have a free register pair */ |
| 224 | free_reg = reg; |
| 225 | } |
| 226 | } |
| 227 | if (reg > 0xb8) { |
| 228 | reg = free_reg; |
| 229 | } |
| 230 | /* Ext conf space */ |
| 231 | if (!reg) { |
| 232 | /* Because of Extend conf space, we will never run out of reg, |
Elyes HAOUAS | a342f39 | 2018-10-17 10:56:26 +0200 | [diff] [blame] | 233 | * but we need one index to differ them. So,same node and same |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 234 | * link can have multi range |
| 235 | */ |
| 236 | u32 index = get_mmio_addr_index(nodeid, link); |
| 237 | reg = 0x110 + (index << 24) + (6 << 20); // index could be 0, 63 |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 238 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 239 | } |
| 240 | resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); |
| 241 | return resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 242 | } |
| 243 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 244 | static void amdfam14_link_read_bases(struct device *dev, u32 nodeid, u32 link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 245 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 246 | struct resource *resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 247 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 248 | /* Initialize the io space constraints on the current bus */ |
| 249 | resource = amdfam14_find_iopair(dev, nodeid, link); |
| 250 | if (resource) { |
| 251 | u32 align; |
Kyösti Mälkki | ac7402d | 2014-12-14 08:30:17 +0200 | [diff] [blame] | 252 | align = log2(HT_IO_HOST_ALIGN); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 253 | resource->base = 0; |
| 254 | resource->size = 0; |
| 255 | resource->align = align; |
| 256 | resource->gran = align; |
| 257 | resource->limit = 0xffffUL; |
| 258 | resource->flags = IORESOURCE_IO | IORESOURCE_BRIDGE; |
| 259 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 260 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 261 | /* Initialize the prefetchable memory constraints on the current bus */ |
| 262 | resource = amdfam14_find_mempair(dev, nodeid, link); |
| 263 | if (resource) { |
| 264 | resource->base = 0; |
| 265 | resource->size = 0; |
| 266 | resource->align = log2(HT_MEM_HOST_ALIGN); |
| 267 | resource->gran = log2(HT_MEM_HOST_ALIGN); |
| 268 | resource->limit = 0xffffffffffULL; |
| 269 | resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
| 270 | resource->flags |= IORESOURCE_BRIDGE; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 271 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 272 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 273 | /* Initialize the memory constraints on the current bus */ |
| 274 | resource = amdfam14_find_mempair(dev, nodeid, link); |
| 275 | if (resource) { |
| 276 | resource->base = 0; |
| 277 | resource->size = 0; |
| 278 | resource->align = log2(HT_MEM_HOST_ALIGN); |
| 279 | resource->gran = log2(HT_MEM_HOST_ALIGN); |
| 280 | resource->limit = 0xffffffffffULL; |
| 281 | resource->flags = IORESOURCE_MEM | IORESOURCE_BRIDGE; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 282 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 283 | } |
| 284 | |
| 285 | static u32 my_find_pci_tolm(struct bus *bus, u32 tolm) |
| 286 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 287 | struct resource *min; |
| 288 | min = 0; |
| 289 | search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, |
| 290 | &min); |
| 291 | if (min && tolm > min->base) { |
| 292 | tolm = min->base; |
| 293 | } |
| 294 | return tolm; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 295 | } |
| 296 | |
| 297 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
| 298 | |
| 299 | struct hw_mem_hole_info { |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 300 | unsigned int hole_startk; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 301 | int node_id; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 302 | }; |
| 303 | |
| 304 | static struct hw_mem_hole_info get_hw_mem_hole_info(void) |
| 305 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 306 | struct hw_mem_hole_info mem_hole; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 307 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 308 | mem_hole.hole_startk = CONFIG_HW_MEM_HOLE_SIZEK; |
| 309 | mem_hole.node_id = -1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 310 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 311 | struct dram_base_mask_t d; |
| 312 | u32 hole; |
| 313 | d = get_dram_base_mask(0); |
| 314 | if (d.mask & 1) { |
| 315 | hole = pci_read_config32(__f1_dev[0], 0xf0); |
| 316 | if (hole & 1) { // we find the hole |
| 317 | mem_hole.hole_startk = (hole & (0xff << 24)) >> 10; |
| 318 | mem_hole.node_id = 0; // record the node No with hole |
| 319 | } |
| 320 | } |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 321 | return mem_hole; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 322 | } |
| 323 | #endif |
| 324 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 325 | static void nb_read_resources(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 326 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 327 | u32 nodeid; |
| 328 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 329 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 330 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 331 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 332 | nodeid = amdfam14_nodeid(dev); |
| 333 | for (link = dev->link_list; link; link = link->next) { |
| 334 | if (link->children) { |
| 335 | amdfam14_link_read_bases(dev, nodeid, link->link_num); |
| 336 | } |
| 337 | } |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 338 | |
| 339 | /* |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 340 | * This MMCONF resource must be reserved in the PCI domain. |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 341 | * It is not honored by the coreboot resource allocator if it is in |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 342 | * the CPU_CLUSTER. |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 343 | */ |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 344 | mmconf_resource(dev, MMIO_CONF_BASE); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 345 | } |
| 346 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 347 | static void set_resource(struct device *dev, struct resource *resource, |
| 348 | u32 nodeid) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 349 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 350 | resource_t rbase, rend; |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 351 | unsigned int reg, link_num; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 352 | char buf[50]; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 353 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 354 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 355 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 356 | /* Make certain the resource has actually been set */ |
| 357 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
| 358 | return; |
| 359 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 360 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 361 | /* If I have already stored this resource don't worry about it */ |
| 362 | if (resource->flags & IORESOURCE_STORED) { |
| 363 | return; |
| 364 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 365 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 366 | /* Only handle PCI memory and IO resources */ |
| 367 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
| 368 | return; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 369 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 370 | /* Ensure I am actually looking at a resource of function 1 */ |
| 371 | if ((resource->index & 0xffff) < 0x1000) { |
| 372 | return; |
| 373 | } |
| 374 | /* Get the base address */ |
| 375 | rbase = resource->base; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 376 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 377 | /* Get the limit (rounded up) */ |
| 378 | rend = resource_end(resource); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 379 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 380 | /* Get the register and link */ |
| 381 | reg = resource->index & 0xfff; // 4k |
| 382 | link_num = IOINDEX_LINK(resource->index); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 383 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 384 | if (resource->flags & IORESOURCE_IO) { |
| 385 | set_io_addr_reg(dev, nodeid, link_num, reg, rbase >> 8, |
| 386 | rend >> 8); |
| 387 | } else if (resource->flags & IORESOURCE_MEM) { |
| 388 | set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >> 24), |
| 389 | rbase >> 8, rend >> 8, 1); // [39:8] |
| 390 | } |
| 391 | resource->flags |= IORESOURCE_STORED; |
Elyes HAOUAS | 0d4b11a | 2016-10-03 21:57:21 +0200 | [diff] [blame] | 392 | snprintf(buf, sizeof(buf), " <node %x link %x>", nodeid, link_num); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 393 | report_resource_stored(dev, resource, buf); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 394 | } |
| 395 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 396 | #if CONFIG(CONSOLE_VGA_MULTI) |
Kyösti Mälkki | e2c2a4c | 2018-05-20 20:59:52 +0300 | [diff] [blame] | 397 | extern struct device *vga_pri; // the primary vga device, defined in device.c |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 398 | #endif |
| 399 | |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 400 | static void create_vga_resource(struct device *dev, unsigned int nodeid) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 401 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 402 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 403 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 404 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 405 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 406 | /* find out which link the VGA card is connected, |
| 407 | * we only deal with the 'first' vga card */ |
| 408 | for (link = dev->link_list; link; link = link->next) { |
| 409 | if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 410 | #if CONFIG(CONSOLE_VGA_MULTI) |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 411 | printk(BIOS_DEBUG, |
| 412 | "VGA: vga_pri bus num = %d bus range [%d,%d]\n", |
| 413 | vga_pri->bus->secondary, link->secondary, |
| 414 | link->subordinate); |
| 415 | /* We need to make sure the vga_pri is under the link */ |
| 416 | if ((vga_pri->bus->secondary >= link->secondary) && |
| 417 | (vga_pri->bus->secondary <= link->subordinate)) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 418 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 419 | break; |
| 420 | } |
| 421 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 422 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 423 | /* no VGA card installed */ |
| 424 | if (link == NULL) |
| 425 | return; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 426 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 427 | printk(BIOS_DEBUG, "VGA: %s (aka node %d) link %d has VGA device\n", |
| 428 | dev_path(dev), nodeid, link->link_num); |
| 429 | set_vga_enable_reg(nodeid, link->link_num); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 430 | } |
| 431 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 432 | static void nb_set_resources(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 433 | { |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 434 | unsigned int nodeid; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 435 | struct bus *bus; |
| 436 | struct resource *res; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 437 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 438 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 439 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 440 | /* Find the nodeid */ |
| 441 | nodeid = amdfam14_nodeid(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 442 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 443 | create_vga_resource(dev, nodeid); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 444 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 445 | /* Set each resource we have found */ |
| 446 | for (res = dev->resource_list; res; res = res->next) { |
| 447 | set_resource(dev, res, nodeid); |
| 448 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 449 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 450 | for (bus = dev->link_list; bus; bus = bus->next) { |
| 451 | if (bus->children) { |
| 452 | assign_resources(bus); |
| 453 | } |
| 454 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 455 | } |
| 456 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 457 | /* Domain/Root Complex related code */ |
| 458 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 459 | static void domain_read_resources(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 460 | { |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 461 | unsigned int reg; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 462 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 463 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 464 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 465 | /* Find the already assigned resource pairs */ |
| 466 | get_fx_devs(); |
| 467 | for (reg = 0x80; reg <= 0xc0; reg += 0x08) { |
| 468 | u32 base, limit; |
| 469 | base = f1_read_config32(reg); |
| 470 | limit = f1_read_config32(reg + 0x04); |
| 471 | /* Is this register allocated? */ |
| 472 | if ((base & 3) != 0) { |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 473 | unsigned int nodeid, reg_link; |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 474 | struct device *reg_dev; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 475 | if (reg < 0xc0) { // mmio |
| 476 | nodeid = (limit & 0xf) + (base & 0x30); |
| 477 | } else { // io |
| 478 | nodeid = (limit & 0xf) + ((base >> 4) & 0x30); |
| 479 | } |
| 480 | reg_link = (limit >> 4) & 7; |
| 481 | reg_dev = __f0_dev[nodeid]; |
| 482 | if (reg_dev) { |
| 483 | /* Reserve the resource */ |
| 484 | struct resource *res; |
| 485 | res = |
| 486 | new_resource(reg_dev, |
| 487 | IOINDEX(0x1000 + reg, |
| 488 | reg_link)); |
| 489 | if (res) { |
| 490 | res->flags = 1; |
| 491 | } |
| 492 | } |
| 493 | } |
| 494 | } |
| 495 | /* FIXME: do we need to check extend conf space? |
| 496 | I don't believe that much preset value */ |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 497 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 498 | pci_domain_read_resources(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 499 | } |
| 500 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 501 | static void domain_set_resources(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 502 | { |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 503 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Stefan Reinauer | 29e6548 | 2015-06-18 01:18:09 -0700 | [diff] [blame] | 504 | printk(BIOS_DEBUG, " amsr - incoming dev = %p\n", dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 505 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 506 | unsigned long mmio_basek; |
| 507 | u32 pci_tolm; |
| 508 | int idx; |
| 509 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 510 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 511 | struct hw_mem_hole_info mem_hole; |
| 512 | u32 reset_memhole = 1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 513 | #endif |
| 514 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 515 | pci_tolm = 0xffffffffUL; |
| 516 | for (link = dev->link_list; link; link = link->next) { |
| 517 | pci_tolm = my_find_pci_tolm(link, pci_tolm); |
| 518 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 519 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 520 | // FIXME handle interleaved nodes. If you fix this here, please fix |
| 521 | // amdk8, too. |
| 522 | mmio_basek = pci_tolm >> 10; |
| 523 | /* Round mmio_basek to something the processor can support */ |
| 524 | mmio_basek &= ~((1 << 6) - 1); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 525 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 526 | // FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M |
| 527 | // MMIO hole. If you fix this here, please fix amdk8, too. |
| 528 | /* Round the mmio hole to 64M */ |
| 529 | mmio_basek &= ~((64 * 1024) - 1); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 530 | |
| 531 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
| 532 | /* if the hw mem hole is already set in raminit stage, here we will compare |
| 533 | * mmio_basek and hole_basek. if mmio_basek is bigger that hole_basek and will |
| 534 | * use hole_basek as mmio_basek and we don't need to reset hole. |
| 535 | * otherwise We reset the hole to the mmio_basek |
| 536 | */ |
| 537 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 538 | mem_hole = get_hw_mem_hole_info(); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 539 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 540 | // Use hole_basek as mmio_basek, and we don't need to reset hole anymore |
| 541 | if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { |
| 542 | mmio_basek = mem_hole.hole_startk; |
| 543 | reset_memhole = 0; |
| 544 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 545 | #endif |
| 546 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 547 | idx = 0x10; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 548 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 549 | struct dram_base_mask_t d; |
| 550 | resource_t basek, limitk, sizek; // 4 1T |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 551 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 552 | d = get_dram_base_mask(0); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 553 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 554 | if (d.mask & 1) { |
| 555 | basek = ((resource_t) ((u64) d.base)) << 8; |
| 556 | limitk = (resource_t) (((u64) d.mask << 8) | 0xFFFFFF); |
| 557 | printk(BIOS_DEBUG, |
| 558 | "adsr: (before) basek = %llx, limitk = %llx.\n", basek, |
| 559 | limitk); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 560 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 561 | /* Convert these values to multiples of 1K for ease of math. */ |
| 562 | basek >>= 10; |
| 563 | limitk >>= 10; |
| 564 | sizek = limitk - basek + 1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 565 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 566 | printk(BIOS_DEBUG, |
| 567 | "adsr: (after) basek = %llx, limitk = %llx, sizek = %llx.\n", |
| 568 | basek, limitk, sizek); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 569 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 570 | /* see if we need a hole from 0xa0000 to 0xbffff */ |
| 571 | if ((basek < 640) && (sizek > 768)) { |
| 572 | printk(BIOS_DEBUG,"adsr - 0xa0000 to 0xbffff resource.\n"); |
| 573 | ram_resource(dev, (idx | 0), basek, 640 - basek); |
| 574 | idx += 0x10; |
| 575 | basek = 768; |
| 576 | sizek = limitk - 768; |
| 577 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 578 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 579 | printk(BIOS_DEBUG, |
| 580 | "adsr: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", |
| 581 | mmio_basek, basek, limitk); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 582 | |
Kyösti Mälkki | 26c6543 | 2014-06-26 05:30:54 +0300 | [diff] [blame] | 583 | /* split the region to accommodate pci memory space */ |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 584 | if ((basek < 4 * 1024 * 1024) && (limitk > mmio_basek)) { |
| 585 | if (basek <= mmio_basek) { |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 586 | unsigned int pre_sizek; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 587 | pre_sizek = mmio_basek - basek; |
| 588 | if (pre_sizek > 0) { |
| 589 | ram_resource(dev, idx, basek, |
| 590 | pre_sizek); |
| 591 | idx += 0x10; |
| 592 | sizek -= pre_sizek; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 593 | } |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 594 | basek = mmio_basek; |
| 595 | } |
| 596 | if ((basek + sizek) <= 4 * 1024 * 1024) { |
| 597 | sizek = 0; |
| 598 | } else { |
| 599 | basek = 4 * 1024 * 1024; |
| 600 | sizek -= (4 * 1024 * 1024 - mmio_basek); |
| 601 | } |
| 602 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 603 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 604 | ram_resource(dev, (idx | 0), basek, sizek); |
| 605 | idx += 0x10; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 606 | printk(BIOS_DEBUG, |
| 607 | "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0, |
| 608 | mmio_basek, basek, limitk); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 609 | } |
| 610 | printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 611 | |
Kyösti Mälkki | 61be360 | 2017-04-15 20:07:53 +0300 | [diff] [blame] | 612 | add_uma_resource_below_tolm(dev, 7); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 613 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 614 | for (link = dev->link_list; link; link = link->next) { |
| 615 | if (link->children) { |
| 616 | assign_resources(link); |
| 617 | } |
| 618 | } |
| 619 | printk(BIOS_DEBUG, " adsr - leaving this lovely routine.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 620 | } |
| 621 | |
Aaron Durbin | aa090cb | 2017-09-13 16:01:52 -0600 | [diff] [blame] | 622 | static const char *domain_acpi_name(const struct device *dev) |
Tobias Diedrich | d8a2c1f | 2017-02-20 02:46:19 +0100 | [diff] [blame] | 623 | { |
| 624 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 625 | return "PCI0"; |
| 626 | |
| 627 | return NULL; |
| 628 | } |
| 629 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 630 | /* Bus related code */ |
| 631 | |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 632 | static void cpu_bus_scan(struct device *dev) |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 633 | { |
Kyösti Mälkki | c33f1e9 | 2012-08-07 17:12:11 +0300 | [diff] [blame] | 634 | struct bus *cpu_bus = dev->link_list; |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 635 | struct device *cpu; |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 636 | int apic_id, cores_found; |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 637 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 638 | /* There is only one node for fam14, but there may be multiple cores. */ |
Kyösti Mälkki | 4ad7f5b | 2018-05-22 01:15:17 +0300 | [diff] [blame] | 639 | cpu = pcidev_on_root(0x18, 0); |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 640 | if (!cpu) |
| 641 | printk(BIOS_ERR, "ERROR: %02x:%02x.0 not found", 0, 0x18); |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 642 | |
Kyösti Mälkki | 4ad7f5b | 2018-05-22 01:15:17 +0300 | [diff] [blame] | 643 | cores_found = (pci_read_config32(pcidev_on_root(0x18, 0x3), |
| 644 | 0xe8) >> 12) & 3; |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 645 | printk(BIOS_DEBUG, " AP siblings=%d\n", cores_found); |
| 646 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 647 | for (apic_id = 0; apic_id <= cores_found; apic_id++) { |
Kyösti Mälkki | c33f1e9 | 2012-08-07 17:12:11 +0300 | [diff] [blame] | 648 | cpu = add_cpu_device(cpu_bus, apic_id, 1); |
| 649 | if (cpu) |
| 650 | amd_cpu_topology(cpu, 0, apic_id); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 651 | } |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 652 | } |
| 653 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 654 | static void cpu_bus_init(struct device *dev) |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 655 | { |
| 656 | initialize_cpus(dev->link_list); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 657 | } |
| 658 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 659 | /* North Bridge Structures */ |
| 660 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 661 | static void northbridge_fill_ssdt_generator(const struct device *device) |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 662 | { |
| 663 | msr_t msr; |
| 664 | char pscope[] = "\\_SB.PCI0"; |
| 665 | |
| 666 | acpigen_write_scope(pscope); |
| 667 | msr = rdmsr(TOP_MEM); |
| 668 | acpigen_write_name_dword("TOM1", msr.lo); |
| 669 | msr = rdmsr(TOP_MEM2); |
| 670 | /* |
| 671 | * Since XP only implements parts of ACPI 2.0, we can't use a qword |
| 672 | * here. |
| 673 | * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt |
| 674 | * slide 22ff. |
| 675 | * Shift value right by 20 bit to make it fit into 32bit, |
| 676 | * giving us 1MB granularity and a limit of almost 4Exabyte of memory. |
| 677 | */ |
| 678 | acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); |
| 679 | acpigen_pop_len(); |
| 680 | } |
| 681 | |
Vladimir Serbinenko | 807127f | 2014-11-09 13:36:18 +0100 | [diff] [blame] | 682 | static unsigned long acpi_fill_hest(acpi_hest_t *hest) |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 683 | { |
| 684 | void *addr, *current; |
| 685 | |
| 686 | /* Skip the HEST header. */ |
| 687 | current = (void *)(hest + 1); |
| 688 | |
| 689 | addr = agesawrapper_getlateinitptr(PICK_WHEA_MCE); |
| 690 | if (addr != NULL) |
Stefan Reinauer | 29e6548 | 2015-06-18 01:18:09 -0700 | [diff] [blame] | 691 | current += acpi_create_hest_error_source(hest, current, 0, |
| 692 | addr + 2, *(UINT16 *)addr - 2); |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 693 | |
| 694 | addr = agesawrapper_getlateinitptr(PICK_WHEA_CMC); |
| 695 | if (addr != NULL) |
Stefan Reinauer | 29e6548 | 2015-06-18 01:18:09 -0700 | [diff] [blame] | 696 | current += acpi_create_hest_error_source(hest, current, 1, |
| 697 | addr + 2, *(UINT16 *)addr - 2); |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 698 | |
| 699 | return (unsigned long)current; |
| 700 | } |
| 701 | |
Michał Żygowski | 9550e97 | 2020-03-20 13:56:46 +0100 | [diff] [blame] | 702 | static void patch_ssdt_processor_scope(acpi_header_t *ssdt) |
| 703 | { |
| 704 | unsigned int len = ssdt->length - sizeof(acpi_header_t); |
| 705 | unsigned int i; |
| 706 | |
| 707 | for (i = sizeof(acpi_header_t); i < len; i++) { |
| 708 | /* Search for _PR_ scope and replace it with _SB_ */ |
| 709 | if (*(uint32_t *)((unsigned long)ssdt + i) == 0x5f52505f) |
| 710 | *(uint32_t *)((unsigned long)ssdt + i) = 0x5f42535f; |
| 711 | } |
| 712 | /* Recalculate checksum */ |
| 713 | ssdt->checksum = 0; |
| 714 | ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length); |
| 715 | } |
| 716 | |
Furquan Shaikh | 0f007d8 | 2020-04-24 06:41:18 -0700 | [diff] [blame] | 717 | static unsigned long agesa_write_acpi_tables(const struct device *device, |
Alexander Couzens | 83fc32f | 2015-04-12 22:28:37 +0200 | [diff] [blame] | 718 | unsigned long current, |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 719 | acpi_rsdp_t *rsdp) |
| 720 | { |
| 721 | acpi_srat_t *srat; |
| 722 | acpi_slit_t *slit; |
| 723 | acpi_header_t *ssdt; |
| 724 | acpi_header_t *alib; |
| 725 | acpi_hest_t *hest; |
| 726 | |
| 727 | /* HEST */ |
| 728 | current = ALIGN(current, 8); |
| 729 | hest = (acpi_hest_t *)current; |
Vladimir Serbinenko | 807127f | 2014-11-09 13:36:18 +0100 | [diff] [blame] | 730 | acpi_write_hest((void *)current, acpi_fill_hest); |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 731 | acpi_add_table(rsdp, (void *)current); |
| 732 | current += ((acpi_header_t *)current)->length; |
| 733 | |
| 734 | /* SRAT */ |
| 735 | current = ALIGN(current, 8); |
| 736 | printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); |
| 737 | srat = (acpi_srat_t *) agesawrapper_getlateinitptr (PICK_SRAT); |
| 738 | if (srat != NULL) { |
| 739 | memcpy((void *)current, srat, srat->header.length); |
| 740 | srat = (acpi_srat_t *) current; |
| 741 | current += srat->header.length; |
| 742 | acpi_add_table(rsdp, srat); |
| 743 | } |
| 744 | else { |
| 745 | printk(BIOS_DEBUG, " AGESA SRAT table NULL. Skipping.\n"); |
| 746 | } |
| 747 | |
| 748 | /* SLIT */ |
| 749 | current = ALIGN(current, 8); |
| 750 | printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); |
| 751 | slit = (acpi_slit_t *) agesawrapper_getlateinitptr (PICK_SLIT); |
| 752 | if (slit != NULL) { |
| 753 | memcpy((void *)current, slit, slit->header.length); |
| 754 | slit = (acpi_slit_t *) current; |
| 755 | current += slit->header.length; |
| 756 | acpi_add_table(rsdp, slit); |
| 757 | } |
| 758 | else { |
| 759 | printk(BIOS_DEBUG, " AGESA SLIT table NULL. Skipping.\n"); |
| 760 | } |
| 761 | |
| 762 | /* SSDT */ |
| 763 | current = ALIGN(current, 16); |
| 764 | printk(BIOS_DEBUG, "ACPI: * AGESA ALIB SSDT at %lx\n", current); |
| 765 | alib = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_ALIB); |
| 766 | if (alib != NULL) { |
| 767 | memcpy((void *)current, alib, alib->length); |
| 768 | alib = (acpi_header_t *) current; |
| 769 | current += alib->length; |
| 770 | acpi_add_table(rsdp, (void *)alib); |
| 771 | } else { |
| 772 | printk(BIOS_DEBUG, " AGESA ALIB SSDT table NULL. Skipping.\n"); |
| 773 | } |
| 774 | |
| 775 | /* The DSDT needs additional work for the AGESA SSDT Pstate table */ |
| 776 | /* Keep the comment for a while. */ |
| 777 | current = ALIGN(current, 16); |
| 778 | printk(BIOS_DEBUG, "ACPI: * AGESA SSDT Pstate at %lx\n", current); |
| 779 | ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE); |
| 780 | if (ssdt != NULL) { |
Michał Żygowski | 9550e97 | 2020-03-20 13:56:46 +0100 | [diff] [blame] | 781 | hexdump(ssdt, ssdt->length); |
| 782 | patch_ssdt_processor_scope(ssdt); |
| 783 | hexdump(ssdt, ssdt->length); |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 784 | memcpy((void *)current, ssdt, ssdt->length); |
| 785 | ssdt = (acpi_header_t *) current; |
| 786 | current += ssdt->length; |
| 787 | acpi_add_table(rsdp,ssdt); |
| 788 | } else { |
| 789 | printk(BIOS_DEBUG, " AGESA SSDT Pstate table NULL. Skipping.\n"); |
| 790 | } |
| 791 | |
| 792 | return current; |
| 793 | } |
| 794 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 795 | static struct device_operations northbridge_operations = { |
Marc Jones | 8a49ac7 | 2013-01-16 17:02:20 -0700 | [diff] [blame] | 796 | .read_resources = nb_read_resources, |
| 797 | .set_resources = nb_set_resources, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 798 | .enable_resources = pci_dev_enable_resources, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 799 | .acpi_fill_ssdt = northbridge_fill_ssdt_generator, |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 800 | .write_acpi_tables = agesa_write_acpi_tables, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 801 | .init = northbridge_init, |
| 802 | .enable = 0,.ops_pci = 0, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 803 | }; |
| 804 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 805 | static const struct pci_driver northbridge_driver __pci_driver = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 806 | .ops = &northbridge_operations, |
| 807 | .vendor = PCI_VENDOR_ID_AMD, |
| 808 | .device = 0x1510, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 809 | }; |
| 810 | |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 811 | struct chip_operations northbridge_amd_agesa_family14_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 812 | CHIP_NAME("AMD Family 14h Northbridge") |
| 813 | .enable_dev = 0, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 814 | }; |
| 815 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 816 | /* Root Complex Structures */ |
| 817 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 818 | static struct device_operations pci_domain_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 819 | .read_resources = domain_read_resources, |
| 820 | .set_resources = domain_set_resources, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 821 | .scan_bus = pci_domain_scan_bus, |
Tobias Diedrich | d8a2c1f | 2017-02-20 02:46:19 +0100 | [diff] [blame] | 822 | .acpi_name = domain_acpi_name, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 823 | }; |
| 824 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 825 | static struct device_operations cpu_bus_ops = { |
Nico Huber | 2f8ba69 | 2020-04-05 14:05:24 +0200 | [diff] [blame] | 826 | .read_resources = noop_read_resources, |
| 827 | .set_resources = noop_set_resources, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 828 | .init = cpu_bus_init, |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 829 | .scan_bus = cpu_bus_scan, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 830 | }; |
| 831 | |
Kyösti Mälkki | 87213b6 | 2012-08-27 20:00:33 +0300 | [diff] [blame] | 832 | static void root_complex_enable_dev(struct device *dev) |
| 833 | { |
| 834 | static int done = 0; |
| 835 | |
Kyösti Mälkki | 87213b6 | 2012-08-27 20:00:33 +0300 | [diff] [blame] | 836 | if (!done) { |
| 837 | setup_bsp_ramtop(); |
Kyösti Mälkki | 87213b6 | 2012-08-27 20:00:33 +0300 | [diff] [blame] | 838 | done = 1; |
| 839 | } |
| 840 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 841 | /* Set the operations if it is a special bus type */ |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 842 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 843 | dev->ops = &pci_domain_ops; |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 844 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 845 | dev->ops = &cpu_bus_ops; |
| 846 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 847 | } |
| 848 | |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 849 | struct chip_operations northbridge_amd_agesa_family14_root_complex_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 850 | CHIP_NAME("AMD Family 14h Root Complex") |
| 851 | .enable_dev = root_complex_enable_dev, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 852 | }; |
Kyösti Mälkki | 2b218e3 | 2019-01-15 11:14:28 +0200 | [diff] [blame] | 853 | |
| 854 | /******************************************************************** |
| 855 | * Change the vendor / device IDs to match the generic VBIOS header. |
| 856 | ********************************************************************/ |
| 857 | u32 map_oprom_vendev(u32 vendev) |
| 858 | { |
| 859 | u32 new_vendev = vendev; |
| 860 | |
| 861 | switch (vendev) { |
| 862 | case 0x10029809: |
| 863 | case 0x10029808: |
| 864 | case 0x10029807: |
| 865 | case 0x10029806: |
| 866 | case 0x10029805: |
| 867 | case 0x10029804: |
| 868 | case 0x10029803: |
| 869 | new_vendev = 0x10029802; |
| 870 | break; |
| 871 | } |
| 872 | |
| 873 | return new_vendev; |
| 874 | } |