Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <arch/io.h> |
| 22 | #include <stdint.h> |
| 23 | #include <device/device.h> |
| 24 | #include <device/pci.h> |
| 25 | #include <device/pci_ids.h> |
| 26 | #include <device/hypertransport.h> |
| 27 | #include <stdlib.h> |
| 28 | #include <string.h> |
Ronald G. Minnich | 5079a0d | 2012-11-27 11:32:38 -0800 | [diff] [blame] | 29 | #include <lib.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 30 | #include <cpu/cpu.h> |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 31 | #include <cbmem.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 32 | |
| 33 | #include <cpu/x86/lapic.h> |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 34 | #include <cpu/amd/mtrr.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 35 | |
efdesign98 | 3f5ebd6 | 2011-09-14 13:47:17 -0600 | [diff] [blame] | 36 | #include "agesawrapper.h" |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 37 | #include "northbridge.h" |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 38 | #if CONFIG_AMD_SB_CIMX |
| 39 | #include <sb_cimx.h> |
| 40 | #endif |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 41 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 42 | //#define FX_DEVS NODE_NUMS |
| 43 | #define FX_DEVS 1 |
| 44 | |
| 45 | static device_t __f0_dev[FX_DEVS]; |
| 46 | static device_t __f1_dev[FX_DEVS]; |
| 47 | static device_t __f2_dev[FX_DEVS]; |
| 48 | static device_t __f4_dev[FX_DEVS]; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 49 | static unsigned fx_devs = 0; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 50 | |
| 51 | device_t get_node_pci(u32 nodeid, u32 fn) |
| 52 | { |
zbao | 49bb26a4 | 2012-08-03 15:44:42 +0800 | [diff] [blame] | 53 | if ((CONFIG_CDB + nodeid) < 32) { |
| 54 | return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn)); |
| 55 | } else { |
| 56 | return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn)); |
| 57 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 58 | } |
| 59 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 60 | static void get_fx_devs(void) |
| 61 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 62 | int i; |
| 63 | for (i = 0; i < FX_DEVS; i++) { |
| 64 | __f0_dev[i] = get_node_pci(i, 0); |
| 65 | __f1_dev[i] = get_node_pci(i, 1); |
| 66 | __f2_dev[i] = get_node_pci(i, 2); |
| 67 | __f4_dev[i] = get_node_pci(i, 4); |
| 68 | if (__f0_dev[i] != NULL && __f1_dev[i] != NULL) |
| 69 | fx_devs = i + 1; |
| 70 | } |
| 71 | if (__f1_dev[0] == NULL || __f0_dev[0] == NULL || fx_devs == 0) { |
| 72 | die("Cannot find 0:0x18.[0|1]\n"); |
| 73 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 74 | } |
| 75 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 76 | static u32 f1_read_config32(unsigned reg) |
| 77 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 78 | if (fx_devs == 0) |
| 79 | get_fx_devs(); |
| 80 | return pci_read_config32(__f1_dev[0], reg); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 81 | } |
| 82 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 83 | static void f1_write_config32(unsigned reg, u32 value) |
| 84 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 85 | int i; |
| 86 | if (fx_devs == 0) |
| 87 | get_fx_devs(); |
| 88 | for (i = 0; i < fx_devs; i++) { |
| 89 | device_t dev; |
| 90 | dev = __f1_dev[i]; |
| 91 | if (dev && dev->enabled) { |
| 92 | pci_write_config32(dev, reg, value); |
| 93 | } |
| 94 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 95 | } |
| 96 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 97 | static u32 amdfam14_nodeid(device_t dev) |
| 98 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 99 | return (dev->path.pci.devfn >> 3) - CONFIG_CDB; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 100 | } |
| 101 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 102 | #include "amdfam14_conf.c" |
| 103 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 104 | static void northbridge_init(device_t dev) |
| 105 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 106 | printk(BIOS_DEBUG, "Northbridge init\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 107 | } |
| 108 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 109 | static void set_vga_enable_reg(u32 nodeid, u32 linkn) |
| 110 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 111 | u32 val; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 112 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 113 | val = 1 | (nodeid << 4) | (linkn << 12); |
| 114 | /* it will routing (1)mmio 0xa0000:0xbffff (2) io 0x3b0:0x3bb, |
| 115 | 0x3c0:0x3df */ |
| 116 | f1_write_config32(0xf4, val); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 117 | |
| 118 | } |
| 119 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 120 | static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 121 | unsigned goal_link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 122 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 123 | struct resource *res; |
| 124 | unsigned nodeid, link = 0; |
| 125 | int result; |
| 126 | res = 0; |
| 127 | for (nodeid = 0; !res && (nodeid < fx_devs); nodeid++) { |
| 128 | device_t dev; |
| 129 | dev = __f0_dev[nodeid]; |
| 130 | if (!dev) |
| 131 | continue; |
| 132 | for (link = 0; !res && (link < 8); link++) { |
| 133 | res = probe_resource(dev, IOINDEX(0x1000 + reg, link)); |
| 134 | } |
| 135 | } |
| 136 | result = 2; |
| 137 | if (res) { |
| 138 | result = 0; |
| 139 | if ((goal_link == (link - 1)) && |
| 140 | (goal_nodeid == (nodeid - 1)) && (res->flags <= 1)) { |
| 141 | result = 1; |
| 142 | } |
| 143 | } |
| 144 | return result; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 145 | } |
| 146 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 147 | static struct resource *amdfam14_find_iopair(device_t dev, unsigned nodeid, |
| 148 | unsigned link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 149 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 150 | struct resource *resource; |
| 151 | u32 result, reg; |
| 152 | resource = 0; |
| 153 | reg = 0; |
| 154 | result = reg_useable(0xc0, dev, nodeid, link); |
| 155 | if (result >= 1) { |
| 156 | /* I have been allocated this one */ |
| 157 | reg = 0xc0; |
| 158 | } |
| 159 | /* Ext conf space */ |
| 160 | if (!reg) { |
| 161 | /* Because of Extend conf space, we will never run out of reg, |
| 162 | * but we need one index to differ them. So ,same node and same |
| 163 | * link can have multi range |
| 164 | */ |
| 165 | u32 index = get_io_addr_index(nodeid, link); |
| 166 | reg = 0x110 + (index << 24) + (4 << 20); // index could be 0, 255 |
| 167 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 168 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 169 | resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 170 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 171 | return resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 172 | } |
| 173 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 174 | static struct resource *amdfam14_find_mempair(device_t dev, u32 nodeid, |
| 175 | u32 link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 176 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 177 | struct resource *resource; |
| 178 | u32 free_reg, reg; |
| 179 | resource = 0; |
| 180 | free_reg = 0; |
| 181 | for (reg = 0x80; reg <= 0xb8; reg += 0x8) { |
| 182 | int result; |
| 183 | result = reg_useable(reg, dev, nodeid, link); |
| 184 | if (result == 1) { |
| 185 | /* I have been allocated this one */ |
| 186 | break; |
| 187 | } else if (result > 1) { |
| 188 | /* I have a free register pair */ |
| 189 | free_reg = reg; |
| 190 | } |
| 191 | } |
| 192 | if (reg > 0xb8) { |
| 193 | reg = free_reg; |
| 194 | } |
| 195 | /* Ext conf space */ |
| 196 | if (!reg) { |
| 197 | /* Because of Extend conf space, we will never run out of reg, |
| 198 | * but we need one index to differ them. So ,same node and same |
| 199 | * link can have multi range |
| 200 | */ |
| 201 | u32 index = get_mmio_addr_index(nodeid, link); |
| 202 | reg = 0x110 + (index << 24) + (6 << 20); // index could be 0, 63 |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 203 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 204 | } |
| 205 | resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); |
| 206 | return resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 207 | } |
| 208 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 209 | static void amdfam14_link_read_bases(device_t dev, u32 nodeid, u32 link) |
| 210 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 211 | struct resource *resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 212 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 213 | /* Initialize the io space constraints on the current bus */ |
| 214 | resource = amdfam14_find_iopair(dev, nodeid, link); |
| 215 | if (resource) { |
| 216 | u32 align; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 217 | #if CONFIG_EXT_CONF_SUPPORT |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 218 | if ((resource->index & 0x1fff) == 0x1110) { // ext |
| 219 | align = 8; |
| 220 | } else |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 221 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 222 | align = log2(HT_IO_HOST_ALIGN); |
| 223 | resource->base = 0; |
| 224 | resource->size = 0; |
| 225 | resource->align = align; |
| 226 | resource->gran = align; |
| 227 | resource->limit = 0xffffUL; |
| 228 | resource->flags = IORESOURCE_IO | IORESOURCE_BRIDGE; |
| 229 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 230 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 231 | /* Initialize the prefetchable memory constraints on the current bus */ |
| 232 | resource = amdfam14_find_mempair(dev, nodeid, link); |
| 233 | if (resource) { |
| 234 | resource->base = 0; |
| 235 | resource->size = 0; |
| 236 | resource->align = log2(HT_MEM_HOST_ALIGN); |
| 237 | resource->gran = log2(HT_MEM_HOST_ALIGN); |
| 238 | resource->limit = 0xffffffffffULL; |
| 239 | resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
| 240 | resource->flags |= IORESOURCE_BRIDGE; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 241 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 242 | #if CONFIG_EXT_CONF_SUPPORT |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 243 | if ((resource->index & 0x1fff) == 0x1110) { // ext |
| 244 | normalize_resource(resource); |
| 245 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 246 | #endif |
| 247 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 248 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 249 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 250 | /* Initialize the memory constraints on the current bus */ |
| 251 | resource = amdfam14_find_mempair(dev, nodeid, link); |
| 252 | if (resource) { |
| 253 | resource->base = 0; |
| 254 | resource->size = 0; |
| 255 | resource->align = log2(HT_MEM_HOST_ALIGN); |
| 256 | resource->gran = log2(HT_MEM_HOST_ALIGN); |
| 257 | resource->limit = 0xffffffffffULL; |
| 258 | resource->flags = IORESOURCE_MEM | IORESOURCE_BRIDGE; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 259 | #if CONFIG_EXT_CONF_SUPPORT |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 260 | if ((resource->index & 0x1fff) == 0x1110) { // ext |
| 261 | normalize_resource(resource); |
| 262 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 263 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 264 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 265 | } |
| 266 | |
| 267 | static u32 my_find_pci_tolm(struct bus *bus, u32 tolm) |
| 268 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 269 | struct resource *min; |
| 270 | min = 0; |
| 271 | search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, |
| 272 | &min); |
| 273 | if (min && tolm > min->base) { |
| 274 | tolm = min->base; |
| 275 | } |
| 276 | return tolm; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
| 280 | |
| 281 | struct hw_mem_hole_info { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 282 | unsigned hole_startk; |
| 283 | int node_id; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 284 | }; |
| 285 | |
| 286 | static struct hw_mem_hole_info get_hw_mem_hole_info(void) |
| 287 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 288 | struct hw_mem_hole_info mem_hole; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 289 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 290 | mem_hole.hole_startk = CONFIG_HW_MEM_HOLE_SIZEK; |
| 291 | mem_hole.node_id = -1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 292 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 293 | struct dram_base_mask_t d; |
| 294 | u32 hole; |
| 295 | d = get_dram_base_mask(0); |
| 296 | if (d.mask & 1) { |
| 297 | hole = pci_read_config32(__f1_dev[0], 0xf0); |
| 298 | if (hole & 1) { // we find the hole |
| 299 | mem_hole.hole_startk = (hole & (0xff << 24)) >> 10; |
| 300 | mem_hole.node_id = 0; // record the node No with hole |
| 301 | } |
| 302 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 303 | #if 0 |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 304 | /* We need to double check if there is speical set on base reg and limit reg |
| 305 | * are not continous instead of hole, it will find out it's hole_startk |
| 306 | */ |
| 307 | if (mem_hole.node_id == -1) { |
| 308 | resource_t limitk_pri = 0; |
| 309 | struct dram_base_mask_t d; |
| 310 | resource_t base_k, limit_k; |
| 311 | d = get_dram_base_mask(0); |
| 312 | if (d.base & 1) { |
| 313 | base_k = ((resource_t) (d.base & 0x1fffff00)) << 9; |
| 314 | if (base_k <= 4 * 1024 * 1024) { |
| 315 | if (limitk_pri != base_k) { // we find the hole |
| 316 | mem_hole.hole_startk = (unsigned)limitk_pri; // must be below 4G |
| 317 | mem_hole.node_id = 0; |
| 318 | } |
| 319 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 320 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 321 | limit_k = |
| 322 | ((resource_t) ((d.mask + 0x00000100) & 0x1fffff00)) |
| 323 | << 9; |
| 324 | limitk_pri = limit_k; |
| 325 | } |
| 326 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 327 | #endif |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 328 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 329 | return mem_hole; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 330 | } |
| 331 | #endif |
| 332 | |
Marc Jones | 8a49ac7 | 2013-01-16 17:02:20 -0700 | [diff] [blame] | 333 | static void nb_read_resources(device_t dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 334 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 335 | u32 nodeid; |
| 336 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 337 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 338 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 339 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 340 | nodeid = amdfam14_nodeid(dev); |
| 341 | for (link = dev->link_list; link; link = link->next) { |
| 342 | if (link->children) { |
| 343 | amdfam14_link_read_bases(dev, nodeid, link->link_num); |
| 344 | } |
| 345 | } |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 346 | |
| 347 | /* |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame^] | 348 | * This MMCONF resource must be reserved in the PCI domain. |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 349 | * It is not honored by the coreboot resource allocator if it is in |
| 350 | * the APIC_CLUSTER. |
| 351 | */ |
| 352 | #if CONFIG_MMCONF_SUPPORT |
| 353 | struct resource *resource = new_resource(dev, 0xc0010058); |
| 354 | resource->base = CONFIG_MMCONF_BASE_ADDRESS; |
| 355 | resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; |
| 356 | resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | |
| 357 | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
| 358 | #endif |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 359 | } |
| 360 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 361 | static void set_resource(device_t dev, struct resource *resource, u32 nodeid) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 362 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 363 | resource_t rbase, rend; |
| 364 | unsigned reg, link_num; |
| 365 | char buf[50]; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 366 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 367 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 368 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 369 | /* Make certain the resource has actually been set */ |
| 370 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
| 371 | return; |
| 372 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 373 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 374 | /* If I have already stored this resource don't worry about it */ |
| 375 | if (resource->flags & IORESOURCE_STORED) { |
| 376 | return; |
| 377 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 378 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 379 | /* Only handle PCI memory and IO resources */ |
| 380 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
| 381 | return; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 382 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 383 | /* Ensure I am actually looking at a resource of function 1 */ |
| 384 | if ((resource->index & 0xffff) < 0x1000) { |
| 385 | return; |
| 386 | } |
| 387 | /* Get the base address */ |
| 388 | rbase = resource->base; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 389 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 390 | /* Get the limit (rounded up) */ |
| 391 | rend = resource_end(resource); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 392 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 393 | /* Get the register and link */ |
| 394 | reg = resource->index & 0xfff; // 4k |
| 395 | link_num = IOINDEX_LINK(resource->index); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 396 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 397 | if (resource->flags & IORESOURCE_IO) { |
| 398 | set_io_addr_reg(dev, nodeid, link_num, reg, rbase >> 8, |
| 399 | rend >> 8); |
| 400 | } else if (resource->flags & IORESOURCE_MEM) { |
| 401 | set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >> 24), |
| 402 | rbase >> 8, rend >> 8, 1); // [39:8] |
| 403 | } |
| 404 | resource->flags |= IORESOURCE_STORED; |
| 405 | sprintf(buf, " <node %x link %x>", nodeid, link_num); |
| 406 | report_resource_stored(dev, resource, buf); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 407 | } |
| 408 | |
efdesign98 | 3f5ebd6 | 2011-09-14 13:47:17 -0600 | [diff] [blame] | 409 | #if CONFIG_CONSOLE_VGA_MULTI |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 410 | extern device_t vga_pri; // the primary vga device, defined in device.c |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 411 | #endif |
| 412 | |
| 413 | static void create_vga_resource(device_t dev, unsigned nodeid) |
| 414 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 415 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 416 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 417 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 418 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 419 | /* find out which link the VGA card is connected, |
| 420 | * we only deal with the 'first' vga card */ |
| 421 | for (link = dev->link_list; link; link = link->next) { |
| 422 | if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) { |
efdesign98 | 3f5ebd6 | 2011-09-14 13:47:17 -0600 | [diff] [blame] | 423 | #if CONFIG_CONSOLE_VGA_MULTI |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 424 | printk(BIOS_DEBUG, |
| 425 | "VGA: vga_pri bus num = %d bus range [%d,%d]\n", |
| 426 | vga_pri->bus->secondary, link->secondary, |
| 427 | link->subordinate); |
| 428 | /* We need to make sure the vga_pri is under the link */ |
| 429 | if ((vga_pri->bus->secondary >= link->secondary) && |
| 430 | (vga_pri->bus->secondary <= link->subordinate)) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 431 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 432 | break; |
| 433 | } |
| 434 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 435 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 436 | /* no VGA card installed */ |
| 437 | if (link == NULL) |
| 438 | return; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 439 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 440 | printk(BIOS_DEBUG, "VGA: %s (aka node %d) link %d has VGA device\n", |
| 441 | dev_path(dev), nodeid, link->link_num); |
| 442 | set_vga_enable_reg(nodeid, link->link_num); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 443 | } |
| 444 | |
Marc Jones | 8a49ac7 | 2013-01-16 17:02:20 -0700 | [diff] [blame] | 445 | static void nb_set_resources(device_t dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 446 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 447 | unsigned nodeid; |
| 448 | struct bus *bus; |
| 449 | struct resource *res; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 450 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 451 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 452 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 453 | /* Find the nodeid */ |
| 454 | nodeid = amdfam14_nodeid(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 455 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 456 | create_vga_resource(dev, nodeid); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 457 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 458 | /* Set each resource we have found */ |
| 459 | for (res = dev->resource_list; res; res = res->next) { |
| 460 | set_resource(dev, res, nodeid); |
| 461 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 462 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 463 | for (bus = dev->link_list; bus; bus = bus->next) { |
| 464 | if (bus->children) { |
| 465 | assign_resources(bus); |
| 466 | } |
| 467 | } |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 468 | |
| 469 | /* Print the MMCONF region if it has been reserved. */ |
| 470 | res = find_resource(dev, 0xc0010058); |
| 471 | if (res) { |
| 472 | report_resource_stored(dev, res, " <mmconfig>"); |
| 473 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 474 | } |
| 475 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 476 | /* Domain/Root Complex related code */ |
| 477 | |
| 478 | static void domain_read_resources(device_t dev) |
| 479 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 480 | unsigned reg; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 481 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 482 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 483 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 484 | /* Find the already assigned resource pairs */ |
| 485 | get_fx_devs(); |
| 486 | for (reg = 0x80; reg <= 0xc0; reg += 0x08) { |
| 487 | u32 base, limit; |
| 488 | base = f1_read_config32(reg); |
| 489 | limit = f1_read_config32(reg + 0x04); |
| 490 | /* Is this register allocated? */ |
| 491 | if ((base & 3) != 0) { |
| 492 | unsigned nodeid, reg_link; |
| 493 | device_t reg_dev; |
| 494 | if (reg < 0xc0) { // mmio |
| 495 | nodeid = (limit & 0xf) + (base & 0x30); |
| 496 | } else { // io |
| 497 | nodeid = (limit & 0xf) + ((base >> 4) & 0x30); |
| 498 | } |
| 499 | reg_link = (limit >> 4) & 7; |
| 500 | reg_dev = __f0_dev[nodeid]; |
| 501 | if (reg_dev) { |
| 502 | /* Reserve the resource */ |
| 503 | struct resource *res; |
| 504 | res = |
| 505 | new_resource(reg_dev, |
| 506 | IOINDEX(0x1000 + reg, |
| 507 | reg_link)); |
| 508 | if (res) { |
| 509 | res->flags = 1; |
| 510 | } |
| 511 | } |
| 512 | } |
| 513 | } |
| 514 | /* FIXME: do we need to check extend conf space? |
| 515 | I don't believe that much preset value */ |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 516 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 517 | #if !CONFIG_PCI_64BIT_PREF_MEM |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 518 | pci_domain_read_resources(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 519 | #else |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 520 | struct bus *link; |
| 521 | struct resource *resource; |
| 522 | for (link = dev->link_list; link; link = link->next) { |
| 523 | /* Initialize the system wide io space constraints */ |
| 524 | resource = new_resource(dev, 0 | (link->link_num << 2)); |
| 525 | resource->base = 0x400; |
| 526 | resource->limit = 0xffffUL; |
| 527 | resource->flags = IORESOURCE_IO; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 528 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 529 | /* Initialize the system wide prefetchable memory resources constraints */ |
| 530 | resource = new_resource(dev, 1 | (link->link_num << 2)); |
| 531 | resource->limit = 0xfcffffffffULL; |
| 532 | resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 533 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 534 | /* Initialize the system wide memory resources constraints */ |
| 535 | resource = new_resource(dev, 2 | (link->link_num << 2)); |
| 536 | resource->limit = 0xfcffffffffULL; |
| 537 | resource->flags = IORESOURCE_MEM; |
| 538 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 539 | #endif |
| 540 | } |
| 541 | |
Kyösti Mälkki | 6b5eb1c | 2012-07-19 19:26:43 +0300 | [diff] [blame] | 542 | static void setup_uma_memory(void) |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 543 | { |
| 544 | #if CONFIG_GFXUMA |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame] | 545 | uint32_t topmem = (uint32_t) bsp_topmem(); |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 546 | uint32_t sys_mem; |
| 547 | |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 548 | /* refer to UMA Size Consideration in Family14h BKDG. */ |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame] | 549 | sys_mem = topmem + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON() |
| 550 | if ((bsp_topmem2()>>32) || (sys_mem >= 0x80000000)) { |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 551 | uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */ |
| 552 | } |
| 553 | else { |
| 554 | if (sys_mem >= 0x40000000) { |
| 555 | uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */ |
| 556 | } else { |
| 557 | uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */ |
| 558 | } |
| 559 | } |
| 560 | |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame] | 561 | uma_memory_base = topmem - uma_memory_size; /* TOP_MEM1 */ |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 562 | printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", |
| 563 | __func__, uma_memory_size, uma_memory_base); |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 564 | #endif |
| 565 | } |
| 566 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 567 | static void domain_set_resources(device_t dev) |
| 568 | { |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 569 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 570 | printk(BIOS_DEBUG, " amsr - incoming dev = %08x\n", (u32) dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 571 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 572 | #if CONFIG_PCI_64BIT_PREF_MEM |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 573 | struct resource *io, *mem1, *mem2; |
| 574 | struct resource *res; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 575 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 576 | unsigned long mmio_basek; |
| 577 | u32 pci_tolm; |
| 578 | int idx; |
| 579 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 580 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 581 | struct hw_mem_hole_info mem_hole; |
| 582 | u32 reset_memhole = 1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 583 | #endif |
| 584 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 585 | #if CONFIG_PCI_64BIT_PREF_MEM |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 586 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 587 | printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n"); |
| 588 | for (link = dev->link_list; link; link = link->next) { |
| 589 | /* Now reallocate the pci resources memory with the |
| 590 | * highest addresses I can manage. |
| 591 | */ |
| 592 | mem1 = find_resource(dev, 1 | (link->link_num << 2)); |
| 593 | mem2 = find_resource(dev, 2 | (link->link_num << 2)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 594 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 595 | printk(BIOS_DEBUG, |
| 596 | "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", |
| 597 | (u32) (mem1->base), (u32) (mem1->limit), |
| 598 | (u32) (mem1->size), u32) (mem1->align)); |
| 599 | printk(BIOS_DEBUG, |
| 600 | "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", |
| 601 | (u32) (mem2->base), (u32) (mem2->limit), |
| 602 | (u32) (mem2->size), (u32) (mem2->align)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 603 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 604 | /* See if both resources have roughly the same limits */ |
| 605 | if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) |
| 606 | || ((mem1->limit > 0xffffffff) |
| 607 | && (mem2->limit > 0xffffffff))) { |
| 608 | /* If so place the one with the most stringent alignment first |
| 609 | */ |
| 610 | if (mem2->align > mem1->align) { |
| 611 | struct resource *tmp; |
| 612 | tmp = mem1; |
| 613 | mem1 = mem2; |
| 614 | mem2 = tmp; |
| 615 | } |
| 616 | /* Now place the memory as high up as it will go */ |
| 617 | mem2->base = resource_max(mem2); |
| 618 | mem1->limit = mem2->base - 1; |
| 619 | mem1->base = resource_max(mem1); |
| 620 | } else { |
| 621 | /* Place the resources as high up as they will go */ |
| 622 | mem2->base = resource_max(mem2); |
| 623 | mem1->base = resource_max(mem1); |
| 624 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 625 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 626 | printk(BIOS_DEBUG, |
| 627 | "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", |
| 628 | mem1->base, mem1->limit, mem1->size, mem1->align); |
| 629 | printk(BIOS_DEBUG, |
| 630 | "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", |
| 631 | mem2->base, mem2->limit, mem2->size, mem2->align); |
| 632 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 633 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 634 | for (res = &dev->resource_list; res; res = res->next) { |
| 635 | res->flags |= IORESOURCE_ASSIGNED; |
| 636 | res->flags |= IORESOURCE_STORED; |
| 637 | report_resource_stored(dev, res, ""); |
| 638 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 639 | #endif |
| 640 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 641 | pci_tolm = 0xffffffffUL; |
| 642 | for (link = dev->link_list; link; link = link->next) { |
| 643 | pci_tolm = my_find_pci_tolm(link, pci_tolm); |
| 644 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 645 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 646 | // FIXME handle interleaved nodes. If you fix this here, please fix |
| 647 | // amdk8, too. |
| 648 | mmio_basek = pci_tolm >> 10; |
| 649 | /* Round mmio_basek to something the processor can support */ |
| 650 | mmio_basek &= ~((1 << 6) - 1); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 651 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 652 | // FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M |
| 653 | // MMIO hole. If you fix this here, please fix amdk8, too. |
| 654 | /* Round the mmio hole to 64M */ |
| 655 | mmio_basek &= ~((64 * 1024) - 1); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 656 | |
| 657 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
| 658 | /* if the hw mem hole is already set in raminit stage, here we will compare |
| 659 | * mmio_basek and hole_basek. if mmio_basek is bigger that hole_basek and will |
| 660 | * use hole_basek as mmio_basek and we don't need to reset hole. |
| 661 | * otherwise We reset the hole to the mmio_basek |
| 662 | */ |
| 663 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 664 | mem_hole = get_hw_mem_hole_info(); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 665 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 666 | // Use hole_basek as mmio_basek, and we don't need to reset hole anymore |
| 667 | if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { |
| 668 | mmio_basek = mem_hole.hole_startk; |
| 669 | reset_memhole = 0; |
| 670 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 671 | #endif |
| 672 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 673 | idx = 0x10; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 674 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 675 | struct dram_base_mask_t d; |
| 676 | resource_t basek, limitk, sizek; // 4 1T |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 677 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 678 | d = get_dram_base_mask(0); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 679 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 680 | if (d.mask & 1) { |
| 681 | basek = ((resource_t) ((u64) d.base)) << 8; |
| 682 | limitk = (resource_t) (((u64) d.mask << 8) | 0xFFFFFF); |
| 683 | printk(BIOS_DEBUG, |
| 684 | "adsr: (before) basek = %llx, limitk = %llx.\n", basek, |
| 685 | limitk); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 686 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 687 | /* Convert these values to multiples of 1K for ease of math. */ |
| 688 | basek >>= 10; |
| 689 | limitk >>= 10; |
| 690 | sizek = limitk - basek + 1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 691 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 692 | printk(BIOS_DEBUG, |
| 693 | "adsr: (after) basek = %llx, limitk = %llx, sizek = %llx.\n", |
| 694 | basek, limitk, sizek); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 695 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 696 | /* see if we need a hole from 0xa0000 to 0xbffff */ |
| 697 | if ((basek < 640) && (sizek > 768)) { |
| 698 | printk(BIOS_DEBUG,"adsr - 0xa0000 to 0xbffff resource.\n"); |
| 699 | ram_resource(dev, (idx | 0), basek, 640 - basek); |
| 700 | idx += 0x10; |
| 701 | basek = 768; |
| 702 | sizek = limitk - 768; |
| 703 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 704 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 705 | printk(BIOS_DEBUG, |
| 706 | "adsr: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", |
| 707 | mmio_basek, basek, limitk); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 708 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 709 | /* split the region to accomodate pci memory space */ |
| 710 | if ((basek < 4 * 1024 * 1024) && (limitk > mmio_basek)) { |
| 711 | if (basek <= mmio_basek) { |
| 712 | unsigned pre_sizek; |
| 713 | pre_sizek = mmio_basek - basek; |
| 714 | if (pre_sizek > 0) { |
| 715 | ram_resource(dev, idx, basek, |
| 716 | pre_sizek); |
| 717 | idx += 0x10; |
| 718 | sizek -= pre_sizek; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 719 | #if CONFIG_WRITE_HIGH_TABLES |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 720 | if (high_tables_base == 0) { |
| 721 | /* Leave some space for ACPI, PIRQ and MP tables */ |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 722 | #if CONFIG_GFXUMA |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 723 | high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 724 | #else |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 725 | high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 726 | #endif |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 727 | high_tables_size = HIGH_MEMORY_SIZE; |
| 728 | printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", |
| 729 | (u32)(high_tables_size / 1024), high_tables_base); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 730 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 731 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 732 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 733 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 734 | basek = mmio_basek; |
| 735 | } |
| 736 | if ((basek + sizek) <= 4 * 1024 * 1024) { |
| 737 | sizek = 0; |
| 738 | } else { |
| 739 | basek = 4 * 1024 * 1024; |
| 740 | sizek -= (4 * 1024 * 1024 - mmio_basek); |
| 741 | } |
| 742 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 743 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 744 | ram_resource(dev, (idx | 0), basek, sizek); |
| 745 | idx += 0x10; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 746 | #if CONFIG_WRITE_HIGH_TABLES |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 747 | printk(BIOS_DEBUG, |
| 748 | "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0, |
| 749 | mmio_basek, basek, limitk); |
| 750 | if (high_tables_base == 0) { |
| 751 | /* Leave some space for ACPI, PIRQ and MP tables */ |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 752 | #if CONFIG_GFXUMA |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 753 | high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 754 | printk(BIOS_DEBUG, " adsr - uma_memory_base = %llx.\n", uma_memory_base); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 755 | #else |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 756 | high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 757 | #endif |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 758 | high_tables_size = HIGH_MEMORY_SIZE; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 759 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 760 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 761 | } |
| 762 | printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek); |
| 763 | printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n", |
| 764 | high_tables_size); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 765 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 766 | #if CONFIG_GFXUMA |
Kyösti Mälkki | 63f8c08 | 2012-07-10 13:27:26 +0300 | [diff] [blame] | 767 | uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 768 | #endif |
| 769 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 770 | for (link = dev->link_list; link; link = link->next) { |
| 771 | if (link->children) { |
| 772 | assign_resources(link); |
| 773 | } |
| 774 | } |
| 775 | printk(BIOS_DEBUG, " adsr - leaving this lovely routine.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 776 | } |
| 777 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 778 | extern u8 acpi_slp_type; |
| 779 | |
| 780 | static void domain_enable_resources(device_t dev) |
| 781 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 782 | u32 val; |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 783 | |
| 784 | #if CONFIG_AMD_SB_CIMX |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 785 | #if CONFIG_HAVE_ACPI_RESUME |
| 786 | if (acpi_slp_type != 3) { |
| 787 | sb_After_Pci_Init(); |
| 788 | sb_Mid_Post_Init(); |
| 789 | } else { |
| 790 | sb_After_Pci_Restore_Init(); |
| 791 | } |
| 792 | #else |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 793 | sb_After_Pci_Init(); |
| 794 | sb_Mid_Post_Init(); |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 795 | #endif |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 796 | #endif |
| 797 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 798 | /* Must be called after PCI enumeration and resource allocation */ |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 799 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 800 | |
| 801 | #if CONFIG_HAVE_ACPI_RESUME |
| 802 | if (acpi_slp_type != 3) { |
| 803 | printk(BIOS_DEBUG, "agesawrapper_amdinitmid "); |
| 804 | val = agesawrapper_amdinitmid (); |
| 805 | if (val) |
| 806 | printk(BIOS_DEBUG, "error level: %x \n", val); |
| 807 | else |
| 808 | printk(BIOS_DEBUG, "passed.\n"); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 809 | } |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 810 | #else |
| 811 | printk(BIOS_DEBUG, "agesawrapper_amdinitmid "); |
| 812 | val = agesawrapper_amdinitmid (); |
| 813 | if (val) |
| 814 | printk(BIOS_DEBUG, "error level: %x \n", val); |
| 815 | else |
| 816 | printk(BIOS_DEBUG, "passed.\n"); |
| 817 | #endif |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 818 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 819 | printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 820 | } |
| 821 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 822 | /* Bus related code */ |
| 823 | |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 824 | static void cpu_bus_read_resources(device_t dev) |
| 825 | { |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 826 | } |
| 827 | |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 828 | static void cpu_bus_set_resources(device_t dev) |
| 829 | { |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 830 | } |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 831 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 832 | static u32 cpu_bus_scan(device_t dev, u32 max) |
| 833 | { |
Kyösti Mälkki | c33f1e9 | 2012-08-07 17:12:11 +0300 | [diff] [blame] | 834 | struct bus *cpu_bus = dev->link_list; |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 835 | device_t cpu; |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 836 | int apic_id, cores_found; |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 837 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 838 | /* There is only one node for fam14, but there may be multiple cores. */ |
| 839 | cpu = dev_find_slot(0, PCI_DEVFN(0x18, 0)); |
| 840 | if (!cpu) |
| 841 | printk(BIOS_ERR, "ERROR: %02x:%02x.0 not found", 0, 0x18); |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 842 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 843 | cores_found = (pci_read_config32(dev_find_slot(0,PCI_DEVFN(0x18,0x3)), 0xe8) >> 12) & 3; |
| 844 | printk(BIOS_DEBUG, " AP siblings=%d\n", cores_found); |
| 845 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 846 | for (apic_id = 0; apic_id <= cores_found; apic_id++) { |
Kyösti Mälkki | c33f1e9 | 2012-08-07 17:12:11 +0300 | [diff] [blame] | 847 | cpu = add_cpu_device(cpu_bus, apic_id, 1); |
| 848 | if (cpu) |
| 849 | amd_cpu_topology(cpu, 0, apic_id); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 850 | } |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 851 | return max; |
| 852 | } |
| 853 | |
| 854 | static void cpu_bus_init(device_t dev) |
| 855 | { |
| 856 | initialize_cpus(dev->link_list); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 857 | } |
| 858 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 859 | /* North Bridge Structures */ |
| 860 | |
| 861 | static struct device_operations northbridge_operations = { |
Marc Jones | 8a49ac7 | 2013-01-16 17:02:20 -0700 | [diff] [blame] | 862 | .read_resources = nb_read_resources, |
| 863 | .set_resources = nb_set_resources, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 864 | .enable_resources = pci_dev_enable_resources, |
| 865 | .init = northbridge_init, |
| 866 | .enable = 0,.ops_pci = 0, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 867 | }; |
| 868 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 869 | static const struct pci_driver northbridge_driver __pci_driver = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 870 | .ops = &northbridge_operations, |
| 871 | .vendor = PCI_VENDOR_ID_AMD, |
| 872 | .device = 0x1510, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 873 | }; |
| 874 | |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 875 | struct chip_operations northbridge_amd_agesa_family14_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 876 | CHIP_NAME("AMD Family 14h Northbridge") |
| 877 | .enable_dev = 0, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 878 | }; |
| 879 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 880 | /* Root Complex Structures */ |
| 881 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 882 | static struct device_operations pci_domain_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 883 | .read_resources = domain_read_resources, |
| 884 | .set_resources = domain_set_resources, |
| 885 | .enable_resources = domain_enable_resources, |
| 886 | .init = NULL, |
| 887 | .scan_bus = pci_domain_scan_bus, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 888 | }; |
| 889 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 890 | static struct device_operations cpu_bus_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 891 | .read_resources = cpu_bus_read_resources, |
| 892 | .set_resources = cpu_bus_set_resources, |
| 893 | .enable_resources = NULL, |
| 894 | .init = cpu_bus_init, |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 895 | .scan_bus = cpu_bus_scan, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 896 | }; |
| 897 | |
Kyösti Mälkki | 87213b6 | 2012-08-27 20:00:33 +0300 | [diff] [blame] | 898 | static void root_complex_enable_dev(struct device *dev) |
| 899 | { |
| 900 | static int done = 0; |
| 901 | |
| 902 | /* Do not delay UMA setup, as a device on the PCI bus may evaluate |
| 903 | the global uma_memory variables already in its enable function. */ |
| 904 | if (!done) { |
| 905 | setup_bsp_ramtop(); |
| 906 | setup_uma_memory(); |
| 907 | done = 1; |
| 908 | } |
| 909 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 910 | /* Set the operations if it is a special bus type */ |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame^] | 911 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 912 | dev->ops = &pci_domain_ops; |
| 913 | } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { |
| 914 | dev->ops = &cpu_bus_ops; |
| 915 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 916 | } |
| 917 | |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 918 | struct chip_operations northbridge_amd_agesa_family14_root_complex_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 919 | CHIP_NAME("AMD Family 14h Root Complex") |
| 920 | .enable_dev = root_complex_enable_dev, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 921 | }; |