Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 4 | * Copyright (C) 2008-2009 coresystems GmbH |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 5 | * |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <console/console.h> |
| 18 | #include <device/device.h> |
| 19 | #include <device/pci.h> |
| 20 | #include <device/pci_ids.h> |
| 21 | #include <pc80/mc146818rtc.h> |
| 22 | #include <pc80/isa-dma.h> |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 23 | #include <pc80/i8259.h> |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 24 | #include <arch/io.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 25 | #include <arch/ioapic.h> |
Stefan Reinauer | ab87254 | 2011-10-14 15:18:29 -0700 | [diff] [blame] | 26 | #include <arch/acpi.h> |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 27 | #include "i82801gx.h" |
Sven Schnelle | f4dc1a7 | 2011-06-05 11:33:41 +0200 | [diff] [blame] | 28 | #include <cpu/x86/smm.h> |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 29 | #include <arch/acpigen.h> |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 30 | #include <arch/smp/mpspec.h> |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 31 | #include <cbmem.h> |
| 32 | #include <string.h> |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 33 | #include <drivers/intel/gma/i915.h> |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 34 | #include <southbridge/intel/common/acpi_pirq_gen.h> |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 35 | #include "nvs.h" |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 36 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 37 | #define NMI_OFF 0 |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 38 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 39 | #define ENABLE_ACPI_MODE_IN_COREBOOT 0 |
| 40 | #define TEST_SMM_FLASH_LOCKDOWN 0 |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 41 | |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 42 | typedef struct southbridge_intel_i82801gx_config config_t; |
| 43 | |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 44 | /** |
Martin Roth | 2ed0aa2 | 2016-01-05 20:58:58 -0700 | [diff] [blame] | 45 | * Set miscellaneous static southbridge features. |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 46 | * |
| 47 | * @param dev PCI device with I/O APIC control registers |
| 48 | */ |
| 49 | static void i82801gx_enable_ioapic(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 50 | { |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 51 | /* Enable ACPI I/O range decode */ |
Kyösti Mälkki | 1cca340 | 2013-02-26 19:21:39 +0200 | [diff] [blame] | 52 | pci_write_config8(dev, ACPI_CNTL, ACPI_EN); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 53 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 54 | set_ioapic_id(VIO_APIC_VADDR, 0x02); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 55 | |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 56 | /* |
| 57 | * Select Boot Configuration register (0x03) and |
| 58 | * use Processor System Bus (0x01) to deliver interrupts. |
| 59 | */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 60 | io_apic_write(VIO_APIC_VADDR, 0x03, 0x01); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 61 | } |
| 62 | |
| 63 | static void i82801gx_enable_serial_irqs(struct device *dev) |
| 64 | { |
| 65 | /* Set packet length and toggle silent mode bit for one frame. */ |
| 66 | pci_write_config8(dev, SERIRQ_CNTL, |
| 67 | (1 << 7) | (1 << 6) | ((21 - 17) << 2) | (0 << 0)); |
| 68 | } |
| 69 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 70 | /* PIRQ[n]_ROUT[3:0] - PIRQ Routing Control |
| 71 | * 0x00 - 0000 = Reserved |
| 72 | * 0x01 - 0001 = Reserved |
| 73 | * 0x02 - 0010 = Reserved |
| 74 | * 0x03 - 0011 = IRQ3 |
| 75 | * 0x04 - 0100 = IRQ4 |
| 76 | * 0x05 - 0101 = IRQ5 |
| 77 | * 0x06 - 0110 = IRQ6 |
| 78 | * 0x07 - 0111 = IRQ7 |
| 79 | * 0x08 - 1000 = Reserved |
| 80 | * 0x09 - 1001 = IRQ9 |
| 81 | * 0x0A - 1010 = IRQ10 |
| 82 | * 0x0B - 1011 = IRQ11 |
| 83 | * 0x0C - 1100 = IRQ12 |
| 84 | * 0x0D - 1101 = Reserved |
| 85 | * 0x0E - 1110 = IRQ14 |
| 86 | * 0x0F - 1111 = IRQ15 |
| 87 | * PIRQ[n]_ROUT[7] - PIRQ Routing Control |
| 88 | * 0x80 - The PIRQ is not routed. |
| 89 | */ |
| 90 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 91 | static void i82801gx_pirq_init(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 92 | { |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 93 | struct device *irq_dev; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 94 | /* Get the chip configuration */ |
| 95 | config_t *config = dev->chip_info; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 96 | |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 97 | pci_write_config8(dev, PIRQA_ROUT, config->pirqa_routing); |
| 98 | pci_write_config8(dev, PIRQB_ROUT, config->pirqb_routing); |
| 99 | pci_write_config8(dev, PIRQC_ROUT, config->pirqc_routing); |
| 100 | pci_write_config8(dev, PIRQD_ROUT, config->pirqd_routing); |
| 101 | |
| 102 | pci_write_config8(dev, PIRQE_ROUT, config->pirqe_routing); |
| 103 | pci_write_config8(dev, PIRQF_ROUT, config->pirqf_routing); |
| 104 | pci_write_config8(dev, PIRQG_ROUT, config->pirqg_routing); |
| 105 | pci_write_config8(dev, PIRQH_ROUT, config->pirqh_routing); |
| 106 | |
| 107 | /* Eric Biederman once said we should let the OS do this. |
| 108 | * I am not so sure anymore he was right. |
| 109 | */ |
| 110 | |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 111 | for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 112 | u8 int_pin = 0, int_line = 0; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 113 | |
| 114 | if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) |
| 115 | continue; |
| 116 | |
| 117 | int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN); |
| 118 | |
| 119 | switch (int_pin) { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 120 | case 1: |
| 121 | /* INTA# */ int_line = config->pirqa_routing; break; |
| 122 | case 2: |
| 123 | /* INTB# */ int_line = config->pirqb_routing; break; |
| 124 | case 3: |
| 125 | /* INTC# */ int_line = config->pirqc_routing; break; |
| 126 | case 4: |
| 127 | /* INTD# */ int_line = config->pirqd_routing; break; |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 128 | } |
| 129 | |
| 130 | if (!int_line) |
| 131 | continue; |
| 132 | |
| 133 | pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line); |
| 134 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 135 | } |
| 136 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 137 | static void i82801gx_gpi_routing(struct device *dev) |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 138 | { |
| 139 | /* Get the chip configuration */ |
| 140 | config_t *config = dev->chip_info; |
| 141 | u32 reg32 = 0; |
| 142 | |
| 143 | /* An array would be much nicer here, or some |
| 144 | * other method of doing this. |
| 145 | */ |
| 146 | reg32 |= (config->gpi0_routing & 0x03) << 0; |
| 147 | reg32 |= (config->gpi1_routing & 0x03) << 2; |
| 148 | reg32 |= (config->gpi2_routing & 0x03) << 4; |
| 149 | reg32 |= (config->gpi3_routing & 0x03) << 6; |
| 150 | reg32 |= (config->gpi4_routing & 0x03) << 8; |
| 151 | reg32 |= (config->gpi5_routing & 0x03) << 10; |
| 152 | reg32 |= (config->gpi6_routing & 0x03) << 12; |
| 153 | reg32 |= (config->gpi7_routing & 0x03) << 14; |
| 154 | reg32 |= (config->gpi8_routing & 0x03) << 16; |
| 155 | reg32 |= (config->gpi9_routing & 0x03) << 18; |
| 156 | reg32 |= (config->gpi10_routing & 0x03) << 20; |
| 157 | reg32 |= (config->gpi11_routing & 0x03) << 22; |
| 158 | reg32 |= (config->gpi12_routing & 0x03) << 24; |
| 159 | reg32 |= (config->gpi13_routing & 0x03) << 26; |
| 160 | reg32 |= (config->gpi14_routing & 0x03) << 28; |
| 161 | reg32 |= (config->gpi15_routing & 0x03) << 30; |
| 162 | |
Kyösti Mälkki | b85a87b | 2014-12-29 11:32:27 +0200 | [diff] [blame] | 163 | pci_write_config32(dev, GPIO_ROUT, reg32); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 164 | } |
| 165 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 166 | static void i82801gx_power_options(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 167 | { |
| 168 | u8 reg8; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 169 | u16 reg16, pmbase; |
| 170 | u32 reg32; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 171 | const char *state; |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 172 | /* Get the chip configuration */ |
| 173 | config_t *config = dev->chip_info; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 174 | |
Nico Huber | 9faae2b | 2018-11-14 00:00:35 +0100 | [diff] [blame] | 175 | int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE; |
Luc Verhaegen | a9c5ea0 | 2009-06-03 14:19:33 +0000 | [diff] [blame] | 176 | int nmi_option; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 177 | |
| 178 | /* Which state do we want to goto after g3 (power restored)? |
| 179 | * 0 == S0 Full On |
| 180 | * 1 == S5 Soft Off |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 181 | * |
| 182 | * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 183 | */ |
Varad Gautam | 06ef046 | 2015-03-11 09:54:41 +0530 | [diff] [blame] | 184 | pwr_on = MAINBOARD_POWER_ON; |
| 185 | get_option(&pwr_on, "power_on_after_fail"); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 186 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 187 | reg8 = pci_read_config8(dev, GEN_PMCON_3); |
| 188 | reg8 &= 0xfe; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 189 | switch (pwr_on) { |
| 190 | case MAINBOARD_POWER_OFF: |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 191 | reg8 |= 1; |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 192 | state = "off"; |
| 193 | break; |
| 194 | case MAINBOARD_POWER_ON: |
| 195 | reg8 &= ~1; |
| 196 | state = "on"; |
| 197 | break; |
| 198 | case MAINBOARD_POWER_KEEP: |
| 199 | reg8 &= ~1; |
| 200 | state = "state keep"; |
| 201 | break; |
| 202 | default: |
| 203 | state = "undefined"; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 204 | } |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 205 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 206 | reg8 |= (3 << 4); /* avoid #S4 assertions */ |
Martin Roth | 2ed0aa2 | 2016-01-05 20:58:58 -0700 | [diff] [blame] | 207 | reg8 &= ~(1 << 3); /* minimum assertion is 1 to 2 RTCCLK */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 208 | |
| 209 | pci_write_config8(dev, GEN_PMCON_3, reg8); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 210 | printk(BIOS_INFO, "Set power %s after power failure.\n", state); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 211 | |
| 212 | /* Set up NMI on errors. */ |
| 213 | reg8 = inb(0x61); |
| 214 | reg8 &= 0x0f; /* Higher Nibble must be 0 */ |
| 215 | reg8 &= ~(1 << 3); /* IOCHK# NMI Enable */ |
| 216 | // reg8 &= ~(1 << 2); /* PCI SERR# Enable */ |
| 217 | reg8 |= (1 << 2); /* PCI SERR# Disable for now */ |
| 218 | outb(reg8, 0x61); |
| 219 | |
| 220 | reg8 = inb(0x70); |
| 221 | nmi_option = NMI_OFF; |
Luc Verhaegen | a9c5ea0 | 2009-06-03 14:19:33 +0000 | [diff] [blame] | 222 | get_option(&nmi_option, "nmi"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 223 | if (nmi_option) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 224 | printk(BIOS_INFO, "NMI sources enabled.\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 225 | reg8 &= ~(1 << 7); /* Set NMI. */ |
| 226 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 227 | printk(BIOS_INFO, "NMI sources disabled.\n"); |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 228 | reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 229 | } |
| 230 | outb(reg8, 0x70); |
| 231 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 232 | /* Enable CPU_SLP# and Intel Speedstep, set SMI# rate down */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 233 | reg16 = pci_read_config16(dev, GEN_PMCON_1); |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 234 | reg16 &= ~(3 << 0); // SMI# rate 1 minute |
| 235 | reg16 |= (1 << 2); // CLKRUN_EN - Mobile/Ultra only |
| 236 | reg16 |= (1 << 3); // Speedstep Enable - Mobile/Ultra only |
| 237 | reg16 |= (1 << 5); // CPUSLP_EN Desktop only |
Sven Schnelle | 906f9ae | 2011-10-23 16:35:01 +0200 | [diff] [blame] | 238 | |
| 239 | if (config->c4onc3_enable) |
| 240 | reg16 |= (1 << 7); |
| 241 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 242 | // another laptop wants this? |
| 243 | // reg16 &= ~(1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only |
| 244 | reg16 |= (1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 245 | #if DEBUG_PERIODIC_SMIS |
| 246 | /* Set DEBUG_PERIODIC_SMIS in i82801gx.h to debug using |
| 247 | * periodic SMIs. |
| 248 | */ |
| 249 | reg16 |= (3 << 0); // Periodic SMI every 8s |
| 250 | #endif |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 251 | pci_write_config16(dev, GEN_PMCON_1, reg16); |
| 252 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 253 | // Set the board's GPI routing. |
| 254 | i82801gx_gpi_routing(dev); |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 255 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 256 | pmbase = pci_read_config16(dev, 0x40) & 0xfffe; |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 257 | |
| 258 | outl(config->gpe0_en, pmbase + GPE0_EN); |
| 259 | outw(config->alt_gp_smi_en, pmbase + ALT_GP_SMI_EN); |
| 260 | |
| 261 | /* Set up power management block and determine sleep mode */ |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 262 | reg32 = inl(pmbase + 0x04); // PM1_CNT |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 263 | |
| 264 | reg32 &= ~(7 << 10); // SLP_TYP |
| 265 | reg32 |= (1 << 1); // enable C3->C0 transition on bus master |
| 266 | reg32 |= (1 << 0); // SCI_EN |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 267 | outl(reg32, pmbase + 0x04); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 268 | } |
| 269 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 270 | static void i82801gx_configure_cstates(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 271 | { |
| 272 | u8 reg8; |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 273 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 274 | reg8 = pci_read_config8(dev, 0xa9); // Cx state configuration |
| 275 | reg8 |= (1 << 4) | (1 << 3) | (1 << 2); // Enable Popup & Popdown |
| 276 | pci_write_config8(dev, 0xa9, reg8); |
| 277 | |
| 278 | // Set Deeper Sleep configuration to recommended values |
| 279 | reg8 = pci_read_config8(dev, 0xaa); |
| 280 | reg8 &= 0xf0; |
| 281 | reg8 |= (2 << 2); // Deeper Sleep to Stop CPU: 34-40us |
| 282 | reg8 |= (2 << 0); // Deeper Sleep to Sleep: 15us |
| 283 | pci_write_config8(dev, 0xaa, reg8); |
| 284 | } |
| 285 | |
| 286 | static void i82801gx_rtc_init(struct device *dev) |
| 287 | { |
| 288 | u8 reg8; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 289 | int rtc_failed; |
| 290 | |
| 291 | reg8 = pci_read_config8(dev, GEN_PMCON_3); |
| 292 | rtc_failed = reg8 & RTC_BATTERY_DEAD; |
| 293 | if (rtc_failed) { |
| 294 | reg8 &= ~RTC_BATTERY_DEAD; |
| 295 | pci_write_config8(dev, GEN_PMCON_3, reg8); |
| 296 | } |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 297 | printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 298 | |
Gabe Black | b3f08c6 | 2014-04-30 17:12:25 -0700 | [diff] [blame] | 299 | cmos_init(rtc_failed); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 300 | } |
| 301 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 302 | static void enable_hpet(void) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 303 | { |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 304 | u32 reg32; |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 305 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 306 | /* Move HPET to default address 0xfed00000 and enable it */ |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 307 | reg32 = RCBA32(HPTC); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 308 | reg32 |= (1 << 7); // HPET Address Enable |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 309 | reg32 &= ~(3 << 0); |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 310 | RCBA32(HPTC) = reg32; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 311 | } |
| 312 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 313 | static void enable_clock_gating(void) |
| 314 | { |
| 315 | u32 reg32; |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 316 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 317 | /* Enable Clock Gating for most devices */ |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 318 | reg32 = RCBA32(CG); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 319 | reg32 |= (1 << 31); // LPC clock gating |
| 320 | reg32 |= (1 << 30); // PATA clock gating |
| 321 | // SATA clock gating |
| 322 | reg32 |= (1 << 27) | (1 << 26) | (1 << 25) | (1 << 24); |
| 323 | reg32 |= (1 << 23); // AC97 clock gating |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 324 | reg32 |= (1 << 19); // USB EHCI clock gating |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 325 | reg32 |= (1 << 3) | (1 << 1); // DMI clock gating |
| 326 | reg32 |= (1 << 2); // PCIe clock gating; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 327 | reg32 &= ~(1 << 20); // No static clock gating for USB |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 328 | reg32 &= ~((1 << 29) | (1 << 28)); // Disable UHCI clock gating |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 329 | RCBA32(CG) = reg32; |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 330 | } |
Stefan Reinauer | 269563a | 2009-01-19 21:20:22 +0000 | [diff] [blame] | 331 | |
Martin Roth | 7a1a3ad | 2017-06-24 21:29:38 -0600 | [diff] [blame] | 332 | #if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 333 | static void i82801gx_lock_smm(struct device *dev) |
| 334 | { |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 335 | #if TEST_SMM_FLASH_LOCKDOWN |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 336 | u8 reg8; |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 337 | #endif |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 338 | |
Kyösti Mälkki | c3ed886 | 2014-06-19 19:50:51 +0300 | [diff] [blame] | 339 | if (!acpi_is_wakeup_s3()) { |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 340 | #if ENABLE_ACPI_MODE_IN_COREBOOT |
Sven Schnelle | f4dc1a7 | 2011-06-05 11:33:41 +0200 | [diff] [blame] | 341 | printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n"); |
| 342 | outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode |
| 343 | printk(BIOS_DEBUG, "done.\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 344 | #else |
Sven Schnelle | f4dc1a7 | 2011-06-05 11:33:41 +0200 | [diff] [blame] | 345 | printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n"); |
| 346 | outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode |
| 347 | printk(BIOS_DEBUG, "done.\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 348 | #endif |
Sven Schnelle | e261807 | 2011-06-05 11:39:12 +0200 | [diff] [blame] | 349 | } else { |
| 350 | printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n"); |
| 351 | outb(APM_CNT_ACPI_ENABLE, APM_CNT); |
| 352 | } |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 353 | /* Don't allow evil boot loaders, kernels, or |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 354 | * userspace applications to deceive us: |
| 355 | */ |
| 356 | smm_lock(); |
| 357 | |
| 358 | #if TEST_SMM_FLASH_LOCKDOWN |
| 359 | /* Now try this: */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 360 | printk(BIOS_DEBUG, "Locking BIOS to RO... "); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 361 | reg8 = pci_read_config8(dev, 0xdc); /* BIOS_CNTL */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 362 | printk(BIOS_DEBUG, " BLE: %s; BWE: %s\n", (reg8&2)?"on":"off", |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 363 | (reg8&1)?"rw":"ro"); |
| 364 | reg8 &= ~(1 << 0); /* clear BIOSWE */ |
| 365 | pci_write_config8(dev, 0xdc, reg8); |
| 366 | reg8 |= (1 << 1); /* set BLE */ |
| 367 | pci_write_config8(dev, 0xdc, reg8); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 368 | printk(BIOS_DEBUG, "ok.\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 369 | reg8 = pci_read_config8(dev, 0xdc); /* BIOS_CNTL */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 370 | printk(BIOS_DEBUG, " BLE: %s; BWE: %s\n", (reg8&2)?"on":"off", |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 371 | (reg8&1)?"rw":"ro"); |
| 372 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 373 | printk(BIOS_DEBUG, "Writing:\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 374 | *(volatile u8 *)0xfff00000 = 0x00; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 375 | printk(BIOS_DEBUG, "Testing:\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 376 | reg8 |= (1 << 0); /* set BIOSWE */ |
| 377 | pci_write_config8(dev, 0xdc, reg8); |
| 378 | |
| 379 | reg8 = pci_read_config8(dev, 0xdc); /* BIOS_CNTL */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 380 | printk(BIOS_DEBUG, " BLE: %s; BWE: %s\n", (reg8&2)?"on":"off", |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 381 | (reg8&1)?"rw":"ro"); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 382 | printk(BIOS_DEBUG, "Done.\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 383 | #endif |
| 384 | } |
Stefan Reinauer | 269563a | 2009-01-19 21:20:22 +0000 | [diff] [blame] | 385 | #endif |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 386 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 387 | #define SPIBASE 0x3020 |
| 388 | static void i82801gx_spi_init(void) |
| 389 | { |
| 390 | u16 spicontrol; |
| 391 | |
| 392 | spicontrol = RCBA16(SPIBASE + 2); |
| 393 | spicontrol &= ~(1 << 0); // SPI Access Request |
| 394 | RCBA16(SPIBASE + 2) = spicontrol; |
| 395 | } |
| 396 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 397 | static void i82801gx_fixups(struct device *dev) |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 398 | { |
| 399 | /* This needs to happen after PCI enumeration */ |
| 400 | RCBA32(0x1d40) |= 1; |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 401 | |
| 402 | /* USB Transient Disconnect Detect: |
| 403 | * Prevent a SE0 condition on the USB ports from being |
| 404 | * interpreted by the UHCI controller as a disconnect |
| 405 | */ |
| 406 | pci_write_config8(dev, 0xad, 0x3); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 407 | } |
| 408 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 409 | static void lpc_init(struct device *dev) |
| 410 | { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 411 | printk(BIOS_DEBUG, "i82801gx: lpc_init\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 412 | |
| 413 | /* Set the value for PCI command register. */ |
| 414 | pci_write_config16(dev, PCI_COMMAND, 0x000f); |
| 415 | |
| 416 | /* IO APIC initialization. */ |
Paul Menzel | ddddf15 | 2013-04-23 14:40:23 +0200 | [diff] [blame] | 417 | i82801gx_enable_ioapic(dev); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 418 | |
| 419 | i82801gx_enable_serial_irqs(dev); |
| 420 | |
| 421 | /* Setup the PIRQ. */ |
| 422 | i82801gx_pirq_init(dev); |
| 423 | |
| 424 | /* Setup power options. */ |
| 425 | i82801gx_power_options(dev); |
| 426 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 427 | /* Configure Cx state registers */ |
| 428 | i82801gx_configure_cstates(dev); |
| 429 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 430 | /* Set the state of the GPIO lines. */ |
| 431 | //gpio_init(dev); |
| 432 | |
| 433 | /* Initialize the real time clock. */ |
| 434 | i82801gx_rtc_init(dev); |
| 435 | |
| 436 | /* Initialize ISA DMA. */ |
| 437 | isa_dma_init(); |
| 438 | |
| 439 | /* Initialize the High Precision Event Timers, if present. */ |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 440 | enable_hpet(); |
| 441 | |
| 442 | /* Initialize Clock Gating */ |
| 443 | enable_clock_gating(); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 444 | |
| 445 | setup_i8259(); |
| 446 | |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 447 | /* The OS should do this? */ |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 448 | /* Interrupt 9 should be level triggered (SCI) */ |
| 449 | i8259_configure_irq_trigger(9, 1); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 450 | |
Martin Roth | 7a1a3ad | 2017-06-24 21:29:38 -0600 | [diff] [blame] | 451 | #if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 452 | i82801gx_lock_smm(dev); |
Stefan Reinauer | 269563a | 2009-01-19 21:20:22 +0000 | [diff] [blame] | 453 | #endif |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 454 | |
| 455 | i82801gx_spi_init(); |
| 456 | |
Stefan Reinauer | 7a3d095 | 2010-01-17 13:49:07 +0000 | [diff] [blame] | 457 | i82801gx_fixups(dev); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 458 | } |
| 459 | |
Vladimir Serbinenko | d5d94ea | 2014-10-18 02:13:11 +0200 | [diff] [blame] | 460 | unsigned long acpi_fill_madt(unsigned long current) |
| 461 | { |
| 462 | /* Local APICs */ |
| 463 | current = acpi_create_madt_lapics(current); |
| 464 | |
| 465 | /* IOAPIC */ |
| 466 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, |
| 467 | 2, IO_APIC_ADDR, 0); |
| 468 | |
| 469 | /* LAPIC_NMI */ |
| 470 | current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *) |
| 471 | current, 0, |
| 472 | MP_IRQ_POLARITY_HIGH | |
| 473 | MP_IRQ_TRIGGER_EDGE, 0x01); |
| 474 | current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *) |
| 475 | current, 1, MP_IRQ_POLARITY_HIGH | |
| 476 | MP_IRQ_TRIGGER_EDGE, 0x01); |
| 477 | |
| 478 | /* INT_SRC_OVR */ |
| 479 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 480 | current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE); |
| 481 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 482 | current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL); |
| 483 | |
| 484 | |
| 485 | return current; |
| 486 | } |
| 487 | |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 488 | void acpi_fill_fadt(acpi_fadt_t *fadt) |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 489 | { |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 490 | struct device *dev = pcidev_on_root(0x1f, 0); |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 491 | config_t *chip = dev->chip_info; |
| 492 | u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 493 | |
| 494 | fadt->pm1a_evt_blk = pmbase; |
| 495 | fadt->pm1b_evt_blk = 0x0; |
| 496 | fadt->pm1a_cnt_blk = pmbase + 0x4; |
| 497 | fadt->pm1b_cnt_blk = 0x0; |
| 498 | fadt->pm2_cnt_blk = pmbase + 0x20; |
| 499 | fadt->pm_tmr_blk = pmbase + 0x8; |
| 500 | fadt->gpe0_blk = pmbase + 0x28; |
| 501 | fadt->gpe1_blk = 0; |
| 502 | |
| 503 | fadt->pm1_evt_len = 4; |
| 504 | fadt->pm1_cnt_len = 2; |
| 505 | fadt->pm2_cnt_len = 1; |
| 506 | fadt->pm_tmr_len = 4; |
| 507 | fadt->gpe0_blk_len = 8; |
| 508 | fadt->gpe1_blk_len = 0; |
| 509 | fadt->gpe1_base = 0; |
| 510 | |
| 511 | fadt->reset_reg.space_id = 1; |
| 512 | fadt->reset_reg.bit_width = 8; |
| 513 | fadt->reset_reg.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 514 | fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 515 | fadt->reset_reg.addrl = 0xcf9; |
| 516 | fadt->reset_reg.addrh = 0; |
| 517 | |
| 518 | fadt->reset_value = 6; |
| 519 | |
| 520 | fadt->x_pm1a_evt_blk.space_id = 1; |
| 521 | fadt->x_pm1a_evt_blk.bit_width = 32; |
| 522 | fadt->x_pm1a_evt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 523 | fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 524 | fadt->x_pm1a_evt_blk.addrl = pmbase; |
| 525 | fadt->x_pm1a_evt_blk.addrh = 0x0; |
| 526 | |
| 527 | fadt->x_pm1b_evt_blk.space_id = 0; |
| 528 | fadt->x_pm1b_evt_blk.bit_width = 0; |
| 529 | fadt->x_pm1b_evt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 530 | fadt->x_pm1b_evt_blk.access_size = 0; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 531 | fadt->x_pm1b_evt_blk.addrl = 0x0; |
| 532 | fadt->x_pm1b_evt_blk.addrh = 0x0; |
| 533 | |
| 534 | fadt->x_pm1a_cnt_blk.space_id = 1; |
| 535 | fadt->x_pm1a_cnt_blk.bit_width = 16; |
| 536 | fadt->x_pm1a_cnt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 537 | fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 538 | fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; |
| 539 | fadt->x_pm1a_cnt_blk.addrh = 0x0; |
| 540 | |
| 541 | fadt->x_pm1b_cnt_blk.space_id = 0; |
| 542 | fadt->x_pm1b_cnt_blk.bit_width = 0; |
| 543 | fadt->x_pm1b_cnt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 544 | fadt->x_pm1b_cnt_blk.access_size = 0; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 545 | fadt->x_pm1b_cnt_blk.addrl = 0x0; |
| 546 | fadt->x_pm1b_cnt_blk.addrh = 0x0; |
| 547 | |
| 548 | fadt->x_pm2_cnt_blk.space_id = 1; |
| 549 | fadt->x_pm2_cnt_blk.bit_width = 8; |
| 550 | fadt->x_pm2_cnt_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 551 | fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 552 | fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20; |
| 553 | fadt->x_pm2_cnt_blk.addrh = 0x0; |
| 554 | |
| 555 | fadt->x_pm_tmr_blk.space_id = 1; |
| 556 | fadt->x_pm_tmr_blk.bit_width = 32; |
| 557 | fadt->x_pm_tmr_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 558 | fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 559 | fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; |
| 560 | fadt->x_pm_tmr_blk.addrh = 0x0; |
| 561 | |
| 562 | fadt->x_gpe0_blk.space_id = 1; |
| 563 | fadt->x_gpe0_blk.bit_width = 64; |
| 564 | fadt->x_gpe0_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 565 | fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 566 | fadt->x_gpe0_blk.addrl = pmbase + 0x28; |
| 567 | fadt->x_gpe0_blk.addrh = 0x0; |
| 568 | |
| 569 | fadt->x_gpe1_blk.space_id = 0; |
| 570 | fadt->x_gpe1_blk.bit_width = 0; |
| 571 | fadt->x_gpe1_blk.bit_offset = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 572 | fadt->x_gpe1_blk.access_size = 0; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 573 | fadt->x_gpe1_blk.addrl = 0x0; |
| 574 | fadt->x_gpe1_blk.addrh = 0x0; |
| 575 | fadt->day_alrm = 0xd; |
| 576 | fadt->mon_alrm = 0x00; |
| 577 | fadt->century = 0x32; |
| 578 | |
| 579 | fadt->model = 1; |
| 580 | fadt->sci_int = 0x9; |
| 581 | fadt->smi_cmd = APM_CNT; |
| 582 | fadt->acpi_enable = APM_CNT_ACPI_ENABLE; |
| 583 | fadt->acpi_disable = APM_CNT_ACPI_DISABLE; |
| 584 | fadt->s4bios_req = 0x0; |
| 585 | fadt->pstate_cnt = APM_CNT_PST_CONTROL; |
| 586 | |
| 587 | fadt->cst_cnt = APM_CNT_CST_CONTROL; |
| 588 | fadt->p_lvl2_lat = 1; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 589 | fadt->p_lvl3_lat = chip->c3_latency; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 590 | fadt->flush_size = 0; |
| 591 | fadt->flush_stride = 0; |
| 592 | fadt->duty_offset = 1; |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 593 | if (chip->p_cnt_throttling_supported) |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 594 | fadt->duty_width = 3; |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 595 | else |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 596 | fadt->duty_width = 0; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 597 | fadt->iapc_boot_arch = 0x03; |
| 598 | fadt->flags = (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
| 599 | | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
| 600 | | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_RESET_REGISTER |
| 601 | | ACPI_FADT_C2_MP_SUPPORTED); |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 602 | if (chip->docking_supported) |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 603 | fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED; |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 604 | } |
| 605 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 606 | static void i82801gx_lpc_read_resources(struct device *dev) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 607 | { |
| 608 | struct resource *res; |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 609 | u8 io_index = 0; |
| 610 | int i; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 611 | |
| 612 | /* Get the normal PCI resources of this device. */ |
| 613 | pci_dev_read_resources(dev); |
| 614 | |
| 615 | /* Add an extra subtractive resource for both memory and I/O. */ |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 616 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 617 | res->base = 0; |
| 618 | res->size = 0x1000; |
| 619 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 620 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 621 | |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 622 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 623 | res->base = 0xff800000; |
| 624 | res->size = 0x00800000; /* 8 MB for flash */ |
| 625 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 626 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 627 | |
| 628 | res = new_resource(dev, 3); /* IOAPIC */ |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 629 | res->base = IO_APIC_ADDR; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 630 | res->size = 0x00001000; |
| 631 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Vladimir Serbinenko | f119f08 | 2014-11-24 21:05:56 +0100 | [diff] [blame] | 632 | |
| 633 | /* Set IO decode ranges if required.*/ |
| 634 | for (i = 0; i < 4; i++) { |
| 635 | u32 gen_dec; |
| 636 | gen_dec = pci_read_config32(dev, 0x84 + 4 * i); |
| 637 | |
| 638 | if ((gen_dec & 0xFFFC) > 0x1000) { |
| 639 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); |
| 640 | res->base = gen_dec & 0xFFFC; |
| 641 | res->size = (gen_dec >> 16) & 0xFC; |
| 642 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 643 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 644 | } |
| 645 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 646 | } |
| 647 | |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 648 | #define SPIBAR16(x) RCBA16(0x3020 + x) |
| 649 | #define SPIBAR32(x) RCBA32(0x3020 + x) |
| 650 | |
| 651 | static void lpc_final(struct device *dev) |
| 652 | { |
| 653 | u16 tco1_cnt; |
| 654 | |
| 655 | if (!IS_ENABLED(CONFIG_INTEL_CHIPSET_LOCKDOWN)) |
| 656 | return; |
| 657 | |
| 658 | SPIBAR16(PREOP) = SPI_OPPREFIX; |
| 659 | /* Set SPI opcode menu */ |
| 660 | SPIBAR16(OPTYPE) = SPI_OPTYPE; |
| 661 | SPIBAR32(OPMENU) = SPI_OPMENU_LOWER; |
| 662 | SPIBAR32(OPMENU + 4) = SPI_OPMENU_UPPER; |
| 663 | |
| 664 | /* Lock SPIBAR */ |
| 665 | SPIBAR16(0) = SPIBAR16(0) | (1 << 15); |
| 666 | |
| 667 | /* BIOS Interface Lockdown */ |
| 668 | RCBA32(0x3410) |= 1 << 0; |
| 669 | |
| 670 | /* Global SMI Lock */ |
| 671 | pci_or_config16(dev, GEN_PMCON_1, 1 << 4); |
| 672 | |
| 673 | /* TCO_Lock */ |
| 674 | tco1_cnt = inw(DEFAULT_PMBASE + 0x60 + TCO1_CNT); |
| 675 | tco1_cnt |= (1 << 12); /* TCO lock */ |
| 676 | outw(tco1_cnt, DEFAULT_PMBASE + 0x60 + TCO1_CNT); |
| 677 | |
| 678 | /* Indicate finalize step with post code */ |
| 679 | outb(POST_OS_BOOT, 0x80); |
| 680 | } |
| 681 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 682 | static void set_subsystem(struct device *dev, unsigned int vendor, |
| 683 | unsigned int device) |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 684 | { |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 685 | if (!vendor || !device) { |
| 686 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 687 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 688 | } else { |
| 689 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 690 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 691 | } |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 692 | } |
| 693 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 694 | static void southbridge_inject_dsdt(struct device *dev) |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 695 | { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 696 | global_nvs_t *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 697 | |
| 698 | if (gnvs) { |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 699 | const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info(); |
| 700 | |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 701 | memset(gnvs, 0, sizeof(*gnvs)); |
Vladimir Serbinenko | 385743a | 2014-10-18 02:26:21 +0200 | [diff] [blame] | 702 | |
| 703 | gnvs->apic = 1; |
| 704 | gnvs->mpen = 1; /* Enable Multi Processing */ |
| 705 | |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 706 | acpi_create_gnvs(gnvs); |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 707 | |
Nico Huber | 744d6bd | 2019-01-12 14:58:20 +0100 | [diff] [blame^] | 708 | if (gfx) { |
| 709 | gnvs->ndid = gfx->ndid; |
| 710 | memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); |
| 711 | } |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 712 | |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 713 | /* And tell SMI about it */ |
| 714 | smm_setup_structures(gnvs, NULL, NULL); |
| 715 | |
| 716 | /* Add it to SSDT. */ |
Vladimir Serbinenko | 1bad88e | 2014-11-04 21:20:56 +0100 | [diff] [blame] | 717 | acpigen_write_scope("\\"); |
| 718 | acpigen_write_name_dword("NVSA", (u32) gnvs); |
| 719 | acpigen_pop_len(); |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 720 | } |
| 721 | } |
| 722 | |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 723 | static const char *lpc_acpi_name(const struct device *dev) |
| 724 | { |
| 725 | return "LPCB"; |
| 726 | } |
| 727 | |
Elyes HAOUAS | 38f1d13 | 2018-09-17 08:44:18 +0200 | [diff] [blame] | 728 | static void southbridge_fill_ssdt(struct device *device) |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 729 | { |
| 730 | intel_acpi_gen_def_acpi_pirq(device); |
| 731 | } |
| 732 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 733 | static struct pci_operations pci_ops = { |
| 734 | .set_subsystem = set_subsystem, |
| 735 | }; |
| 736 | |
| 737 | static struct device_operations device_ops = { |
| 738 | .read_resources = i82801gx_lpc_read_resources, |
| 739 | .set_resources = pci_dev_set_resources, |
Myles Watson | 7eac445 | 2010-06-17 16:16:56 +0000 | [diff] [blame] | 740 | .enable_resources = pci_dev_enable_resources, |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 741 | .acpi_inject_dsdt_generator = southbridge_inject_dsdt, |
| 742 | .write_acpi_tables = acpi_write_hpet, |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 743 | .acpi_fill_ssdt_generator = southbridge_fill_ssdt, |
| 744 | .acpi_name = lpc_acpi_name, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 745 | .init = lpc_init, |
Kyösti Mälkki | d0e212c | 2015-02-26 20:47:47 +0200 | [diff] [blame] | 746 | .scan_bus = scan_lpc_bus, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 747 | .enable = i82801gx_enable, |
| 748 | .ops_pci = &pci_ops, |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 749 | .final = lpc_final, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 750 | }; |
| 751 | |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 752 | /* 27b0: 82801GH (ICH7 DH) */ |
| 753 | /* 27b8: 82801GB/GR (ICH7/ICH7R) */ |
| 754 | /* 27b9: 82801GBM/GU (ICH7-M/ICH7-U) */ |
| 755 | /* 27bc: 82NM10 (NM10) */ |
| 756 | /* 27bd: 82801GHM (ICH7-M DH) */ |
| 757 | |
| 758 | static const unsigned short pci_device_ids[] = { |
| 759 | 0x27b0, 0x27b8, 0x27b9, 0x27bc, 0x27bd, 0 |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 760 | }; |
| 761 | |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 762 | static const struct pci_driver ich7_lpc __pci_driver = { |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 763 | .ops = &device_ops, |
| 764 | .vendor = PCI_VENDOR_ID_INTEL, |
Damien Zammit | ef33e03 | 2015-11-14 01:03:39 +1100 | [diff] [blame] | 765 | .devices = pci_device_ids, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 766 | }; |