Angel Pons | f94ac9a | 2020-04-05 15:46:48 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 2 | |
Kyösti Mälkki | 326edeb | 2019-07-24 13:27:46 +0300 | [diff] [blame] | 3 | #define __SIMPLE_DEVICE__ |
| 4 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 5 | #include <cbmem.h> |
Kyösti Mälkki | 8f09688d | 2019-08-15 11:29:15 +0300 | [diff] [blame] | 6 | #include <cpu/x86/smm.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 7 | #include <device/pci.h> |
Kyösti Mälkki | 26a682c | 2019-08-02 06:13:22 +0300 | [diff] [blame] | 8 | #include <device/pci_ops.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 9 | #include <soc/pci_devs.h> |
| 10 | #include <soc/systemagent.h> |
Kyösti Mälkki | 26a682c | 2019-08-02 06:13:22 +0300 | [diff] [blame] | 11 | #include <stdint.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 12 | |
Kyösti Mälkki | f1e3c76 | 2014-12-22 12:28:07 +0200 | [diff] [blame] | 13 | static uintptr_t dpr_region_start(void) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 14 | { |
| 15 | /* |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 16 | * Base of DPR is top of usable DRAM below 4GiB. The register has |
| 17 | * 1 MiB alignment and reports the TOP of the range, the base |
| 18 | * must be calculated from the size in MiB in bits 11:4. |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 19 | */ |
Kyösti Mälkki | f1e3c76 | 2014-12-22 12:28:07 +0200 | [diff] [blame] | 20 | uintptr_t dpr = pci_read_config32(SA_DEV_ROOT, DPR); |
Elyes HAOUAS | 694cbc0 | 2020-08-29 18:11:16 +0200 | [diff] [blame^] | 21 | uintptr_t tom = ALIGN_DOWN(dpr, 1 * MiB); |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 22 | |
| 23 | /* Subtract DMA Protected Range size if enabled */ |
| 24 | if (dpr & DPR_EPM) |
| 25 | tom -= (dpr & DPR_SIZE_MASK) << 16; |
| 26 | |
Kyösti Mälkki | f1e3c76 | 2014-12-22 12:28:07 +0200 | [diff] [blame] | 27 | return tom; |
| 28 | } |
| 29 | |
Arthur Heymans | 340e4b8 | 2019-10-23 17:25:58 +0200 | [diff] [blame] | 30 | void *cbmem_top_chipset(void) |
Kyösti Mälkki | f1e3c76 | 2014-12-22 12:28:07 +0200 | [diff] [blame] | 31 | { |
| 32 | return (void *) dpr_region_start(); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 33 | } |
Kyösti Mälkki | 26a682c | 2019-08-02 06:13:22 +0300 | [diff] [blame] | 34 | |
Kyösti Mälkki | 8f09688d | 2019-08-15 11:29:15 +0300 | [diff] [blame] | 35 | void smm_region(uintptr_t *start, size_t *size) |
Kyösti Mälkki | 26a682c | 2019-08-02 06:13:22 +0300 | [diff] [blame] | 36 | { |
Kyösti Mälkki | 8f09688d | 2019-08-15 11:29:15 +0300 | [diff] [blame] | 37 | uintptr_t tseg = pci_read_config32(PCI_DEV(0, 0, 0), TSEG); |
| 38 | uintptr_t bgsm = pci_read_config32(PCI_DEV(0, 0, 0), BGSM); |
Kyösti Mälkki | 26a682c | 2019-08-02 06:13:22 +0300 | [diff] [blame] | 39 | |
Kyösti Mälkki | 8f09688d | 2019-08-15 11:29:15 +0300 | [diff] [blame] | 40 | tseg = ALIGN_DOWN(tseg, 1 * MiB); |
| 41 | bgsm = ALIGN_DOWN(bgsm, 1 * MiB); |
| 42 | *start = tseg; |
| 43 | *size = bgsm - tseg; |
Kyösti Mälkki | 26a682c | 2019-08-02 06:13:22 +0300 | [diff] [blame] | 44 | } |