| Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <arch/io.h> |
| 21 | #include <cbmem.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <broadwell/pci_devs.h> |
| 24 | #include <broadwell/systemagent.h> |
| 25 | |
| 26 | static unsigned long get_top_of_ram(void) |
| 27 | { |
| 28 | /* |
| 29 | * Base of TSEG is top of usable DRAM below 4GiB. The register has |
| 30 | * 1 MiB alignement. |
| 31 | */ |
| 32 | u32 tom = pci_read_config32(SA_DEV_ROOT, TSEG); |
| 33 | return (unsigned long) tom & ~((1 << 20) - 1); |
| 34 | } |
| 35 | |
| 36 | void *cbmem_top(void) |
| 37 | { |
| 38 | return (void *)get_top_of_ram(); |
| 39 | } |