Martin Roth | b28f466 | 2018-05-26 17:58:47 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; version 2 of the License. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
Stefan Reinauer | e2b53e1 | 2004-06-28 11:59:45 +0000 | [diff] [blame] | 14 | #include <console/console.h> |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 15 | #include <cpu/cpu.h> |
Patrick Georgi | c8feedd | 2012-02-16 18:43:25 +0100 | [diff] [blame] | 16 | #include <cpu/x86/lapic_def.h> |
Stefan Reinauer | e2b53e1 | 2004-06-28 11:59:45 +0000 | [diff] [blame] | 17 | #include <arch/io.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 18 | #include <device/pci_ops.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 19 | #include <arch/ioapic.h> |
Stefan Reinauer | e2b53e1 | 2004-06-28 11:59:45 +0000 | [diff] [blame] | 20 | #include <stdint.h> |
Stefan Reinauer | e2b53e1 | 2004-06-28 11:59:45 +0000 | [diff] [blame] | 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
Stefan Reinauer | e2b53e1 | 2004-06-28 11:59:45 +0000 | [diff] [blame] | 23 | #include <stdlib.h> |
| 24 | #include <string.h> |
Sven Schnelle | 164bcfd | 2011-08-14 20:56:34 +0200 | [diff] [blame] | 25 | #include <smbios.h> |
Patrick Rudolph | 69d5ef9 | 2018-11-11 12:43:48 +0100 | [diff] [blame] | 26 | #include "memory.h" |
Myles Watson | 0520d55 | 2009-05-11 22:44:14 +0000 | [diff] [blame] | 27 | |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 28 | #include "fw_cfg.h" |
Gerd Hoffmann | baa7820 | 2013-11-06 14:36:17 +0100 | [diff] [blame] | 29 | #include "fw_cfg_if.h" |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 30 | |
Vladimir Serbinenko | 41877d8 | 2014-09-01 22:18:01 +0200 | [diff] [blame] | 31 | #include "acpi.h" |
Sven Schnelle | 164bcfd | 2011-08-14 20:56:34 +0200 | [diff] [blame] | 32 | |
Gerd Hoffmann | 05d3f49 | 2013-08-06 10:48:41 +0200 | [diff] [blame] | 33 | static void qemu_reserve_ports(struct device *dev, unsigned int idx, |
| 34 | unsigned int base, unsigned int size, |
| 35 | const char *name) |
| 36 | { |
| 37 | unsigned int end = base + size -1; |
| 38 | struct resource *res; |
| 39 | |
| 40 | printk(BIOS_DEBUG, "QEMU: reserve ioports 0x%04x-0x%04x [%s]\n", |
| 41 | base, end, name); |
| 42 | res = new_resource(dev, idx); |
| 43 | res->base = base; |
| 44 | res->size = size; |
| 45 | res->limit = 0xffff; |
| 46 | res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_STORED | |
| 47 | IORESOURCE_ASSIGNED; |
| 48 | } |
| 49 | |
Kyösti Mälkki | ccb9502 | 2018-05-22 00:16:23 +0300 | [diff] [blame] | 50 | static void cpu_pci_domain_set_resources(struct device *dev) |
Eric Biederman | 6e53f50 | 2004-10-27 08:53:57 +0000 | [diff] [blame] | 51 | { |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 52 | assign_resources(dev->link_list); |
Eric Biederman | 6e53f50 | 2004-10-27 08:53:57 +0000 | [diff] [blame] | 53 | } |
Stefan Reinauer | e2b53e1 | 2004-06-28 11:59:45 +0000 | [diff] [blame] | 54 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 55 | static void cpu_pci_domain_read_resources(struct device *dev) |
Eric Biederman | 6e53f50 | 2004-10-27 08:53:57 +0000 | [diff] [blame] | 56 | { |
Kyösti Mälkki | 98a9174 | 2018-05-21 21:29:16 +0300 | [diff] [blame] | 57 | u16 nbid = pci_read_config16(pcidev_on_root(0x0, 0), PCI_DEVICE_ID); |
Gerd Hoffmann | a4e7057 | 2013-08-09 10:02:22 +0200 | [diff] [blame] | 58 | int i440fx = (nbid == 0x1237); |
Gerd Hoffmann | ad690f2 | 2013-09-17 10:35:43 +0200 | [diff] [blame] | 59 | int q35 = (nbid == 0x29c0); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 60 | struct resource *res; |
Gerd Hoffmann | 9839a38 | 2013-06-17 12:26:17 +0200 | [diff] [blame] | 61 | unsigned long tomk = 0, high; |
Gerd Hoffmann | 44b11f2 | 2013-06-17 13:30:50 +0200 | [diff] [blame] | 62 | int idx = 10; |
Thomas Heijligen | bcd84fe | 2019-01-10 16:53:34 +0100 | [diff] [blame] | 63 | FWCfgFile f; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 64 | |
| 65 | pci_domain_read_resources(dev); |
| 66 | |
Thomas Heijligen | bcd84fe | 2019-01-10 16:53:34 +0100 | [diff] [blame] | 67 | if (!fw_cfg_check_file(&f, "etc/e820") && f.size > 0) { |
Gerd Hoffmann | baa7820 | 2013-11-06 14:36:17 +0100 | [diff] [blame] | 68 | /* supported by qemu 1.7+ */ |
Thomas Heijligen | bcd84fe | 2019-01-10 16:53:34 +0100 | [diff] [blame] | 69 | FwCfgE820Entry *list = malloc(f.size); |
Gerd Hoffmann | baa7820 | 2013-11-06 14:36:17 +0100 | [diff] [blame] | 70 | int i; |
Thomas Heijligen | bcd84fe | 2019-01-10 16:53:34 +0100 | [diff] [blame] | 71 | fw_cfg_get(f.select, list, f.size); |
| 72 | for (i = 0; i < f.size / sizeof(*list); i++) { |
Gerd Hoffmann | baa7820 | 2013-11-06 14:36:17 +0100 | [diff] [blame] | 73 | switch (list[i].type) { |
Elyes HAOUAS | 8ab989e | 2016-07-30 17:46:17 +0200 | [diff] [blame] | 74 | case 1: /* RAM */ |
Gerd Hoffmann | baa7820 | 2013-11-06 14:36:17 +0100 | [diff] [blame] | 75 | printk(BIOS_DEBUG, "QEMU: e820/ram: 0x%08llx +0x%08llx\n", |
| 76 | list[i].address, list[i].length); |
| 77 | if (list[i].address == 0) { |
| 78 | tomk = list[i].length / 1024; |
| 79 | ram_resource(dev, idx++, 0, 640); |
| 80 | ram_resource(dev, idx++, 768, tomk - 768); |
| 81 | } else { |
| 82 | ram_resource(dev, idx++, |
| 83 | list[i].address / 1024, |
| 84 | list[i].length / 1024); |
| 85 | } |
| 86 | break; |
| 87 | case 2: /* reserved */ |
| 88 | printk(BIOS_DEBUG, "QEMU: e820/res: 0x%08llx +0x%08llx\n", |
| 89 | list[i].address, list[i].length); |
| 90 | res = new_resource(dev, idx++); |
| 91 | res->base = list[i].address; |
| 92 | res->size = list[i].length; |
| 93 | res->limit = 0xffffffff; |
| 94 | res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | |
| 95 | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
| 96 | break; |
| 97 | default: |
| 98 | /* skip unknown */ |
| 99 | break; |
| 100 | } |
| 101 | } |
| 102 | free(list); |
| 103 | } |
Gerd Hoffmann | 44b11f2 | 2013-06-17 13:30:50 +0200 | [diff] [blame] | 104 | |
Gerd Hoffmann | baa7820 | 2013-11-06 14:36:17 +0100 | [diff] [blame] | 105 | if (!tomk) { |
| 106 | /* qemu older than 1.7, or reading etc/e820 failed. Fallback to cmos. */ |
| 107 | tomk = qemu_get_memory_size(); |
| 108 | high = qemu_get_high_memory_size(); |
| 109 | printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM below 4G.\n", tomk / 1024); |
| 110 | printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM above 4G.\n", high / 1024); |
| 111 | |
| 112 | /* Report the memory regions. */ |
| 113 | ram_resource(dev, idx++, 0, 640); |
| 114 | ram_resource(dev, idx++, 768, tomk - 768); |
| 115 | if (high) |
| 116 | ram_resource(dev, idx++, 4 * 1024 * 1024, high); |
| 117 | } |
Gerd Hoffmann | 44b11f2 | 2013-06-17 13:30:50 +0200 | [diff] [blame] | 118 | |
Gerd Hoffmann | 05d3f49 | 2013-08-06 10:48:41 +0200 | [diff] [blame] | 119 | /* Reserve I/O ports used by QEMU */ |
| 120 | qemu_reserve_ports(dev, idx++, 0x0510, 0x02, "firmware-config"); |
| 121 | qemu_reserve_ports(dev, idx++, 0x5658, 0x01, "vmware-port"); |
| 122 | if (i440fx) { |
| 123 | qemu_reserve_ports(dev, idx++, 0xae00, 0x10, "pci-hotplug"); |
| 124 | qemu_reserve_ports(dev, idx++, 0xaf00, 0x20, "cpu-hotplug"); |
| 125 | qemu_reserve_ports(dev, idx++, 0xafe0, 0x04, "piix4-gpe0"); |
| 126 | } |
| 127 | if (inb(CONFIG_CONSOLE_QEMU_DEBUGCON_PORT) == 0xe9) { |
| 128 | qemu_reserve_ports(dev, idx++, CONFIG_CONSOLE_QEMU_DEBUGCON_PORT, 1, |
| 129 | "debugcon"); |
| 130 | } |
| 131 | |
Gerd Hoffmann | ad690f2 | 2013-09-17 10:35:43 +0200 | [diff] [blame] | 132 | if (q35 && ((tomk * 1024) < 0xb0000000)) { |
| 133 | /* |
| 134 | * Reserve the region between top-of-ram and the |
| 135 | * mmconf xbar (ar 0xb0000000), so coreboot doesn't |
| 136 | * place pci bars there. The region isn't declared as |
Elyes HAOUAS | 8ab989e | 2016-07-30 17:46:17 +0200 | [diff] [blame] | 137 | * pci io window in the ACPI tables (\_SB.PCI0._CRS). |
Gerd Hoffmann | ad690f2 | 2013-09-17 10:35:43 +0200 | [diff] [blame] | 138 | */ |
| 139 | res = new_resource(dev, idx++); |
| 140 | res->base = tomk * 1024; |
| 141 | res->size = 0xb0000000 - tomk * 1024; |
| 142 | res->limit = 0xffffffff; |
| 143 | res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | |
| 144 | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
| 145 | } |
| 146 | |
Gerd Hoffmann | a4e7057 | 2013-08-09 10:02:22 +0200 | [diff] [blame] | 147 | if (i440fx) { |
| 148 | /* Reserve space for the IOAPIC. This should be in |
Patrick Georgi | 3f34fc4 | 2013-08-15 20:41:15 +0200 | [diff] [blame] | 149 | * the southbridge, but I couldn't tell which device |
Gerd Hoffmann | a4e7057 | 2013-08-09 10:02:22 +0200 | [diff] [blame] | 150 | * to put it in. */ |
| 151 | res = new_resource(dev, 2); |
| 152 | res->base = IO_APIC_ADDR; |
| 153 | res->size = 0x100000UL; |
| 154 | res->limit = 0xffffffffUL; |
| 155 | res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | |
| 156 | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
| 157 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 158 | |
| 159 | /* Reserve space for the LAPIC. There's one in every processor, but |
| 160 | * the space only needs to be reserved once, so we do it here. */ |
| 161 | res = new_resource(dev, 3); |
Patrick Georgi | c8feedd | 2012-02-16 18:43:25 +0100 | [diff] [blame] | 162 | res->base = LOCAL_APIC_ADDR; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 163 | res->size = 0x10000UL; |
| 164 | res->limit = 0xffffffffUL; |
| 165 | res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | |
| 166 | IORESOURCE_ASSIGNED; |
Eric Biederman | 6e53f50 | 2004-10-27 08:53:57 +0000 | [diff] [blame] | 167 | } |
| 168 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 169 | #if CONFIG(GENERATE_SMBIOS_TABLES) |
Sven Schnelle | 164bcfd | 2011-08-14 20:56:34 +0200 | [diff] [blame] | 170 | static int qemu_get_smbios_data16(int handle, unsigned long *current) |
| 171 | { |
| 172 | struct smbios_type16 *t = (struct smbios_type16 *)*current; |
| 173 | int len = sizeof(struct smbios_type16); |
| 174 | |
| 175 | memset(t, 0, sizeof(struct smbios_type16)); |
| 176 | t->type = SMBIOS_PHYS_MEMORY_ARRAY; |
| 177 | t->handle = handle; |
| 178 | t->length = len - 2; |
Paul Menzel | b4d0757 | 2017-03-12 18:18:06 +0100 | [diff] [blame] | 179 | t->location = MEMORY_ARRAY_LOCATION_SYSTEM_BOARD; |
| 180 | t->use = MEMORY_ARRAY_USE_SYSTEM; |
| 181 | t->memory_error_correction = MEMORY_ARRAY_ECC_NONE; |
Sven Schnelle | 164bcfd | 2011-08-14 20:56:34 +0200 | [diff] [blame] | 182 | t->maximum_capacity = qemu_get_memory_size(); |
| 183 | *current += len; |
| 184 | return len; |
| 185 | } |
| 186 | |
| 187 | static int qemu_get_smbios_data17(int handle, int parent_handle, unsigned long *current) |
| 188 | { |
| 189 | struct smbios_type17 *t = (struct smbios_type17 *)*current; |
| 190 | int len; |
| 191 | |
| 192 | memset(t, 0, sizeof(struct smbios_type17)); |
| 193 | t->type = SMBIOS_MEMORY_DEVICE; |
| 194 | t->handle = handle; |
| 195 | t->phys_memory_array_handle = parent_handle; |
| 196 | t->length = sizeof(struct smbios_type17) - 2; |
| 197 | t->size = qemu_get_memory_size() / 1024; |
| 198 | t->data_width = 64; |
| 199 | t->total_width = 64; |
| 200 | t->form_factor = 9; /* DIMM */ |
| 201 | t->device_locator = smbios_add_string(t->eos, "Virtual"); |
| 202 | t->memory_type = 0x12; /* DDR */ |
| 203 | t->type_detail = 0x80; /* Synchronous */ |
| 204 | t->speed = 200; |
| 205 | t->clock_speed = 200; |
| 206 | t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR); |
| 207 | len = t->length + smbios_string_table_len(t->eos); |
| 208 | *current += len; |
| 209 | return len; |
| 210 | } |
| 211 | |
Kyösti Mälkki | ccb9502 | 2018-05-22 00:16:23 +0300 | [diff] [blame] | 212 | static int qemu_get_smbios_data(struct device *dev, int *handle, unsigned long *current) |
Sven Schnelle | 164bcfd | 2011-08-14 20:56:34 +0200 | [diff] [blame] | 213 | { |
| 214 | int len; |
Gerd Hoffmann | db9d169 | 2014-08-27 11:25:13 +0200 | [diff] [blame] | 215 | |
| 216 | len = fw_cfg_smbios_tables(handle, current); |
| 217 | if (len != 0) |
| 218 | return len; |
| 219 | |
Sven Schnelle | 164bcfd | 2011-08-14 20:56:34 +0200 | [diff] [blame] | 220 | len = qemu_get_smbios_data16(*handle, current); |
| 221 | len += qemu_get_smbios_data17(*handle+1, *handle, current); |
| 222 | *handle += 2; |
| 223 | return len; |
| 224 | } |
| 225 | #endif |
Eric Biederman | 6e53f50 | 2004-10-27 08:53:57 +0000 | [diff] [blame] | 226 | static struct device_operations pci_domain_ops = { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 227 | .read_resources = cpu_pci_domain_read_resources, |
| 228 | .set_resources = cpu_pci_domain_set_resources, |
Myles Watson | 7eac445 | 2010-06-17 16:16:56 +0000 | [diff] [blame] | 229 | .enable_resources = NULL, |
| 230 | .init = NULL, |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 231 | .scan_bus = pci_domain_scan_bus, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 232 | #if CONFIG(GENERATE_SMBIOS_TABLES) |
Sven Schnelle | 164bcfd | 2011-08-14 20:56:34 +0200 | [diff] [blame] | 233 | .get_smbios_data = qemu_get_smbios_data, |
| 234 | #endif |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 235 | }; |
Eric Biederman | 6e53f50 | 2004-10-27 08:53:57 +0000 | [diff] [blame] | 236 | |
Kyösti Mälkki | ccb9502 | 2018-05-22 00:16:23 +0300 | [diff] [blame] | 237 | static void cpu_bus_init(struct device *dev) |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 238 | { |
| 239 | initialize_cpus(dev->link_list); |
| 240 | } |
| 241 | |
Kyösti Mälkki | ccb9502 | 2018-05-22 00:16:23 +0300 | [diff] [blame] | 242 | static void cpu_bus_scan(struct device *bus) |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 243 | { |
| 244 | int max_cpus = fw_cfg_max_cpus(); |
Kyösti Mälkki | ccb9502 | 2018-05-22 00:16:23 +0300 | [diff] [blame] | 245 | struct device *cpu; |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 246 | int i; |
| 247 | |
| 248 | if (max_cpus < 0) |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 249 | return; |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 250 | |
| 251 | /* |
| 252 | * TODO: This only handles the simple "qemu -smp $nr" case |
| 253 | * correctly. qemu also allows to specify the number of |
| 254 | * cores, threads & sockets. |
| 255 | */ |
| 256 | printk(BIOS_INFO, "QEMU: max_cpus is %d\n", max_cpus); |
| 257 | for (i = 0; i < max_cpus; i++) { |
| 258 | cpu = add_cpu_device(bus->link_list, i, 1); |
| 259 | if (cpu) |
| 260 | set_cpu_topology(cpu, 1, 0, i, 0); |
| 261 | } |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 262 | } |
| 263 | |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 264 | static struct device_operations cpu_bus_ops = { |
Edward O'Callaghan | c3f38cd | 2014-10-31 08:04:30 +1100 | [diff] [blame] | 265 | .read_resources = DEVICE_NOOP, |
| 266 | .set_resources = DEVICE_NOOP, |
| 267 | .enable_resources = DEVICE_NOOP, |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 268 | .init = cpu_bus_init, |
| 269 | .scan_bus = cpu_bus_scan, |
| 270 | }; |
| 271 | |
Paul Menzel | 5f20b35 | 2013-02-24 14:27:03 +0100 | [diff] [blame] | 272 | static void northbridge_enable(struct device *dev) |
Eric Biederman | 6e53f50 | 2004-10-27 08:53:57 +0000 | [diff] [blame] | 273 | { |
Eric Biederman | 018d8dd | 2004-11-04 11:04:33 +0000 | [diff] [blame] | 274 | /* Set the operations if it is a special bus type */ |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 275 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
Eric Biederman | 018d8dd | 2004-11-04 11:04:33 +0000 | [diff] [blame] | 276 | dev->ops = &pci_domain_ops; |
Eric Biederman | 018d8dd | 2004-11-04 11:04:33 +0000 | [diff] [blame] | 277 | } |
Gerd Hoffmann | aa588e0 | 2013-05-31 09:26:55 +0200 | [diff] [blame] | 278 | else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
| 279 | dev->ops = &cpu_bus_ops; |
| 280 | } |
Stefan Reinauer | e2b53e1 | 2004-06-28 11:59:45 +0000 | [diff] [blame] | 281 | } |
| 282 | |
Gerd Hoffmann | 00cc7f43 | 2013-06-07 15:46:23 +0200 | [diff] [blame] | 283 | struct chip_operations mainboard_emulation_qemu_i440fx_ops = { |
| 284 | CHIP_NAME("QEMU Northbridge i440fx") |
Paul Menzel | 5f20b35 | 2013-02-24 14:27:03 +0100 | [diff] [blame] | 285 | .enable_dev = northbridge_enable, |
Stefan Reinauer | e2b53e1 | 2004-06-28 11:59:45 +0000 | [diff] [blame] | 286 | }; |
Gerd Hoffmann | ee941b38 | 2013-06-07 16:03:44 +0200 | [diff] [blame] | 287 | |
| 288 | struct chip_operations mainboard_emulation_qemu_q35_ops = { |
| 289 | CHIP_NAME("QEMU Northbridge q35") |
| 290 | .enable_dev = northbridge_enable, |
| 291 | }; |