blob: 8143eceb0015f7a060c9ca6bb92e1c569f222828 [file] [log] [blame]
Sven Schnellee2ca71e2011-02-14 20:02:47 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of
10 * the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
20 * MA 02110-1301 USA
21 */
22
23#include <console/console.h>
24#include <device/device.h>
25#include <arch/io.h>
Sven Schnellee2ca71e2011-02-14 20:02:47 +000026#include <delay.h>
Vladimir Serbinenko63acd222014-06-01 00:26:48 +020027#include <string.h>
Sven Schnellee2ca71e2011-02-14 20:02:47 +000028#include <device/pci_def.h>
29#include <device/pci_ops.h>
Jonathan A. Kollasch25962832012-07-10 10:14:17 -050030#include <device/pci_ids.h>
Sven Schnellee2ca71e2011-02-14 20:02:47 +000031#include <arch/io.h>
Denis 'GNUtoo' Carikli4062f172013-05-21 03:13:46 +020032#include <arch/interrupt.h>
Sven Schnellee2ca71e2011-02-14 20:02:47 +000033#include <ec/lenovo/pmh7/pmh7.h>
34#include <ec/acpi/ec.h>
Sven Schnelleffcd1432011-04-11 19:43:32 +000035#include <ec/lenovo/h8/h8.h>
Sven Schnelle8099cbf2011-04-04 10:57:17 +000036#include <northbridge/intel/i945/i945.h>
Sven Schnelled40d4f772011-06-12 15:08:58 +020037#include <pc80/mc146818rtc.h>
Sven Schnelle50270b82011-04-27 19:48:05 +000038#include "dock.h"
Sven Schnelle6eb8bef2011-10-23 16:57:50 +020039#include <arch/x86/include/arch/acpigen.h>
Peter Stugeb6b3f792013-07-06 20:10:36 +020040#include <smbios.h>
Vladimir Serbinenko63acd222014-06-01 00:26:48 +020041#include <build.h>
Denis 'GNUtoo' Carikli4062f172013-05-21 03:13:46 +020042#include <x86emu/x86emu.h>
43#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
Sven Schnelle6eb8bef2011-10-23 16:57:50 +020044
Denis 'GNUtoo' Cariklied7e29e2013-02-24 12:01:44 +010045int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio,
Denis 'GNUtoo' Carikli2186b652013-10-27 15:50:02 +010046 unsigned int gfx);
Denis 'GNUtoo' Cariklied7e29e2013-02-24 12:01:44 +010047
Stefan Reinauer4cc8c702012-04-27 21:34:16 +020048static acpi_cstate_t cst_entries[] = {
49 { 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
50 { 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
51 { 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
Sven Schnelle6eb8bef2011-10-23 16:57:50 +020052};
53
Denis 'GNUtoo' Carikli4062f172013-05-21 03:13:46 +020054#if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE
55static int int15_handler(void)
56{
57 /* The right way to do this is to move this handler code into
58 * the mainboard or northbridge code.
59 * TODO: completely move to mainboards / chipsets.
60 */
61 printk(BIOS_DEBUG, "%s: AX=%04x BX=%04x CX=%04x DX=%04x\n",
62 __func__, X86_AX, X86_BX, X86_CX, X86_DX);
63
64 switch (X86_AX) {
65 case 0x5f35: /* Boot Display */
66 X86_AX = 0x005f; // Success
67 X86_CL = PANEL;
68 break;
69 case 0x5f40: /* Boot Panel Type */
70 X86_AX = 0x005f; // Success
71 X86_CL = 3;
72 printk(BIOS_DEBUG, "DISPLAY=%x\n", X86_CL);
73 break;
74 default:
75 /* Interrupt was not handled */
76 printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", X86_AX);
77 return 0;
78 }
79
80 /* Interrupt handled */
81 return 1;
82}
83#endif
84
Stefan Reinauer4cc8c702012-04-27 21:34:16 +020085int get_cst_entries(acpi_cstate_t **entries)
Sven Schnelle6eb8bef2011-10-23 16:57:50 +020086{
87 *entries = cst_entries;
88 return ARRAY_SIZE(cst_entries);
89}
Sven Schnellee2ca71e2011-02-14 20:02:47 +000090
Peter Stugeeac99162013-07-06 20:05:13 +020091static void mainboard_init(device_t dev)
Sven Schnelleb31eb3e2011-04-05 13:00:14 +000092{
Jonathan A. Kollasch25962832012-07-10 10:14:17 -050093 device_t dev0, idedev, sdhci_dev;
Sven Schnelleb31eb3e2011-04-05 13:00:14 +000094
Sven Schnelle8d0b86c2011-07-11 18:36:16 +020095 ec_clr_bit(0x03, 2);
96
97 if (inb(0x164c) & 0x08) {
98 ec_set_bit(0x03, 2);
99 ec_write(0x0c, 0x88);
100 }
Denis 'GNUtoo' Carikli4062f172013-05-21 03:13:46 +0200101
102#if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE
103 /* Install custom int15 handler for VGA OPROM */
104 mainboard_interrupt_handlers(0x15, &int15_handler);
105#endif
106
Sven Schnelle8099cbf2011-04-04 10:57:17 +0000107 /* If we're resuming from suspend, blink suspend LED */
108 dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
Sven Schnelled8c68a92011-06-15 09:26:34 +0200109 if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
Sven Schnelle8099cbf2011-04-04 10:57:17 +0000110 ec_write(0x0c, 0xc7);
Sven Schnelle50270b82011-04-27 19:48:05 +0000111
112 idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
113 if (idedev && idedev->chip_info && dock_ultrabay_device_present()) {
114 struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
115 config->ide_enable_primary = 1;
116 /* enable Ultrabay power */
117 outb(inb(0x1628) | 0x01, 0x1628);
118 ec_write(0x0c, 0x84);
119 } else {
120 /* disable Ultrabay power */
121 outb(inb(0x1628) & ~0x01, 0x1628);
122 ec_write(0x0c, 0x04);
123 }
Sven Schnelled40d4f772011-06-12 15:08:58 +0200124
Jonathan A. Kollasch25962832012-07-10 10:14:17 -0500125 /* Set SDHCI write protect polarity "SDWPPol" */
126 sdhci_dev = dev_find_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C822, 0);
127 if (sdhci_dev) {
128 if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) {
129 /* unlock */
130 pci_write_config8(sdhci_dev, 0xf9, 0xfc);
131 /* set SDWPPol, keep CLKRUNDis, SDPWRPol clear */
132 pci_write_config8(sdhci_dev, 0xfa, 0x20);
133 /* restore lock */
134 pci_write_config8(sdhci_dev, 0xf9, 0x00);
135 }
136 }
Sven Schnellee2ca71e2011-02-14 20:02:47 +0000137}
138
Peter Stugeb6b3f792013-07-06 20:10:36 +0200139static int mainboard_smbios_data(device_t dev, int *handle, unsigned long *current)
140{
141 int len;
142 char tpec[] = "IBM ThinkPad Embedded Controller -[ ]-";
143 const char *oem_strings[] = {
144 tpec,
145 };
146
147 h8_build_id_and_function_spec_version(tpec + 35, 17);
148 len = smbios_write_type11(current, (*handle)++, oem_strings, ARRAY_SIZE(oem_strings));
149
150 return len;
151}
152
Vladimir Serbinenko63acd222014-06-01 00:26:48 +0200153const char *smbios_mainboard_bios_version(void)
154{
155 /* Satisfy thinkpad_acpi. */
156 if (strlen(CONFIG_LOCALVERSION))
157 return "CBET4000 " CONFIG_LOCALVERSION;
158 else
159 return "CBET4000 " COREBOOT_VERSION;
160}
161
Peter Stugeeac99162013-07-06 20:05:13 +0200162static void mainboard_enable(device_t dev)
163{
164 dev->ops->init = mainboard_init;
Peter Stugeb6b3f792013-07-06 20:10:36 +0200165 dev->ops->get_smbios_data = mainboard_smbios_data;
Peter Stugeeac99162013-07-06 20:05:13 +0200166}
167
Sven Schnellee2ca71e2011-02-14 20:02:47 +0000168struct chip_operations mainboard_ops = {
Sven Schnellee2ca71e2011-02-14 20:02:47 +0000169 .enable_dev = mainboard_enable,
170};
171