Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; version 2 of |
| 10 | * the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, |
| 20 | * MA 02110-1301 USA |
| 21 | */ |
| 22 | |
| 23 | #include <console/console.h> |
| 24 | #include <device/device.h> |
| 25 | #include <arch/io.h> |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 26 | #include <delay.h> |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 27 | #include <device/pci_def.h> |
| 28 | #include <device/pci_ops.h> |
Jonathan A. Kollasch | 2596283 | 2012-07-10 10:14:17 -0500 | [diff] [blame] | 29 | #include <device/pci_ids.h> |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 30 | #include <arch/io.h> |
| 31 | #include <ec/lenovo/pmh7/pmh7.h> |
| 32 | #include <ec/acpi/ec.h> |
Sven Schnelle | ffcd143 | 2011-04-11 19:43:32 +0000 | [diff] [blame] | 33 | #include <ec/lenovo/h8/h8.h> |
Sven Schnelle | 8099cbf | 2011-04-04 10:57:17 +0000 | [diff] [blame] | 34 | #include <northbridge/intel/i945/i945.h> |
Sven Schnelle | d40d4f77 | 2011-06-12 15:08:58 +0200 | [diff] [blame] | 35 | #include <pc80/mc146818rtc.h> |
Sven Schnelle | 50270b8 | 2011-04-27 19:48:05 +0000 | [diff] [blame] | 36 | #include "dock.h" |
Sven Schnelle | 6eb8bef | 2011-10-23 16:57:50 +0200 | [diff] [blame] | 37 | #include <arch/x86/include/arch/acpigen.h> |
| 38 | |
Denis 'GNUtoo' Carikli | ed7e29e | 2013-02-24 12:01:44 +0100 | [diff] [blame^] | 39 | int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio, |
| 40 | unsigned int gfx); |
| 41 | |
Stefan Reinauer | 4cc8c70 | 2012-04-27 21:34:16 +0200 | [diff] [blame] | 42 | static acpi_cstate_t cst_entries[] = { |
| 43 | { 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } }, |
| 44 | { 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } }, |
| 45 | { 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } }, |
Sven Schnelle | 6eb8bef | 2011-10-23 16:57:50 +0200 | [diff] [blame] | 46 | }; |
| 47 | |
Stefan Reinauer | 4cc8c70 | 2012-04-27 21:34:16 +0200 | [diff] [blame] | 48 | int get_cst_entries(acpi_cstate_t **entries) |
Sven Schnelle | 6eb8bef | 2011-10-23 16:57:50 +0200 | [diff] [blame] | 49 | { |
| 50 | *entries = cst_entries; |
| 51 | return ARRAY_SIZE(cst_entries); |
| 52 | } |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 53 | |
Sven Schnelle | b31eb3e | 2011-04-05 13:00:14 +0000 | [diff] [blame] | 54 | static void mainboard_enable(device_t dev) |
| 55 | { |
Jonathan A. Kollasch | 2596283 | 2012-07-10 10:14:17 -0500 | [diff] [blame] | 56 | device_t dev0, idedev, sdhci_dev; |
Sven Schnelle | d40d4f77 | 2011-06-12 15:08:58 +0200 | [diff] [blame] | 57 | u8 defaults_loaded = 0; |
Sven Schnelle | b31eb3e | 2011-04-05 13:00:14 +0000 | [diff] [blame] | 58 | |
Sven Schnelle | 8d0b86c | 2011-07-11 18:36:16 +0200 | [diff] [blame] | 59 | ec_clr_bit(0x03, 2); |
| 60 | |
| 61 | if (inb(0x164c) & 0x08) { |
| 62 | ec_set_bit(0x03, 2); |
| 63 | ec_write(0x0c, 0x88); |
| 64 | } |
Sven Schnelle | 8099cbf | 2011-04-04 10:57:17 +0000 | [diff] [blame] | 65 | /* If we're resuming from suspend, blink suspend LED */ |
| 66 | dev0 = dev_find_slot(0, PCI_DEVFN(0,0)); |
Sven Schnelle | d8c68a9 | 2011-06-15 09:26:34 +0200 | [diff] [blame] | 67 | if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC) |
Sven Schnelle | 8099cbf | 2011-04-04 10:57:17 +0000 | [diff] [blame] | 68 | ec_write(0x0c, 0xc7); |
Sven Schnelle | 50270b8 | 2011-04-27 19:48:05 +0000 | [diff] [blame] | 69 | |
| 70 | idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1)); |
| 71 | if (idedev && idedev->chip_info && dock_ultrabay_device_present()) { |
| 72 | struct southbridge_intel_i82801gx_config *config = idedev->chip_info; |
| 73 | config->ide_enable_primary = 1; |
| 74 | /* enable Ultrabay power */ |
| 75 | outb(inb(0x1628) | 0x01, 0x1628); |
| 76 | ec_write(0x0c, 0x84); |
| 77 | } else { |
| 78 | /* disable Ultrabay power */ |
| 79 | outb(inb(0x1628) & ~0x01, 0x1628); |
| 80 | ec_write(0x0c, 0x04); |
| 81 | } |
Sven Schnelle | d40d4f77 | 2011-06-12 15:08:58 +0200 | [diff] [blame] | 82 | |
Jonathan A. Kollasch | 2596283 | 2012-07-10 10:14:17 -0500 | [diff] [blame] | 83 | /* Set SDHCI write protect polarity "SDWPPol" */ |
| 84 | sdhci_dev = dev_find_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C822, 0); |
| 85 | if (sdhci_dev) { |
| 86 | if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) { |
| 87 | /* unlock */ |
| 88 | pci_write_config8(sdhci_dev, 0xf9, 0xfc); |
| 89 | /* set SDWPPol, keep CLKRUNDis, SDPWRPol clear */ |
| 90 | pci_write_config8(sdhci_dev, 0xfa, 0x20); |
| 91 | /* restore lock */ |
| 92 | pci_write_config8(sdhci_dev, 0xf9, 0x00); |
| 93 | } |
| 94 | } |
| 95 | |
Sven Schnelle | d40d4f77 | 2011-06-12 15:08:58 +0200 | [diff] [blame] | 96 | if (get_option(&defaults_loaded, "cmos_defaults_loaded") < 0) { |
| 97 | printk(BIOS_INFO, "failed to get cmos_defaults_loaded"); |
| 98 | defaults_loaded = 0; |
| 99 | } |
| 100 | |
| 101 | if (!defaults_loaded) { |
| 102 | printk(BIOS_INFO, "Restoring CMOS defaults\n"); |
| 103 | set_option("tft_brightness", &(u8[]){ 0xff }); |
| 104 | set_option("volume", &(u8[]){ 0x03 }); |
Sven Schnelle | 2c1f4d2 | 2011-11-28 21:12:11 +0100 | [diff] [blame] | 105 | /* set baudrate to 115200 baud */ |
Sven Schnelle | 247c727 | 2012-01-31 12:33:01 +0100 | [diff] [blame] | 106 | set_option("baud_rate", &(u8[]){ 0x00 }); |
Sven Schnelle | 2c1f4d2 | 2011-11-28 21:12:11 +0100 | [diff] [blame] | 107 | /* set default debug_level (DEFAULT_CONSOLE_LOGLEVEL starts at 1) */ |
| 108 | set_option("debug_level", &(u8[]) { CONFIG_DEFAULT_CONSOLE_LOGLEVEL+1 }); |
Sven Schnelle | d40d4f77 | 2011-06-12 15:08:58 +0200 | [diff] [blame] | 109 | set_option("cmos_defaults_loaded", &(u8[]){ 0x01 }); |
| 110 | } |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 111 | } |
| 112 | |
| 113 | struct chip_operations mainboard_ops = { |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 114 | .enable_dev = mainboard_enable, |
| 115 | }; |
| 116 | |