Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
| 6 | #include <device/pci_ids.h> |
| 7 | #include <device/pci_ops.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 8 | #include <device/mmio.h> |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 9 | #include <delay.h> |
Vladimir Serbinenko | 75c8387 | 2014-09-05 01:01:31 +0200 | [diff] [blame] | 10 | #include <device/azalia_device.h> |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 11 | #include "chip.h" |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 12 | #include "i82801ix.h" |
| 13 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 14 | static int codec_detect(u8 *base) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 15 | { |
| 16 | u32 reg32; |
| 17 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 18 | /* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ |
Angel Pons | 61dd836 | 2020-12-05 18:02:32 +0100 | [diff] [blame^] | 19 | if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 20 | goto no_codec; |
| 21 | |
| 22 | /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ |
Angel Pons | 61dd836 | 2020-12-05 18:02:32 +0100 | [diff] [blame^] | 23 | if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 24 | goto no_codec; |
| 25 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 26 | /* Read in Codec location (BAR + 0xe)[2..0] */ |
Elyes HAOUAS | e5954ba | 2020-08-03 15:35:47 +0200 | [diff] [blame] | 27 | reg32 = read32(base + HDA_STATESTS_REG); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 28 | reg32 &= 0x0f; |
| 29 | if (!reg32) |
| 30 | goto no_codec; |
| 31 | |
| 32 | return reg32; |
| 33 | |
| 34 | no_codec: |
| 35 | /* Codec Not found */ |
| 36 | /* Put HDA back in reset (BAR + 0x8) [0] */ |
Angel Pons | 61dd836 | 2020-12-05 18:02:32 +0100 | [diff] [blame^] | 37 | azalia_set_bits(base + HDA_GCTL_REG, 1, 0); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 38 | printk(BIOS_DEBUG, "Azalia: No codec!\n"); |
| 39 | return 0; |
| 40 | } |
| 41 | |
Elyes HAOUAS | e414a4e | 2019-01-03 10:40:43 +0100 | [diff] [blame] | 42 | static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 43 | { |
Angel Pons | c9d6333 | 2020-06-21 15:38:29 +0200 | [diff] [blame] | 44 | int idx = 0; |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 45 | |
| 46 | while (idx < (cim_verb_data_size / sizeof(u32))) { |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 47 | u32 verb_size = 4 * cim_verb_data[idx + 2]; // in u32 |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 48 | if (cim_verb_data[idx] != viddid) { |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 49 | idx += verb_size + 3; // skip verb + header |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 50 | continue; |
| 51 | } |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 52 | *verb = &cim_verb_data[idx + 3]; |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 53 | return verb_size; |
| 54 | } |
| 55 | |
| 56 | /* Not all codecs need to load another verb */ |
| 57 | return 0; |
| 58 | } |
| 59 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 60 | /* |
| 61 | * Wait 50usec for the codec to indicate it is ready. |
| 62 | * No response would imply that the codec is non-operative. |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 63 | */ |
| 64 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 65 | static int wait_for_ready(u8 *base) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 66 | { |
Angel Pons | c9d6333 | 2020-06-21 15:38:29 +0200 | [diff] [blame] | 67 | /* Use a 50 usec timeout - the Linux kernel uses the same duration */ |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 68 | int timeout = 50; |
| 69 | |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 70 | while (timeout--) { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 71 | u32 reg32 = read32(base + HDA_ICII_REG); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 72 | if (!(reg32 & HDA_ICII_BUSY)) |
| 73 | return 0; |
| 74 | udelay(1); |
| 75 | } |
| 76 | |
| 77 | return -1; |
| 78 | } |
| 79 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 80 | /* |
| 81 | * Wait 50usec for the codec to indicate that it accepted the previous command. |
| 82 | * No response would imply that the code is non-operative. |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 83 | */ |
| 84 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 85 | static int wait_for_valid(u8 *base) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 86 | { |
| 87 | u32 reg32; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 88 | /* Use a 50 usec timeout - the Linux kernel uses the same duration */ |
| 89 | int timeout = 50; |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 90 | |
| 91 | /* Send the verb to the codec */ |
Elyes HAOUAS | e5954ba | 2020-08-03 15:35:47 +0200 | [diff] [blame] | 92 | reg32 = read32(base + HDA_ICII_REG); |
| 93 | reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; |
| 94 | write32(base + HDA_ICII_REG, reg32); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 95 | |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 96 | while (timeout--) { |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 97 | reg32 = read32(base + HDA_ICII_REG); |
Angel Pons | c9d6333 | 2020-06-21 15:38:29 +0200 | [diff] [blame] | 98 | if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 99 | return 0; |
| 100 | udelay(1); |
| 101 | } |
| 102 | |
| 103 | return -1; |
| 104 | } |
| 105 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 106 | static void codec_init(struct device *dev, u8 *base, int addr) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 107 | { |
| 108 | u32 reg32; |
| 109 | const u32 *verb; |
| 110 | u32 verb_size; |
| 111 | int i; |
| 112 | |
Angel Pons | aaa8ab7 | 2020-06-21 15:33:24 +0200 | [diff] [blame] | 113 | printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 114 | |
| 115 | /* 1 */ |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 116 | if (wait_for_ready(base) < 0) { |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 117 | printk(BIOS_DEBUG, " codec not ready.\n"); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 118 | return; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 119 | } |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 120 | |
| 121 | reg32 = (addr << 28) | 0x000f0000; |
Elyes HAOUAS | e5954ba | 2020-08-03 15:35:47 +0200 | [diff] [blame] | 122 | write32(base + HDA_IC_REG, reg32); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 123 | |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 124 | if (wait_for_valid(base) < 0) { |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 125 | printk(BIOS_DEBUG, " codec not valid.\n"); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 126 | return; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 127 | } |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 128 | |
| 129 | /* 2 */ |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 130 | reg32 = read32(base + HDA_IR_REG); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 131 | printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32); |
| 132 | verb_size = find_verb(dev, reg32, &verb); |
| 133 | |
| 134 | if (!verb_size) { |
| 135 | printk(BIOS_DEBUG, "Azalia: No verb!\n"); |
| 136 | return; |
| 137 | } |
| 138 | printk(BIOS_DEBUG, "Azalia: verb_size: %d\n", verb_size); |
| 139 | |
| 140 | /* 3 */ |
| 141 | for (i = 0; i < verb_size; i++) { |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 142 | if (wait_for_ready(base) < 0) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 143 | return; |
| 144 | |
Elyes HAOUAS | e5954ba | 2020-08-03 15:35:47 +0200 | [diff] [blame] | 145 | write32(base + HDA_IC_REG, verb[i]); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 146 | |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 147 | if (wait_for_valid(base) < 0) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 148 | return; |
| 149 | } |
| 150 | printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); |
| 151 | } |
| 152 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 153 | static void codecs_init(struct device *dev, u8 *base, u32 codec_mask) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 154 | { |
| 155 | int i; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 156 | |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 157 | for (i = 2; i >= 0; i--) { |
| 158 | if (codec_mask & (1 << i)) |
| 159 | codec_init(dev, base, i); |
| 160 | } |
| 161 | |
| 162 | for (i = 0; i < pc_beep_verbs_size; i++) { |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 163 | if (wait_for_ready(base) < 0) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 164 | return; |
| 165 | |
Elyes HAOUAS | e5954ba | 2020-08-03 15:35:47 +0200 | [diff] [blame] | 166 | write32(base + HDA_IC_REG, pc_beep_verbs[i]); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 167 | |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 168 | if (wait_for_valid(base) < 0) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 169 | return; |
| 170 | } |
| 171 | } |
| 172 | |
| 173 | static void azalia_init(struct device *dev) |
| 174 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 175 | u8 *base; |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 176 | struct resource *res; |
| 177 | u32 codec_mask; |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 178 | |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 179 | // ESD |
Angel Pons | 6740647 | 2020-06-08 11:13:42 +0200 | [diff] [blame] | 180 | pci_update_config32(dev, 0x134, ~0x00ff0000, 2 << 16); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 181 | |
| 182 | // Link1 description |
Angel Pons | 6740647 | 2020-06-08 11:13:42 +0200 | [diff] [blame] | 183 | pci_update_config32(dev, 0x140, ~0x00ff0000, 2 << 16); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 184 | |
| 185 | // Port VC0 Resource Control Register |
Angel Pons | 6740647 | 2020-06-08 11:13:42 +0200 | [diff] [blame] | 186 | pci_update_config32(dev, 0x114, ~0x000000ff, 1); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 187 | |
| 188 | // VCi traffic class |
Angel Pons | 6740647 | 2020-06-08 11:13:42 +0200 | [diff] [blame] | 189 | pci_or_config8(dev, 0x44, 7 << 0); // TC7 |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 190 | |
| 191 | // VCi Resource Control |
Angel Pons | 6740647 | 2020-06-08 11:13:42 +0200 | [diff] [blame] | 192 | pci_or_config32(dev, 0x120, (1 << 31) | (1 << 24) | (0x80 << 0)); /* VCi ID and map */ |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 193 | |
| 194 | /* Set Bus Master */ |
Elyes HAOUAS | b9d2e22 | 2020-04-28 10:25:12 +0200 | [diff] [blame] | 195 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 196 | |
Angel Pons | 6740647 | 2020-06-08 11:13:42 +0200 | [diff] [blame] | 197 | // Docking not supported |
| 198 | pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 199 | |
| 200 | /* Lock some R/WO bits by writing their current value. */ |
Angel Pons | 6740647 | 2020-06-08 11:13:42 +0200 | [diff] [blame] | 201 | pci_update_config32(dev, 0x74, ~0, 0); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 202 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 203 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 204 | if (!res) |
| 205 | return; |
| 206 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 207 | // NOTE this will break as soon as the Azalia get's a bar above 4G. |
| 208 | // Is there anything we can do about it? |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 209 | base = res2mmio(res, 0, 0); |
Patrick Rudolph | 4af2add | 2018-11-26 15:56:11 +0100 | [diff] [blame] | 210 | printk(BIOS_DEBUG, "Azalia: base = %p\n", base); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 211 | codec_mask = codec_detect(base); |
| 212 | |
| 213 | if (codec_mask) { |
| 214 | printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask); |
| 215 | codecs_init(dev, base, codec_mask); |
| 216 | } |
| 217 | } |
| 218 | |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 219 | static struct device_operations azalia_ops = { |
| 220 | .read_resources = pci_dev_read_resources, |
| 221 | .set_resources = pci_dev_set_resources, |
| 222 | .enable_resources = pci_dev_enable_resources, |
| 223 | .init = azalia_init, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 224 | .ops_pci = &pci_dev_ops_pci, |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 225 | }; |
| 226 | |
| 227 | /* ICH9DH/ICH9DO/ICH9R/ICH9/ICH9M-E/ICH9M */ |
| 228 | static const struct pci_driver i82801ix_azalia __pci_driver = { |
| 229 | .ops = &azalia_ops, |
| 230 | .vendor = PCI_VENDOR_ID_INTEL, |
Felix Singer | 7f8b0cd8 | 2019-11-10 11:04:08 +0100 | [diff] [blame] | 231 | .device = PCI_DEVICE_ID_INTEL_82801IB_HD_AUDIO, |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 232 | }; |