Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 1 | /* |
| 2 | ***************************************************************************** |
| 3 | * |
| 4 | * This file is part of the coreboot project. |
| 5 | * |
| 6 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 20 | * *************************************************************************** |
| 21 | * |
| 22 | */ |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 23 | |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 24 | #ifndef _AMD_SBPLATFORM_H_ |
| 25 | #define _AMD_SBPLATFORM_H_ |
| 26 | |
| 27 | //#include "cbtypes.h" |
| 28 | #ifdef NULL |
| 29 | #undef NULL |
| 30 | #endif |
| 31 | #define NULL 0 |
| 32 | |
| 33 | typedef unsigned long long PLACEHOLDER; |
| 34 | |
| 35 | #ifndef SBOEM_ACPI_RESTORE_SWSMI |
| 36 | #define SBOEM_BEFORE_PCI_RESTORE_SWSMI 0xD3 |
| 37 | #define SBOEM_AFTER_PCI_RESTORE_SWSMI 0xD4 |
| 38 | #endif |
| 39 | |
| 40 | #ifndef _AMD_NB_CIM_X_PROTOCOL_H_ |
| 41 | |
| 42 | /* |
| 43 | /// Extended PCI Address |
| 44 | typedef struct _EXT_PCI_ADDR { |
| 45 | UINT32 Reg :16; ///< / PCI Register |
| 46 | UINT32 Func:3; ///< / PCI Function |
| 47 | UINT32 Dev :5; ///< / PCI Device |
| 48 | UINT32 Bus :8; ///< / PCI Address |
| 49 | } EXT_PCI_ADDR; |
| 50 | |
| 51 | /// PCI Address |
| 52 | typedef union _PCI_ADDR { |
| 53 | UINT32 ADDR; ///< / 32 bit Address |
| 54 | EXT_PCI_ADDR Addr; ///< / Extended PCI Address |
| 55 | } PCI_ADDR; |
| 56 | */ |
| 57 | #endif |
| 58 | #define FIXUP_PTR(ptr) ptr |
| 59 | |
Martin Roth | e899e51 | 2012-12-05 16:07:11 -0700 | [diff] [blame] | 60 | #if CONFIG_SB800_IMC_FWM |
| 61 | #define IMC_ENABLE_OVER_WRITE 0x01 |
| 62 | #endif |
| 63 | |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 64 | #include <console/console.h> |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 65 | #include "AmdSbLib.h" |
| 66 | #include "Amd.h" |
| 67 | #include "SB800.h" |
| 68 | #include "SBTYPE.h" |
| 69 | #include "ACPILIB.h" |
| 70 | #include "SBDEF.h" |
| 71 | #include "AMDSBLIB.h" |
| 72 | #include "SBSUBFUN.h" |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 73 | #include "platform_cfg.h" /* mainboard specific configuration */ |
| 74 | #include "OEM.h" /* platform default configuration */ |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 75 | #include "AMD.h" |
| 76 | |
| 77 | |
| 78 | //------------------------------------------------------------------------------------------------------------------------// |
| 79 | /** |
| 80 | * SB_CIMx_PARAMETER 0 1 2 Defult Value When CIMx Take over |
| 81 | * SpreadSpectrum CIMx take over User (Setup Option) User (Setup Option) Enable |
| 82 | * SpreadSpectrumType CIMx take over User (Setup Option) User (Setup Option) Normal |
| 83 | * HpetTimer CIMx take over User (Setup Option) User (Setup Option) Enable |
| 84 | * HpetMsiDis CIMx take over User (Setup Option) User (Setup Option) Enable (0x00) |
| 85 | * IrConfig CIMx take over User (Setup Option) User (Setup Option) Disable (0x00) |
| 86 | * SpiFastReadEnable CIMx take over User (Setup Option) User (Setup Option) Disable |
| 87 | * SpiFastReadSpeed CIMx take over User (Setup Option) User (Setup Option) Disable (NULL) |
| 88 | * NbSbGen2 CIMx take over User (Setup Option) User (Setup Option) Enable |
| 89 | * AlinkPhyPllPowerDown CIMx take over User (Setup Option) User (Setup Option) Enable |
| 90 | * ResetCpuOnSyncFlood CIMx take over User (Setup Option) User (Setup Option) Enable |
| 91 | * GppGen2 CIMx take over User (Setup Option) User (Setup Option) Disable |
| 92 | * GppMemWrImprove CIMx take over User (Setup Option) User (Setup Option) Enable |
| 93 | * GppPortAspm CIMx take over User (Setup Option) User (Setup Option) Disable |
| 94 | * GppLaneReversal CIMx take over User (Setup Option) User (Setup Option) Disable |
| 95 | * GppPhyPllPowerDown CIMx take over User (Setup Option) User (Setup Option) Enable |
| 96 | * UsbPhyPowerDown CIMx take over User (Setup Option) User (Setup Option) Disable |
| 97 | * SBGecDebugBus CIMx take over User (Setup Option) User (Setup Option) Disable |
| 98 | * SBGecPwr CIMx take over User (Setup Option) User (Setup Option) Nerver Power down (0x11) |
| 99 | * SataSetMaxGen2 CIMx take over User (Setup Option) User (Setup Option) Max Gen3 (0x00) |
| 100 | * SataClkMode CIMx take over User (Setup Option) User (Setup Option) 0x90 int. 100Mhz |
| 101 | * SataAggrLinkPmCap CIMx take over User (Setup Option) User (Setup Option) Enable |
| 102 | * SataPortMultCap CIMx take over User (Setup Option) User (Setup Option) Enable |
| 103 | * SataPscCap CIMx take over User (Setup Option) User (Setup Option) Enable (0x00) |
| 104 | * SataSscCap CIMx take over User (Setup Option) User (Setup Option) Enable (0x00) |
| 105 | * SataFisBasedSwitching CIMx take over User (Setup Option) User (Setup Option) Disable |
| 106 | * SataCccSupport CIMx take over User (Setup Option) User (Setup Option) Disable |
| 107 | * SataMsiCapability CIMx take over User (Setup Option) User (Setup Option) Enable |
| 108 | * SataClkAutoOff CIMx take over User (Setup Option) User (Setup Option) Disable |
| 109 | * AcDcMsg CIMx take over User (Setup Option) User (Setup Option) Disable |
| 110 | * TimerTickTrack CIMx take over User (Setup Option) User (Setup Option) Disable |
| 111 | * ClockInterruptTag CIMx take over User (Setup Option) User (Setup Option) Disable |
| 112 | * OhciTrafficHanding CIMx take over User (Setup Option) User (Setup Option) Disable |
| 113 | * EhciTrafficHanding CIMx take over User (Setup Option) User (Setup Option) Disable |
| 114 | * FusionMsgCMultiCore CIMx take over User (Setup Option) User (Setup Option) Disable |
| 115 | * FusionMsgCStage CIMx take over User (Setup Option) User (Setup Option) Disable |
| 116 | */ |
| 117 | #define SB_CIMx_PARAMETER 0x02 |
| 118 | |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 119 | // Generic |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 120 | #define cimSpreadSpectrumDefault TRUE |
| 121 | #define cimSpreadSpectrumTypeDefault 0x00 // Normal |
| 122 | #define cimHpetTimerDefault TRUE |
| 123 | #define cimHpetMsiDisDefault FALSE // Enable |
| 124 | #define cimIrConfigDefault 0x00 // Disable |
Scott Duplichan | e78ae24 | 2011-05-15 21:18:59 +0000 | [diff] [blame] | 125 | #define cimSpiFastReadEnableDefault 0x01 // Enable |
| 126 | #define cimSpiFastReadSpeedDefault 0x01 // 33 MHz |
Kerry She | 6209c82 | 2011-08-18 18:44:00 +0800 | [diff] [blame] | 127 | #define cimSioHwmPortEnableDefault FALSE |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 128 | // GPP/AB Controller |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 129 | #define cimNbSbGen2Default TRUE |
| 130 | #define cimAlinkPhyPllPowerDownDefault TRUE |
| 131 | #define cimResetCpuOnSyncFloodDefault TRUE |
| 132 | #define cimGppGen2Default FALSE |
| 133 | #define cimGppMemWrImproveDefault TRUE |
| 134 | #define cimGppPortAspmDefault FALSE |
| 135 | #define cimGppLaneReversalDefault FALSE |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 136 | #define cimGppPhyPllPowerDownDefault TRUE |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 137 | // USB Controller |
| 138 | #define cimUsbPhyPowerDownDefault FALSE |
| 139 | // GEC Controller |
| 140 | #define cimSBGecDebugBusDefault FALSE |
| 141 | #define cimSBGecPwrDefault 0x03 |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 142 | // Sata Controller |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 143 | #define cimSataSetMaxGen2Default 0x00 |
| 144 | #define cimSATARefClkSelDefault 0x10 |
| 145 | #define cimSATARefDivSelDefault 0x80 |
| 146 | #define cimSataAggrLinkPmCapDefault TRUE |
| 147 | #define cimSataPortMultCapDefault TRUE |
| 148 | #define cimSataPscCapDefault 0x00 // Enable |
| 149 | #define cimSataSscCapDefault 0x00 // Enable |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 150 | #define cimSataFisBasedSwitchingDefault FALSE |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 151 | #define cimSataCccSupportDefault FALSE |
| 152 | #define cimSataClkAutoOffDefault FALSE |
| 153 | #define cimNativepciesupportDefault FALSE |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 154 | // Fusion Related |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 155 | #define cimAcDcMsgDefault FALSE |
| 156 | #define cimTimerTickTrackDefault FALSE |
| 157 | #define cimClockInterruptTagDefault FALSE |
| 158 | #define cimOhciTrafficHandingDefault FALSE |
| 159 | #define cimEhciTrafficHandingDefault FALSE |
| 160 | #define cimFusionMsgCMultiCoreDefault FALSE |
| 161 | #define cimFusionMsgCStageDefault FALSE |
Stefan Reinauer | 971ebd8 | 2011-10-13 17:26:43 -0700 | [diff] [blame] | 162 | |
| 163 | #include "vendorcode/amd/cimx/sb800/AMDSBLIB.h" |
| 164 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 165 | #if CONFIG_HAVE_ACPI_RESUME |
Zheng Bao | 600784e | 2013-02-07 17:30:23 +0800 | [diff] [blame^] | 166 | #include <spi-generic.h> |
zbao | 01bd79f | 2012-03-23 11:36:08 +0800 | [diff] [blame] | 167 | #endif |
| 168 | |
zbao | 9bcdbf8 | 2012-04-05 13:18:49 +0800 | [diff] [blame] | 169 | #define BIOSRAM_INDEX 0xcd4 |
| 170 | #define BIOSRAM_DATA 0xcd5 |
| 171 | |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 172 | #endif // _AMD_SBPLATFORM_H_ |