Configure CIMx to use 33 MHz fast mode for SPD read.
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6576 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h
index 7efa5ec..93e1c31 100644
--- a/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h
+++ b/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h
@@ -116,8 +116,8 @@
#define cimHpetTimerDefault TRUE
#define cimHpetMsiDisDefault FALSE // Enable
#define cimIrConfigDefault 0x00 // Disable
-#define cimSpiFastReadEnableDefault 0x00 // Disable
-#define cimSpiFastReadSpeedDefault 0x00 // NULL
+#define cimSpiFastReadEnableDefault 0x01 // Enable
+#define cimSpiFastReadSpeedDefault 0x01 // 33 MHz
// GPP/AB Controller
#define cimNbSbGen2Default TRUE
#define cimAlinkPhyPllPowerDownDefault TRUE