Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 4 | * Copyright (C) 2017-2018 Intel Corp. |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <device/pci_ids.h> |
Shaunak Saha | bd42780 | 2017-07-18 00:19:33 -0700 | [diff] [blame] | 20 | #include <intelblocks/acpi.h> |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 21 | #include <intelblocks/lpc_lib.h> |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 22 | #include <soc/pm.h> |
| 23 | |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 24 | /* SoC overrides */ |
| 25 | |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 26 | /* Common weak definition, needs to be implemented in each soc LPC driver. */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 27 | __weak void lpc_soc_init(struct device *dev) |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 28 | { |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 29 | /* no-op */ |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 30 | } |
| 31 | |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 32 | /* Fill up LPC IO resource structure inside SoC directory */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 33 | __weak void pch_lpc_soc_fill_io_resources(struct device *dev) |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 34 | { |
| 35 | /* no-op */ |
| 36 | } |
| 37 | |
| 38 | void pch_lpc_add_new_resource(struct device *dev, uint8_t offset, |
| 39 | uintptr_t base, size_t size, unsigned long flags) |
| 40 | { |
| 41 | struct resource *res; |
| 42 | res = new_resource(dev, offset); |
| 43 | res->base = base; |
| 44 | res->size = size; |
| 45 | res->flags = flags; |
| 46 | } |
| 47 | |
Elyes HAOUAS | 4a13126 | 2018-09-16 17:35:48 +0200 | [diff] [blame] | 48 | static void pch_lpc_add_io_resources(struct device *dev) |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 49 | { |
| 50 | /* Add the default claimed legacy IO range for the LPC device. */ |
| 51 | pch_lpc_add_new_resource(dev, 0, 0, 0x1000, IORESOURCE_IO | |
| 52 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED); |
| 53 | |
| 54 | /* SoC IO resource overrides */ |
| 55 | pch_lpc_soc_fill_io_resources(dev); |
| 56 | } |
| 57 | |
Elyes HAOUAS | 4a13126 | 2018-09-16 17:35:48 +0200 | [diff] [blame] | 58 | static void pch_lpc_read_resources(struct device *dev) |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 59 | { |
| 60 | /* Get the PCI resources of this device. */ |
| 61 | pci_dev_read_resources(dev); |
| 62 | |
| 63 | /* Add IO resources to LPC. */ |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 64 | pch_lpc_add_io_resources(dev); |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 65 | } |
| 66 | |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 67 | static void pch_lpc_set_child_resources(struct device *dev); |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 68 | |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 69 | static void pch_lpc_loop_resources(struct device *dev) |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 70 | { |
| 71 | struct resource *res; |
| 72 | |
| 73 | for (res = dev->resource_list; res; res = res->next) { |
| 74 | if (res->flags & IORESOURCE_IO) |
| 75 | lpc_open_pmio_window(res->base, res->size); |
| 76 | |
| 77 | if (res->flags & IORESOURCE_MEM) { |
| 78 | /* Check if this is already decoded. */ |
| 79 | if (lpc_fits_fixed_mmio_window(res->base, res->size)) |
| 80 | continue; |
| 81 | |
| 82 | lpc_open_mmio_window(res->base, res->size); |
| 83 | } |
| 84 | } |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 85 | pch_lpc_set_child_resources(dev); |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | /* |
| 89 | * Loop through all the child devices' resources, and open up windows to the |
| 90 | * LPC bus, as appropriate. |
| 91 | */ |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 92 | static void pch_lpc_set_child_resources(struct device *dev) |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 93 | { |
| 94 | struct bus *link; |
| 95 | struct device *child; |
| 96 | |
| 97 | for (link = dev->link_list; link; link = link->next) { |
| 98 | for (child = link->children; child; child = child->sibling) |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 99 | pch_lpc_loop_resources(child); |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 100 | } |
| 101 | } |
| 102 | |
Elyes HAOUAS | 4a13126 | 2018-09-16 17:35:48 +0200 | [diff] [blame] | 103 | static void pch_lpc_set_resources(struct device *dev) |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 104 | { |
| 105 | pci_dev_set_resources(dev); |
| 106 | |
| 107 | /* Now open up windows to devices which have declared resources. */ |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 108 | pch_lpc_set_child_resources(dev); |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 109 | } |
| 110 | |
| 111 | static struct device_operations device_ops = { |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 112 | .read_resources = pch_lpc_read_resources, |
| 113 | .set_resources = pch_lpc_set_resources, |
Subrata Banik | 6bbc91a | 2017-12-07 14:55:51 +0530 | [diff] [blame] | 114 | .enable_resources = pci_dev_enable_resources, |
| 115 | .write_acpi_tables = southbridge_write_acpi_tables, |
| 116 | .acpi_inject_dsdt_generator = southbridge_inject_dsdt, |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 117 | .init = lpc_soc_init, |
Subrata Banik | 6bbc91a | 2017-12-07 14:55:51 +0530 | [diff] [blame] | 118 | .scan_bus = scan_lpc_bus, |
| 119 | .ops_pci = &pci_dev_ops_pci, |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 120 | }; |
| 121 | |
| 122 | static const unsigned short pci_device_ids[] = { |
| 123 | PCI_DEVICE_ID_INTEL_SPT_LP_SAMPLE, |
| 124 | PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE, |
| 125 | PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM, |
| 126 | PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, |
V Sowmya | 7c15047 | 2018-01-23 14:44:45 +0530 | [diff] [blame] | 127 | PCI_DEVICE_ID_INTEL_SPT_H_C236, |
| 128 | PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM, |
| 129 | PCI_DEVICE_ID_INTEL_SPT_H_QM170, |
Praveen hodagatta pranesh | 523d669 | 2018-11-03 01:21:14 +0800 | [diff] [blame^] | 130 | PCI_DEVICE_ID_INTEL_SPT_H_HM175, |
| 131 | PCI_DEVICE_ID_INTEL_SPT_H_QM175, |
| 132 | PCI_DEVICE_ID_INTEL_SPT_H_CM238, |
V Sowmya | acc2a48 | 2018-01-23 15:27:23 +0530 | [diff] [blame] | 133 | PCI_DEVICE_ID_INTEL_KBP_H_Q270, |
Gaggery Tsai | e415a4c | 2018-03-21 22:36:18 +0800 | [diff] [blame] | 134 | PCI_DEVICE_ID_INTEL_KBP_H_H270, |
| 135 | PCI_DEVICE_ID_INTEL_KBP_H_Z270, |
| 136 | PCI_DEVICE_ID_INTEL_KBP_H_Q250, |
| 137 | PCI_DEVICE_ID_INTEL_KBP_H_B250, |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 138 | PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, |
| 139 | PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, |
Gaggery Tsai | e2592be | 2017-09-20 22:46:39 +0800 | [diff] [blame] | 140 | PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22, |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 141 | PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU, |
| 142 | PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM, |
| 143 | PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM, |
| 144 | PCI_DEVICE_ID_INTEL_APL_LPC, |
| 145 | PCI_DEVICE_ID_INTEL_GLK_LPC, |
Bora Guvendik | 94aed8d | 2017-11-03 12:40:25 -0700 | [diff] [blame] | 146 | PCI_DEVICE_ID_INTEL_GLK_ESPI, |
Lijian Zhao | f7bcc18 | 2017-09-25 23:58:39 -0700 | [diff] [blame] | 147 | PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC, |
| 148 | PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC, |
Bora Guvendik | a0e0b05 | 2017-09-15 16:52:05 -0700 | [diff] [blame] | 149 | PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC, |
praveen hodagatta pranesh | e26c4a4 | 2018-09-20 03:49:45 +0800 | [diff] [blame] | 150 | PCI_DEVICE_ID_INTEL_CNP_H_LPC_Q370, |
| 151 | PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370, |
Aamir Bohra | 9eac039 | 2018-06-30 12:07:04 +0530 | [diff] [blame] | 152 | PCI_DEVICE_ID_INTEL_ICL_BASE_U_LPC, |
| 153 | PCI_DEVICE_ID_INTEL_ICL_BASE_Y_LPC, |
| 154 | PCI_DEVICE_ID_INTEL_ICL_U_PREMIUM_LPC, |
| 155 | PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_LPC, |
| 156 | PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_LPC_REV0, |
| 157 | PCI_DEVICE_ID_INTEL_ICL_SUPER_Y_LPC, |
| 158 | PCI_DEVICE_ID_INTEL_ICL_Y_PREMIUM_LPC, |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 159 | 0 |
| 160 | }; |
| 161 | |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 162 | static const struct pci_driver pch_lpc __pci_driver = { |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 163 | .ops = &device_ops, |
| 164 | .vendor = PCI_VENDOR_ID_INTEL, |
| 165 | .devices = pci_device_ids, |
| 166 | }; |