Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2016 Rockchip Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <arch/cache.h> |
| 17 | #include <arch/mmu.h> |
| 18 | #include <arch/io.h> |
| 19 | #include <console/console.h> |
| 20 | #include <device/device.h> |
| 21 | #include <delay.h> |
| 22 | #include <edid.h> |
| 23 | #include <gpio.h> |
| 24 | #include <stdlib.h> |
| 25 | #include <stddef.h> |
| 26 | #include <string.h> |
| 27 | #include <soc/addressmap.h> |
| 28 | #include <soc/clock.h> |
| 29 | #include <soc/display.h> |
| 30 | #include <soc/edp.h> |
| 31 | #include <soc/gpio.h> |
| 32 | #include <soc/grf.h> |
| 33 | #include <soc/mmu_operations.h> |
| 34 | #include <soc/soc.h> |
| 35 | #include <soc/vop.h> |
| 36 | |
| 37 | #include "chip.h" |
| 38 | |
Martin Roth | e4b9af1 | 2016-11-29 10:50:52 -0700 | [diff] [blame] | 39 | static void reset_edp(void) |
| 40 | { |
| 41 | /* rst edp */ |
| 42 | write32(&cru_ptr->softrst_con[17], |
| 43 | RK_SETBITS(1 << 12 | 1 << 13)); |
| 44 | udelay(1); |
| 45 | write32(&cru_ptr->softrst_con[17], |
| 46 | RK_CLRBITS(1 << 12 | 1 << 13)); |
| 47 | printk(BIOS_WARNING, "Retrying epd initialization.\n"); |
| 48 | } |
| 49 | |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 50 | void rk_display_init(device_t dev) |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 51 | { |
| 52 | struct edid edid; |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 53 | struct soc_rockchip_rk3399_config *conf = dev->chip_info; |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 54 | enum vop_modes detected_mode = VOP_MODE_UNKNOWN; |
Lin Huang | 079b5c6 | 2016-11-21 17:35:20 +0800 | [diff] [blame] | 55 | int retry_count = 0; |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 56 | |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 57 | /* let's use vop0 in rk3399 */ |
| 58 | uint32_t vop_id = 0; |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 59 | |
| 60 | switch (conf->vop_mode) { |
| 61 | case VOP_MODE_NONE: |
| 62 | return; |
| 63 | case VOP_MODE_AUTO_DETECT: |
| 64 | /* try EDP first, then HDMI */ |
| 65 | case VOP_MODE_EDP: |
| 66 | printk(BIOS_DEBUG, "Attempting to set up EDP display.\n"); |
Julius Werner | 8e42bd1c | 2016-11-01 15:24:54 -0700 | [diff] [blame] | 67 | rkclk_configure_vop_aclk(vop_id, 200 * MHz); |
Lin Huang | 4ecccff | 2017-01-18 09:44:34 +0800 | [diff] [blame^] | 68 | rkclk_configure_edp(25 * MHz); |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 69 | |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 70 | /* select edp signal from vop0 */ |
| 71 | write32(&rk3399_grf->soc_con20, RK_CLRBITS(1 << 5)); |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 72 | |
| 73 | /* select edp clk from SoC internal 24M crystal, otherwise, |
| 74 | * it will source from edp's 24M clock (that depends on |
| 75 | * edp vendor, could be unstable) |
| 76 | */ |
| 77 | write32(&rk3399_grf->soc_con25, RK_SETBITS(1 << 11)); |
| 78 | |
Lin Huang | 079b5c6 | 2016-11-21 17:35:20 +0800 | [diff] [blame] | 79 | retry_edp: |
Martin Roth | e4b9af1 | 2016-11-29 10:50:52 -0700 | [diff] [blame] | 80 | while (retry_count++ < 3) { |
| 81 | rk_edp_init(); |
| 82 | if (rk_edp_get_edid(&edid) == 0) { |
| 83 | detected_mode = VOP_MODE_EDP; |
| 84 | break; |
| 85 | } |
| 86 | if (retry_count == 3) { |
| 87 | printk(BIOS_WARNING, "Warning: epd initialization failed.\n"); |
| 88 | return; |
| 89 | } else { |
| 90 | reset_edp(); |
| 91 | } |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 92 | } |
Martin Roth | e4b9af1 | 2016-11-29 10:50:52 -0700 | [diff] [blame] | 93 | break; |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 94 | case VOP_MODE_HDMI: |
| 95 | printk(BIOS_WARNING, "HDMI display is NOT supported yet.\n"); |
| 96 | return; |
| 97 | default: |
| 98 | printk(BIOS_WARNING, "Cannot read any EDID info, aborting.\n"); |
| 99 | return; |
| 100 | } |
| 101 | |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 102 | if (rkclk_configure_vop_dclk(vop_id, |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 103 | edid.mode.pixel_clock * KHz)) { |
| 104 | printk(BIOS_WARNING, "config vop err\n"); |
| 105 | return; |
| 106 | } |
| 107 | |
Julius Werner | e74f5ea | 2016-10-17 18:14:41 -0700 | [diff] [blame] | 108 | edid_set_framebuffer_bits_per_pixel(&edid, |
| 109 | conf->framebuffer_bits_per_pixel, 0); |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 110 | rkvop_mode_set(vop_id, &edid, detected_mode); |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 111 | |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 112 | rkvop_prepare(vop_id, &edid); |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 113 | |
| 114 | switch (detected_mode) { |
| 115 | case VOP_MODE_HDMI: |
| 116 | /* should not be here before HDMI supported */ |
| 117 | return; |
| 118 | case VOP_MODE_EDP: |
| 119 | default: |
Lin Huang | a09b338 | 2016-10-23 14:17:25 -0700 | [diff] [blame] | 120 | /* will enable edp in depthcharge */ |
Martin Roth | e4b9af1 | 2016-11-29 10:50:52 -0700 | [diff] [blame] | 121 | if (rk_edp_prepare()) { |
| 122 | reset_edp(); |
| 123 | goto retry_edp; /* Rerun entire init sequence */ |
| 124 | } |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 125 | mainboard_power_on_backlight(); |
| 126 | break; |
| 127 | } |
| 128 | |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 129 | set_vbe_mode_info_valid(&edid, (uintptr_t)0); |
Lin Huang | 079b5c6 | 2016-11-21 17:35:20 +0800 | [diff] [blame] | 130 | return; |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 131 | } |