Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 4 | * Copyright (C) 2015 Intel Corp. |
| 5 | * |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #define __SIMPLE_DEVICE__ |
| 17 | |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 18 | #include <assert.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 19 | #include <stdint.h> |
Elyes HAOUAS | 20eaef0 | 2019-03-29 17:45:28 +0100 | [diff] [blame] | 20 | #include <console/console.h> |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 21 | #include <cpu/x86/msr.h> |
Kyösti Mälkki | b2a5f0b | 2019-08-04 19:54:32 +0300 | [diff] [blame] | 22 | #include <cpu/x86/smm.h> |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 23 | #include <cpu/amd/msr.h> |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 24 | #include <cpu/amd/mtrr.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 25 | #include <cbmem.h> |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 26 | #include <arch/bert_storage.h> |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 27 | #include <soc/northbridge.h> |
Marshall Dawson | 69486ca | 2019-05-02 12:03:45 -0600 | [diff] [blame] | 28 | #include <soc/iomap.h> |
| 29 | #include <amdblocks/acpimmio.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 30 | |
| 31 | void backup_top_of_low_cacheable(uintptr_t ramtop) |
| 32 | { |
Marshall Dawson | 22f54c5 | 2017-11-29 09:30:23 -0700 | [diff] [blame] | 33 | biosram_write32(BIOSRAM_CBMEM_TOP, ramtop); |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 34 | } |
| 35 | |
| 36 | uintptr_t restore_top_of_low_cacheable(void) |
| 37 | { |
Marshall Dawson | 22f54c5 | 2017-11-29 09:30:23 -0700 | [diff] [blame] | 38 | return biosram_read32(BIOSRAM_CBMEM_TOP); |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 39 | } |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 40 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 41 | #if CONFIG(ACPI_BERT) |
Marshall Dawson | f0de242 | 2018-09-10 13:28:49 -0600 | [diff] [blame] | 42 | #if CONFIG_SMM_TSEG_SIZE == 0x0 |
| 43 | #define BERT_REGION_MAX_SIZE 0x100000 |
| 44 | #else |
| 45 | /* SMM_TSEG_SIZE must stay on a boundary appropriate for its granularity */ |
| 46 | #define BERT_REGION_MAX_SIZE CONFIG_SMM_TSEG_SIZE |
| 47 | #endif |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 48 | #else |
Marshall Dawson | f0de242 | 2018-09-10 13:28:49 -0600 | [diff] [blame] | 49 | #define BERT_REGION_MAX_SIZE 0 |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 50 | #endif |
| 51 | |
| 52 | void bert_reserved_region(void **start, size_t *size) |
| 53 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 54 | if (CONFIG(ACPI_BERT)) |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 55 | *start = cbmem_top(); |
| 56 | else |
| 57 | start = NULL; |
| 58 | *size = BERT_REGION_MAX_SIZE; |
| 59 | } |
| 60 | |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 61 | void *cbmem_top(void) |
| 62 | { |
| 63 | msr_t tom = rdmsr(TOP_MEM); |
| 64 | |
| 65 | if (!tom.lo) |
| 66 | return 0; |
Richard Spiegel | 8c614f2 | 2018-10-23 14:53:23 -0700 | [diff] [blame] | 67 | |
| 68 | /* 8MB alignment to keep MTRR usage low */ |
| 69 | return (void *)ALIGN_DOWN(restore_top_of_low_cacheable() |
| 70 | - CONFIG_SMM_TSEG_SIZE |
| 71 | - BERT_REGION_MAX_SIZE, 8*MiB); |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 72 | } |
| 73 | |
| 74 | static uintptr_t smm_region_start(void) |
| 75 | { |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 76 | return (uintptr_t)cbmem_top() + BERT_REGION_MAX_SIZE; |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 77 | } |
| 78 | |
| 79 | static size_t smm_region_size(void) |
| 80 | { |
| 81 | return CONFIG_SMM_TSEG_SIZE; |
| 82 | } |
| 83 | |
Kyösti Mälkki | 14222d8 | 2019-08-05 15:10:18 +0300 | [diff] [blame] | 84 | void smm_region(uintptr_t *start, size_t *size) |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 85 | { |
Kyösti Mälkki | 14222d8 | 2019-08-05 15:10:18 +0300 | [diff] [blame] | 86 | *start = smm_region_start(); |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 87 | *size = smm_region_size(); |
| 88 | } |
| 89 | |
Marshall Dawson | f3c57a7c | 2018-01-29 18:08:16 -0700 | [diff] [blame] | 90 | /* |
| 91 | * For data stored in TSEG, ensure TValid is clear so R/W access can reach |
| 92 | * the DRAM when not in SMM. |
| 93 | */ |
| 94 | static void clear_tvalid(void) |
| 95 | { |
| 96 | msr_t hwcr = rdmsr(HWCR_MSR); |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 97 | msr_t mask = rdmsr(SMM_MASK_MSR); |
Marshall Dawson | f3c57a7c | 2018-01-29 18:08:16 -0700 | [diff] [blame] | 98 | int tvalid = !!(mask.lo & SMM_TSEG_VALID); |
| 99 | |
| 100 | if (hwcr.lo & SMM_LOCK) { |
| 101 | if (!tvalid) /* not valid but locked means still accessible */ |
| 102 | return; |
| 103 | |
| 104 | printk(BIOS_ERR, "Error: can't clear TValid, already locked\n"); |
| 105 | return; |
| 106 | } |
| 107 | |
| 108 | mask.lo &= ~SMM_TSEG_VALID; |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 109 | wrmsr(SMM_MASK_MSR, mask); |
Marshall Dawson | f3c57a7c | 2018-01-29 18:08:16 -0700 | [diff] [blame] | 110 | } |
| 111 | |
Kyösti Mälkki | 14222d8 | 2019-08-05 15:10:18 +0300 | [diff] [blame] | 112 | int smm_subregion(int sub, uintptr_t *start, size_t *size) |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 113 | { |
Kyösti Mälkki | 544369e | 2019-08-06 22:14:34 +0300 | [diff] [blame] | 114 | static int once; |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 115 | uintptr_t sub_base; |
| 116 | size_t sub_size; |
| 117 | const size_t cache_size = CONFIG_SMM_RESERVED_SIZE; |
| 118 | |
Kyösti Mälkki | 14222d8 | 2019-08-05 15:10:18 +0300 | [diff] [blame] | 119 | smm_region(&sub_base, &sub_size); |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 120 | assert(sub_size > CONFIG_SMM_RESERVED_SIZE); |
| 121 | |
Kyösti Mälkki | 544369e | 2019-08-06 22:14:34 +0300 | [diff] [blame] | 122 | if (!once) { |
| 123 | clear_tvalid(); |
| 124 | once = 1; |
| 125 | } |
| 126 | |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 127 | switch (sub) { |
| 128 | case SMM_SUBREGION_HANDLER: |
| 129 | /* Handler starts at the base of TSEG. */ |
| 130 | sub_size -= cache_size; |
| 131 | break; |
| 132 | case SMM_SUBREGION_CACHE: |
| 133 | /* External cache is in the middle of TSEG. */ |
| 134 | sub_base += sub_size - cache_size; |
| 135 | sub_size = cache_size; |
| 136 | break; |
| 137 | default: |
Kyösti Mälkki | d157b3e | 2019-08-05 15:13:53 +0300 | [diff] [blame] | 138 | *start = 0; |
| 139 | *size = 0; |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 140 | return -1; |
| 141 | } |
| 142 | |
Kyösti Mälkki | 14222d8 | 2019-08-05 15:10:18 +0300 | [diff] [blame] | 143 | *start = sub_base; |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 144 | *size = sub_size; |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 145 | return 0; |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 146 | } |