Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; version 2 of the License. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #define __SIMPLE_DEVICE__ |
| 15 | |
| 16 | #include <stdint.h> |
| 17 | #include <arch/io.h> |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame^] | 18 | #include <cpu/x86/msr.h> |
| 19 | #include <cpu/amd/mtrr.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 20 | #include <cbmem.h> |
| 21 | |
| 22 | #define CBMEM_TOP_SCRATCHPAD 0x78 |
| 23 | |
| 24 | void backup_top_of_low_cacheable(uintptr_t ramtop) |
| 25 | { |
| 26 | uint16_t top_cache = ramtop >> 16; |
| 27 | pci_write_config16(PCI_DEV(0,0,0), CBMEM_TOP_SCRATCHPAD, top_cache); |
| 28 | } |
| 29 | |
| 30 | uintptr_t restore_top_of_low_cacheable(void) |
| 31 | { |
| 32 | uint16_t top_cache; |
| 33 | top_cache = pci_read_config16(PCI_DEV(0,0,0), CBMEM_TOP_SCRATCHPAD); |
| 34 | return (top_cache << 16); |
| 35 | } |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame^] | 36 | |
| 37 | void *cbmem_top(void) |
| 38 | { |
| 39 | msr_t tom = rdmsr(TOP_MEM); |
| 40 | |
| 41 | if (!tom.lo) |
| 42 | return 0; |
| 43 | else |
| 44 | return (void *)restore_top_of_low_cacheable(); |
| 45 | } |